Esempi in C++ (Cpp) per iosf_punit_read

Esempio n. 1

File: pmc.c Progetto: RafaelRMachado/Coreboot

/* This sequence signals the PUNIT to start running. */
void punit_init(void)
{
	uint32_t reg;
	uint8_t rid;
	const struct device *dev;
	const struct soc_intel_baytrail_config *cfg = NULL;

	rid = pci_read_config8(IOSF_PCI_DEV, REVID);
	dev = dev_find_slot(0, PCI_DEVFN(SOC_DEV, SOC_FUNC));

	if (dev)
		cfg = dev->chip_info;

	reg = iosf_punit_read(SB_BIOS_CONFIG);
	/* Write bits 17:16 of SB_BIOS_CONFIG in the PUNIT. */
	reg |= SB_BIOS_CONFIG_PERF_MODE | SB_BIOS_CONFIG_PDM_MODE;
	/* Configure VR low power mode for C0 and above. */
	if (rid >= RID_C_STEPPING_START && cfg != NULL &&
	    (cfg->vnn_ps2_enable || cfg->vcc_ps2_enable)) {
		printk(BIOS_DEBUG, "Enabling VR PS2 mode: ");
		if (cfg->vnn_ps2_enable) {
			reg |= SB_BIOS_CONFIG_PS2_EN_VNN;
			printk(BIOS_DEBUG, "VNN ");
		}
		if (cfg->vcc_ps2_enable) {
			reg |= SB_BIOS_CONFIG_PS2_EN_VCC;
			printk(BIOS_DEBUG, "VCC ");
		}
		printk(BIOS_DEBUG, "\n");
	}
	iosf_punit_write(SB_BIOS_CONFIG, reg);

	/* Write bits 1:0 of BIOS_RESET_CPL in the PUNIT. */
	reg = BIOS_RESET_CPL_ALL_DONE | BIOS_RESET_CPL_RESET_DONE;
	pci_write_config32(IOSF_PCI_DEV, MDR_REG, reg);
	reg = IOSF_OPCODE(IOSF_OP_WRITE_PMC) | IOSF_PORT(IOSF_PORT_PMC) |
	     IOSF_REG(BIOS_RESET_CPL) | IOSF_BYTE_EN_0;
	pci_write_config32(IOSF_PCI_DEV, MCR_REG, reg);
}

Esempio n. 2

File: reg_script.c Progetto: MikeeHawk/coreboot

static uint32_t reg_script_read_res(struct reg_script_context *ctx)
{
	struct resource *res;
	uint32_t val = 0;
	const struct reg_script *step = reg_script_get_step(ctx);

	res = reg_script_get_resource(ctx);

	if (res == NULL)
		return val;

	if (res->flags & IORESOURCE_IO) {
		const struct reg_script io_step = {
			.size = step->size,
			.reg = res->base + step->reg,
		};
		reg_script_set_step(ctx, &io_step);
		val = reg_script_read_io(ctx);
	}
	else if (res->flags & IORESOURCE_MEM) {
		const struct reg_script mmio_step = {
			.size = step->size,
			.reg = res->base + step->reg,
		};
		reg_script_set_step(ctx, &mmio_step);
		val = reg_script_read_mmio(ctx);
	}
	reg_script_set_step(ctx, step);
	return val;
}

static void reg_script_write_res(struct reg_script_context *ctx)
{
	struct resource *res;
	const struct reg_script *step = reg_script_get_step(ctx);

	res = reg_script_get_resource(ctx);

	if (res == NULL)
		return;

	if (res->flags & IORESOURCE_IO) {
		const struct reg_script io_step = {
			.size = step->size,
			.reg = res->base + step->reg,
			.value = step->value,
		};
		reg_script_set_step(ctx, &io_step);
		reg_script_write_io(ctx);
	}
	else if (res->flags & IORESOURCE_MEM) {
		const struct reg_script mmio_step = {
			.size = step->size,
			.reg = res->base + step->reg,
			.value = step->value,
		};
		reg_script_set_step(ctx, &mmio_step);
		reg_script_write_mmio(ctx);
	}
	reg_script_set_step(ctx, step);
}

#if HAS_IOSF
static uint32_t reg_script_read_iosf(struct reg_script_context *ctx)
{
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->id) {
	case IOSF_PORT_AUNIT:
		return iosf_aunit_read(step->reg);
	case IOSF_PORT_CPU_BUS:
		return iosf_cpu_bus_read(step->reg);
	case IOSF_PORT_BUNIT:
		return iosf_bunit_read(step->reg);
	case IOSF_PORT_DUNIT_CH0:
		return iosf_dunit_ch0_read(step->reg);
	case IOSF_PORT_PMC:
		return iosf_punit_read(step->reg);
	case IOSF_PORT_USBPHY:
		return iosf_usbphy_read(step->reg);
	case IOSF_PORT_SEC:
		return iosf_sec_read(step->reg);
	case IOSF_PORT_0x45:
		return iosf_port45_read(step->reg);
	case IOSF_PORT_0x46:
		return iosf_port46_read(step->reg);
	case IOSF_PORT_0x47:
		return iosf_port47_read(step->reg);
	case IOSF_PORT_SCORE:
		return iosf_score_read(step->reg);
	case IOSF_PORT_0x55:
		return iosf_port55_read(step->reg);
	case IOSF_PORT_0x58:
		return iosf_port58_read(step->reg);
	case IOSF_PORT_0x59:
		return iosf_port59_read(step->reg);
	case IOSF_PORT_0x5a:
		return iosf_port5a_read(step->reg);
	case IOSF_PORT_USHPHY:
		return iosf_ushphy_read(step->reg);
	case IOSF_PORT_SCC:
		return iosf_scc_read(step->reg);
	case IOSF_PORT_LPSS:
		return iosf_lpss_read(step->reg);
	case IOSF_PORT_0xa2:
		return iosf_porta2_read(step->reg);
	case IOSF_PORT_CCU:
		return iosf_ccu_read(step->reg);
	case IOSF_PORT_SSUS:
		return iosf_ssus_read(step->reg);
	default:
		printk(BIOS_DEBUG, "No read support for IOSF port 0x%x.\n",
		       step->id);
		break;
	}
	return 0;
}

static void reg_script_write_iosf(struct reg_script_context *ctx)
{
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->id) {
	case IOSF_PORT_AUNIT:
		iosf_aunit_write(step->reg, step->value);
		break;
	case IOSF_PORT_CPU_BUS:
		iosf_cpu_bus_write(step->reg, step->value);
		break;
	case IOSF_PORT_BUNIT:
		iosf_bunit_write(step->reg, step->value);
		break;
	case IOSF_PORT_DUNIT_CH0:
		iosf_dunit_write(step->reg, step->value);
		break;
	case IOSF_PORT_PMC:
		iosf_punit_write(step->reg, step->value);
		break;
	case IOSF_PORT_USBPHY:
		iosf_usbphy_write(step->reg, step->value);
		break;
	case IOSF_PORT_SEC:
		iosf_sec_write(step->reg, step->value);
		break;
	case IOSF_PORT_0x45:
		iosf_port45_write(step->reg, step->value);
		break;
	case IOSF_PORT_0x46:
		iosf_port46_write(step->reg, step->value);
		break;
	case IOSF_PORT_0x47:
		iosf_port47_write(step->reg, step->value);
		break;
	case IOSF_PORT_SCORE:
		iosf_score_write(step->reg, step->value);
		break;
	case IOSF_PORT_0x55:
		iosf_port55_write(step->reg, step->value);
		break;
	case IOSF_PORT_0x58:
		iosf_port58_write(step->reg, step->value);
		break;
	case IOSF_PORT_0x59:
		iosf_port59_write(step->reg, step->value);
		break;
	case IOSF_PORT_0x5a:
		iosf_port5a_write(step->reg, step->value);
		break;
	case IOSF_PORT_USHPHY:
		iosf_ushphy_write(step->reg, step->value);
		break;
	case IOSF_PORT_SCC:
		iosf_scc_write(step->reg, step->value);
		break;
	case IOSF_PORT_LPSS:
		iosf_lpss_write(step->reg, step->value);
		break;
	case IOSF_PORT_0xa2:
		iosf_porta2_write(step->reg, step->value);
		break;
	case IOSF_PORT_CCU:
		iosf_ccu_write(step->reg, step->value);
		break;
	case IOSF_PORT_SSUS:
		iosf_ssus_write(step->reg, step->value);
		break;
	default:
		printk(BIOS_DEBUG, "No write support for IOSF port 0x%x.\n",
		       step->id);
		break;
	}
}
#endif /* HAS_IOSF */


static uint64_t reg_script_read_msr(struct reg_script_context *ctx)
{
#if CONFIG_ARCH_X86
	const struct reg_script *step = reg_script_get_step(ctx);
	msr_t msr = rdmsr(step->reg);
	uint64_t value = msr.hi;
	value = msr.hi;
	value <<= 32;
	value |= msr.lo;
	return value;
#endif
}

static void reg_script_write_msr(struct reg_script_context *ctx)
{
#if CONFIG_ARCH_X86
	const struct reg_script *step = reg_script_get_step(ctx);
	msr_t msr;
	msr.hi = step->value >> 32;
	msr.lo = step->value & 0xffffffff;
	wrmsr(step->reg, msr);
#endif
}

#ifndef __PRE_RAM__
/* Default routine provided for systems without platform specific busses */
const struct reg_script_bus_entry *__attribute__((weak))
	platform_bus_table(size_t *table_entries)
{
	/* No platform bus type table supplied */
	*table_entries = 0;
	return NULL;
}

/* Locate the structure containing the platform specific bus access routines */
static const struct reg_script_bus_entry
	*find_bus(const struct reg_script *step)
{
	const struct reg_script_bus_entry *bus;
	size_t table_entries;
	size_t i;

	/* Locate the platform specific bus */
	bus = platform_bus_table(&table_entries);
	for (i = 0; i < table_entries; i++) {
		if (bus[i].type == step->type)
			return &bus[i];
	}

	/* Bus not found */
	return NULL;
}
#endif

static uint64_t reg_script_read(struct reg_script_context *ctx)
{
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->type) {
	case REG_SCRIPT_TYPE_PCI:
		return reg_script_read_pci(ctx);
	case REG_SCRIPT_TYPE_IO:
		return reg_script_read_io(ctx);
	case REG_SCRIPT_TYPE_MMIO:
		return reg_script_read_mmio(ctx);
	case REG_SCRIPT_TYPE_RES:
		return reg_script_read_res(ctx);
	case REG_SCRIPT_TYPE_MSR:
		return reg_script_read_msr(ctx);
#if HAS_IOSF
	case REG_SCRIPT_TYPE_IOSF:
		return reg_script_read_iosf(ctx);
#endif /* HAS_IOSF */
	default:
#ifndef __PRE_RAM__
		{
			const struct reg_script_bus_entry *bus;

			/* Read from the platform specific bus */
			bus = find_bus(step);
			if (NULL != bus)
				return bus->reg_script_read(ctx);
		}
#endif
		printk(BIOS_ERR,
			"Unsupported read type (0x%x) for this device!\n",
			step->type);
		break;
	}
	return 0;
}

static void reg_script_write(struct reg_script_context *ctx)
{
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->type) {
	case REG_SCRIPT_TYPE_PCI:
		reg_script_write_pci(ctx);
		break;
	case REG_SCRIPT_TYPE_IO:
		reg_script_write_io(ctx);
		break;
	case REG_SCRIPT_TYPE_MMIO:
		reg_script_write_mmio(ctx);
		break;
	case REG_SCRIPT_TYPE_RES:
		reg_script_write_res(ctx);
		break;
	case REG_SCRIPT_TYPE_MSR:
		reg_script_write_msr(ctx);
		break;
#if HAS_IOSF
	case REG_SCRIPT_TYPE_IOSF:
		reg_script_write_iosf(ctx);
		break;
#endif /* HAS_IOSF */
	default:
#ifndef __PRE_RAM__
		{
			const struct reg_script_bus_entry *bus;

			/* Write to the platform specific bus */
			bus = find_bus(step);
			if (NULL != bus) {
				bus->reg_script_write(ctx);
				return;
			}
		}
#endif
		printk(BIOS_ERR,
			"Unsupported write type (0x%x) for this device!\n",
			step->type);
		break;
	}
}

static void reg_script_rmw(struct reg_script_context *ctx)
{
	uint64_t value;
	const struct reg_script *step = reg_script_get_step(ctx);
	struct reg_script write_step = *step;

	value = reg_script_read(ctx);
	value &= step->mask;
	value |= step->value;
	write_step.value = value;
	reg_script_set_step(ctx, &write_step);
	reg_script_write(ctx);
	reg_script_set_step(ctx, step);
}

Esempio n. 3

File: reg_script.c Progetto: rprstop/coreboot

static uint32_t reg_script_read_res(struct reg_script_context *ctx)
{
	struct resource *res;
	uint32_t val = 0;
	const struct reg_script *step = reg_script_get_step(ctx);

	res = reg_script_get_resource(ctx);

	if (res == NULL)
		return val;

	if (res->flags & IORESOURCE_IO) {
		const struct reg_script io_step = {
			.size = step->size,
			.reg = res->base + step->reg,
		};
		reg_script_set_step(ctx, &io_step);
		val = reg_script_read_io(ctx);
	}
	else if (res->flags & IORESOURCE_MEM) {
		const struct reg_script mmio_step = {
			.size = step->size,
			.reg = res->base + step->reg,
		};
		reg_script_set_step(ctx, &mmio_step);
		val = reg_script_read_mmio(ctx);
	}
	reg_script_set_step(ctx, step);
	return val;
}

static void reg_script_write_res(struct reg_script_context *ctx)
{
	struct resource *res;
	const struct reg_script *step = reg_script_get_step(ctx);

	res = reg_script_get_resource(ctx);

	if (res == NULL)
		return;

	if (res->flags & IORESOURCE_IO) {
		const struct reg_script io_step = {
			.size = step->size,
			.reg = res->base + step->reg,
			.value = step->value,
		};
		reg_script_set_step(ctx, &io_step);
		reg_script_write_io(ctx);
	}
	else if (res->flags & IORESOURCE_MEM) {
		const struct reg_script mmio_step = {
			.size = step->size,
			.reg = res->base + step->reg,
			.value = step->value,
		};
		reg_script_set_step(ctx, &mmio_step);
		reg_script_write_mmio(ctx);
	}
	reg_script_set_step(ctx, step);
}

static uint32_t reg_script_read_iosf(struct reg_script_context *ctx)
{
#if CONFIG_SOC_INTEL_BAYTRAIL
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->id) {
	case IOSF_PORT_BUNIT:
		return iosf_bunit_read(step->reg);
	case IOSF_PORT_DUNIT_CH0:
		return iosf_dunit_ch0_read(step->reg);
	case IOSF_PORT_PMC:
		return iosf_punit_read(step->reg);
	case IOSF_PORT_USBPHY:
		return iosf_usbphy_read(step->reg);
	case IOSF_PORT_USHPHY:
		return iosf_ushphy_read(step->reg);
	}
#endif
	return 0;
}

static void reg_script_write_iosf(struct reg_script_context *ctx)
{
#if CONFIG_SOC_INTEL_BAYTRAIL
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->id) {
	case IOSF_PORT_BUNIT:
		iosf_bunit_write(step->reg, step->value);
		break;
	case IOSF_PORT_DUNIT_CH0:
		iosf_dunit_write(step->reg, step->value);
		break;
	case IOSF_PORT_PMC:
		iosf_punit_write(step->reg, step->value);
		break;
	case IOSF_PORT_USBPHY:
		iosf_usbphy_write(step->reg, step->value);
		break;
	case IOSF_PORT_USHPHY:
		iosf_ushphy_write(step->reg, step->value);
		break;
	}
#endif
}

static uint32_t reg_script_read(struct reg_script_context *ctx)
{
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->type) {
	case REG_SCRIPT_TYPE_PCI:
		return reg_script_read_pci(ctx);
	case REG_SCRIPT_TYPE_IO:
		return reg_script_read_io(ctx);
	case REG_SCRIPT_TYPE_MMIO:
		return reg_script_read_mmio(ctx);
	case REG_SCRIPT_TYPE_RES:
		return reg_script_read_res(ctx);
	case REG_SCRIPT_TYPE_IOSF:
		return reg_script_read_iosf(ctx);
	}
	return 0;
}

static void reg_script_write(struct reg_script_context *ctx)
{
	const struct reg_script *step = reg_script_get_step(ctx);

	switch (step->type) {
	case REG_SCRIPT_TYPE_PCI:
		reg_script_write_pci(ctx);
		break;
	case REG_SCRIPT_TYPE_IO:
		reg_script_write_io(ctx);
		break;
	case REG_SCRIPT_TYPE_MMIO:
		reg_script_write_mmio(ctx);
		break;
	case REG_SCRIPT_TYPE_RES:
		reg_script_write_res(ctx);
		break;
	case REG_SCRIPT_TYPE_IOSF:
		reg_script_write_iosf(ctx);
		break;
	}
}

static void reg_script_rmw(struct reg_script_context *ctx)
{
	uint32_t value;
	const struct reg_script *step = reg_script_get_step(ctx);
	struct reg_script write_step = *step;

	value = reg_script_read(ctx);
	value &= step->mask;
	value |= step->value;
	write_step.value = value;
	reg_script_set_step(ctx, &write_step);
	reg_script_write(ctx);
	reg_script_set_step(ctx, step);
}

/* In order to easily chain scripts together handle the REG_SCRIPT_COMMAND_NEXT
 * as recursive call with a new context that has the same dev and resource
 * as the previous one. That will run to completion and then move on to the
 * next step of the previous context. */
static void reg_script_run_next(struct reg_script_context *ctx,
                                const struct reg_script *step);

static void reg_script_run_with_context(struct reg_script_context *ctx)
{
	uint32_t value = 0, try;

	while (1) {
		const struct reg_script *step = reg_script_get_step(ctx);

		if (step->command == REG_SCRIPT_COMMAND_END)
			break;

		switch (step->command) {
		case REG_SCRIPT_COMMAND_READ:
			(void)reg_script_read(ctx);
			break;
		case REG_SCRIPT_COMMAND_WRITE:
			reg_script_write(ctx);
			break;
		case REG_SCRIPT_COMMAND_RMW:
			reg_script_rmw(ctx);
			break;
		case REG_SCRIPT_COMMAND_POLL:
			for (try = 0; try < step->timeout; try += POLL_DELAY) {
				value = reg_script_read(ctx) & step->mask;
				if (value == step->value)
					break;
				udelay(POLL_DELAY);
			}
			if (try >= step->timeout)
				printk(BIOS_WARNING, "%s: POLL timeout waiting "
				       "for 0x%08x to be 0x%08x, got 0x%08x\n",
				       __func__, step->reg, step->value, value);
			break;
		case REG_SCRIPT_COMMAND_SET_DEV:
			reg_script_set_dev(ctx, step->dev);
			break;
		case REG_SCRIPT_COMMAND_NEXT:
			reg_script_run_next(ctx, step->next);
			break;
		default:
			printk(BIOS_WARNING, "Invalid command: %08x\n",
			       step->command);
			break;
		}

		reg_script_set_step(ctx, step + 1);
	}
}