void set_channel(uint8_t chan) { volatile uint32_t tmp; safe_irq_disable(MACA); tmp = reg(ADDR_CHAN1); tmp = tmp & 0xbfffffff; reg(ADDR_CHAN1) = tmp; reg(ADDR_CHAN2) = VCODivI[chan]; reg(ADDR_CHAN3) = VCODivF[chan]; tmp = reg(ADDR_CHAN4); tmp = tmp | 2; reg(ADDR_CHAN4) = tmp; tmp = reg(ADDR_CHAN4); tmp = tmp | 4; reg(ADDR_CHAN4) = tmp; tmp = tmp & 0xffffe0ff; tmp = tmp | (((ctov[chan])<<8)&0x1F00); reg(ADDR_CHAN4) = tmp; /* duh! */ irq_restore(); if(bit_is_set(*NIPEND, INT_NUM_MACA)) { *INTFRC = (1 << INT_NUM_MACA); } }
bool x86_rtc_set_update(uint32_t msg_content, kernel_pid_t target_pid, bool allow_replace) { if (!valid) { return false; } unsigned old_status = irq_disable(); bool result; if (target_pid == KERNEL_PID_UNDEF) { result = true; update_pid = KERNEL_PID_UNDEF; x86_cmos_write(RTC_REG_B, x86_cmos_read(RTC_REG_B) & ~RTC_REG_B_INT_UPDATE); } else { result = allow_replace || update_pid == KERNEL_PID_UNDEF; if (result) { update_msg_content = msg_content; update_pid = target_pid; x86_cmos_write(RTC_REG_B, x86_cmos_read(RTC_REG_B) | RTC_REG_B_INT_UPDATE); } } rtc_irq_handler(0); irq_restore(old_status); return result; }
void tx_packet(volatile packet_t *p) { safe_irq_disable(MACA); BOUND_CHECK(p); if(!p) { PRINTF("tx_packet passed packet 0\n\r"); return; } if(tx_head == 0) { /* start a new queue if empty */ tx_end = p; tx_end->left = 0; tx_end->right = 0; tx_head = tx_end; } else { /* add p to the end of the queue */ tx_end->left = p; p->right = tx_end; /* move the queue */ tx_end = p; tx_end->left = 0; } // print_packets("tx packet"); irq_restore(); if(bit_is_set(*NIPEND, INT_NUM_MACA)) { *INTFRC = (1 << INT_NUM_MACA); } if(last_post == NO_POST) { *INTFRC = (1<<INT_NUM_MACA); } /* if we are in a reception cycle, advance the softclock timeout to now */ if(last_post == RX_POST) { *MACA_SFTCLK = *MACA_CLK + CLK_PER_BYTE; } return; }
volatile packet_t* get_free_packet(void) { volatile packet_t *p; safe_irq_disable(MACA); BOUND_CHECK(free_head); p = free_head; if( p != 0 ) { free_head = p->left; free_head->right = 0; } BOUND_CHECK(free_head); #if PACKET_STATS p->get_free++; #endif // print_packets("get_free_packet"); irq_restore(); if(bit_is_set(*NIPEND, INT_NUM_MACA)) { *INTFRC = (1 << INT_NUM_MACA); } return p; }
/* ends are to the left */ void free_packet(volatile packet_t *p) { safe_irq_disable(MACA); BOUND_CHECK(p); if(!p) { PRINTF("free_packet passed packet 0\n\r"); return; } if(p == &dummy_ack) { return; } BOUND_CHECK(free_head); p->length = 0; p->offset = 0; p->left = free_head; p->right = 0; #if PACKET_STATS p->seen = 0; p->post_tx = 0; p->get_free = 0; p->rxd = 0; #endif free_head = p; BOUND_CHECK(free_head); irq_restore(); if(bit_is_set(*NIPEND, INT_NUM_MACA)) { *INTFRC = (1 << INT_NUM_MACA); } return; }
bool x86_rtc_set_periodic(uint8_t hz, uint32_t msg_content, kernel_pid_t target_pid, bool allow_replace) { if (!valid) { return false; } unsigned old_status = irq_disable(); bool result; if (target_pid == KERNEL_PID_UNDEF || hz == RTC_REG_A_HZ_OFF) { result = true; periodic_pid = KERNEL_PID_UNDEF; uint8_t old_divider = x86_cmos_read(RTC_REG_A) & ~RTC_REG_A_HZ_MASK; x86_cmos_write(RTC_REG_A, old_divider | RTC_REG_A_HZ_OFF); x86_cmos_write(RTC_REG_B, x86_cmos_read(RTC_REG_B) & ~RTC_REG_B_INT_PERIODIC); } else { result = allow_replace || periodic_pid == KERNEL_PID_UNDEF; if (result) { periodic_msg_content = msg_content; periodic_pid = target_pid; uint8_t old_divider = x86_cmos_read(RTC_REG_A) & ~RTC_REG_A_HZ_MASK; x86_cmos_write(RTC_REG_A, old_divider | hz); x86_cmos_write(RTC_REG_B, x86_cmos_read(RTC_REG_B) | RTC_REG_B_INT_PERIODIC); } } rtc_irq_handler(0); irq_restore(old_status); return result; }
/** * Allocate a block of size "bytes" */ ATTR_MALLOC void *malloc(size_t bytes) { unsigned old_state = irq_disable(); void *result = tlsf_malloc(gheap, bytes); irq_restore(old_state); return result; }
void command_debug_write16(uint32_t *args) { uint16_t *ptr = (void*)(size_t)args[0]; irqstatus_t flag = irq_save(); *ptr = args[1]; irq_restore(flag); }
// Cancel a sample that may have been started with gpio_adc_sample() void gpio_adc_cancel_sample(struct gpio_adc g) { irqstatus_t flag = irq_save(); if ((ADC->ADC_CHSR & 0xffff) == g.bit) gpio_adc_read(g); irq_restore(flag); }
static thread_flags_t _thread_flags_clear_atomic(thread_t *thread, thread_flags_t mask) { unsigned state = irq_disable(); mask &= thread->flags; thread->flags &= ~mask; irq_restore(state); return mask; }
/** * Allocate an aligned memory block. */ ATTR_MALIGN void *memalign(size_t align, size_t bytes) { unsigned old_state = irq_disable(); void *result = tlsf_memalign(gheap, align, bytes); irq_restore(old_state); return result; }
/** * Deallocate and reallocate with a different size. */ ATTR_REALLOC void *realloc(void *ptr, size_t size) { unsigned old_state = irq_disable(); void *result = tlsf_realloc(gheap, ptr, size); irq_restore(old_state); return result; }
void dc_flushall(void) { u32 cookie = irq_kill(); _dc_flush(); _drain_write_buffer(); ahb_flush_from(AHB_1); irq_restore(cookie); }
void xtimer_remove(xtimer_t *timer) { int state = irq_disable(); if (_is_set(timer)) { _remove(timer); } irq_restore(state); }
/** * @brief Atomic generic exchange * * @param[in] size width of the data, in bytes * @param[in] ptr object to swap * @param[in] val value to swap to * @param[in] ret put the old value from @p ptr in @p ret * @param[in] memorder memory ordering, ignored in this implementation */ void __atomic_exchange_c(size_t size, void *ptr, void *val, void *ret, int memorder) { (void) memorder; unsigned int mask = irq_disable(); memcpy(ret, ptr, size); memcpy(ptr, val, size); irq_restore(mask); }
// invalidate device and then starlet void ahb_flush_to(enum AHBDEV type) { u32 cookie = irq_kill(); _ahb_flush_to(type); if(type != AHB_STARLET) _ahb_flush_to(AHB_STARLET); irq_restore(cookie); }
void rtt_set_overflow_cb(rtt_cb_t cb, void *arg) { assert(cb); unsigned is = irq_disable(); ovf_cb = cb; ovf_arg = arg; irq_restore(is); }
void up(semaphore_t *s) { unsigned long flags; irq_save(flags); atomic_dec(&s->count); wake_up(&s->wait); irq_restore(flags); }
void command_debug_read16(uint32_t *args) { uint16_t *ptr = (void*)(size_t)args[0]; irqstatus_t flag = irq_save(); uint16_t v = *ptr; irq_restore(flag); sendf("debug_result val=%hu", v); }
void dc_invalidaterange(void *start, u32 size) { u32 cookie = irq_kill(); void *end = ALIGN_FORWARD(((u8*)start) + size, LINESIZE); start = ALIGN_BACKWARD(start, LINESIZE); _dc_inval_entries(start, (end - start) / LINESIZE); ahb_flush_to(AHB_STARLET); irq_restore(cookie); }
void check_maca(void) { safe_irq_disable(MACA); static volatile uint32_t last_time; static volatile uint32_t last_entry; volatile uint32_t i; #if DEBUG_MACA volatile uint32_t count; #endif /* if *MACA_CLK == last_time */ /* try waiting for one clock period */ /* since maybe check_maca is getting called quickly */ for(i=0; (i < 1024) && (*MACA_CLK == last_time); i++) { continue; } if(*MACA_CLK == last_time) { PRINTF("check maca: maca_clk stopped, restarting\n"); /* clock isn't running */ ResumeMACASync(); *INTFRC = (1<<INT_NUM_MACA); } else { if((last_time > (*MACA_SFTCLK + RECV_SOFTIMEOUT)) && (last_time > (*MACA_CPLCLK + CPL_TIMEOUT))) { PRINTF("check maca: complete clocks expired\n"); /* all complete clocks have expired */ /* check that maca entry is changing */ /* if not, do call the isr to restart the cycle */ if(last_entry == maca_entry) { PRINTF("check maca: forcing isr\n"); *INTFRC = (1<<INT_NUM_MACA); } } } last_entry = maca_entry; last_time = *MACA_CLK; #if DEBUG_MACA if((count = count_packets()) != NUM_PACKETS) { PRINTF("check maca: count_packets %d\n", (int)count); Print_Packets("check_maca"); #if PACKET_STATS for(i=0; i<NUM_PACKETS; i++) { printf("packet 0x%lx seen %d post_tx %d get_free %d rxd %d\n", (uint32_t) &packet_pool[i], packet_pool[i].seen, packet_pool[i].post_tx, packet_pool[i].get_free, packet_pool[i].rxd); } #endif if(bit_is_set(*NIPEND, INT_NUM_MACA)) { *INTFRC = (1 << INT_NUM_MACA); } } #endif /* DEBUG_MACA */ irq_restore(); }
static void _thread_flags_wait(thread_flags_t mask, thread_t *thread, unsigned threadstate, unsigned irqstate) { DEBUG("_thread_flags_wait: me->flags=0x%08x me->mask=0x%08x. going blocked.\n", (unsigned)thread->flags, (unsigned)mask); thread->wait_data = (void *)(unsigned)mask; sched_set_status(thread, threadstate); irq_restore(irqstate); thread_yield_higher(); }
void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg) { assert(cb && !(alarm & ~RTT_MAX_VALUE)); unsigned is = irq_disable(); to_cb = cb; to_arg = arg; LPTIM1->CMP = (uint16_t)alarm; irq_restore(is); }
/* Mostly copied from thread_wakeup() */ static void _thread_wake_wo_yield(kernel_pid_t pid) { unsigned old_state = irq_disable(); thread_t *other_thread = (thread_t *) thread_get(pid); sched_set_status(other_thread, STATUS_RUNNING); irq_restore(old_state); }
void sol_interrupt_scheduler_gpio_stop(gpio_t dev, void *handler) { unsigned int state; state = irq_disable(); gpio_irq_disable(dev); interrupt_scheduler_handler_free(handler); irq_restore(state); }
int msg_send_to_self(msg_t *m) { unsigned state = irq_disable(); m->sender_pid = sched_active_pid; int res = queue_msg((thread_t *) sched_active_thread, m); irq_restore(state); return res; }
uint8_t flashrom_erase(uint8_t *addr) { uint8_t sec = iap_get_sector((uint32_t) addr); unsigned intstate; if (sec == INVALID_ADDRESS) { DEBUG("Invalid address\n"); return 0; } /* check sector */ if (!blank_check_sector(sec, sec)) { DEBUG("Sector already blank!\n"); return 1; } /* prepare sector */ if (prepare_sectors(sec, sec)) { DEBUG("-- ERROR: PREPARE_SECTOR_FOR_WRITE_OPERATION --\n"); return 0; } intstate = irq_disable(); /* erase sector */ if (erase_sectors(sec, sec)) { DEBUG("-- ERROR: ERASE SECTOR --\n"); irq_restore(intstate); return 0; } irq_restore(intstate); /* check again */ if (blank_check_sector(sec, sec)) { DEBUG("-- ERROR: BLANK_CHECK_SECTOR\n"); return 0; } DEBUG("Sector successfully erased.\n"); return 1; }
void down(semaphore_t *s) { unsigned long flags; irq_save(flags); atomic_inc(&s->count); if (atomic_read(&s->count) != 1) { wait(&s->wait); } irq_restore(flags); }
void evtimer_del(evtimer_t *evtimer, evtimer_event_t *event) { unsigned state = irq_disable(); DEBUG("evtimer_del(): removing event with offset %" PRIu32 "\n", event->offset); _update_head_offset(evtimer); _del_event_from_list(evtimer, event); _update_timer(evtimer); irq_restore(state); }
static void _thread_flags_wait_any(thread_flags_t mask) { thread_t *me = (thread_t*) sched_active_thread; unsigned state = irq_disable(); if (!(me->flags & mask)) { _thread_flags_wait(mask, me, STATUS_FLAG_BLOCKED_ANY, state); } else { irq_restore(state); } }