/* read the value of a CIR register */
static u8 it8709_rr(struct ite_dev *dev, int index)
{
/* just wait in case the previous access was a write */
it8709_wait(dev);
it8709_wm(dev, index, IT8709_REG_IDX);
it8709_wm(dev, IT8709_READ, IT8709_MODE);
/* wait for the read data to be available */
it8709_wait(dev);
/* return the read value */
return it8709_rm(dev, IT8709_REG_VAL);
}
static u8 it8709_rr(struct ite_dev *dev, int index)
{
it8709_wait(dev);
it8709_wm(dev, index, IT8709_REG_IDX);
it8709_wm(dev, IT8709_READ, IT8709_MODE);
it8709_wait(dev);
return it8709_rm(dev, IT8709_REG_VAL);
}
static void it8709_wr(struct ite_dev *dev, u8 val, int index)
{
it8709_wait(dev);
it8709_wm(dev, val, IT8709_REG_VAL);
it8709_wm(dev, index, IT8709_REG_IDX);
it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
}
/* write the value of a CIR register */
static void it8709_wr(struct ite_dev *dev, u8 val, int index)
{
/* we wait before writing, and not afterwards, since this allows us to
* pipeline the host CPU with the microcontroller */
it8709_wait(dev);
it8709_wm(dev, val, IT8709_REG_VAL);
it8709_wm(dev, index, IT8709_REG_IDX);
it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
}
