void genc_ngt_s(void) { #ifdef INTERPRET_C_NGT_S gencallinterp((native_type)cached_interpreter_table.C_NGT_S, 0); #else gencheck_cop1_unusable(); #ifdef __x86_64__ mov_xreg64_m64rel(RAX, (unsigned long long *)(®_cop1_simple[dst->f.cf.ft])); fld_preg64_dword(RAX); mov_xreg64_m64rel(RAX, (unsigned long long *)(®_cop1_simple[dst->f.cf.fs])); fld_preg64_dword(RAX); fcomip_fpreg(1); ffree_fpreg(0); jp_rj(15); ja_rj(13); or_m32rel_imm32((unsigned int*)&FCR31, 0x800000); // 11 jmp_imm_short(11); // 2 and_m32rel_imm32((unsigned int*)&FCR31, ~0x800000); // 11 #else mov_eax_memoffs32((unsigned int *)(®_cop1_simple[dst->f.cf.ft])); fld_preg32_dword(EAX); mov_eax_memoffs32((unsigned int *)(®_cop1_simple[dst->f.cf.fs])); fld_preg32_dword(EAX); fcomip_fpreg(1); ffree_fpreg(0); jp_rj(14); ja_rj(12); or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10 jmp_imm_short(10); // 2 and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10 #endif #endif }
void genc_le_d(usf_state_t * state) { #ifdef INTERPRET_C_LE_D gencallinterp(state, (unsigned int)state->current_instruction_table.C_LE_D, 0); #else gencheck_cop1_unusable(state); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.ft])); fld_preg32_qword(state, EAX); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.fs])); fld_preg32_qword(state, EAX); fcomip_fpreg(state, 1); ffree_fpreg(state, 0); ja_rj(state, 12); // 2 or_m32_imm32(state, (unsigned int*)&state->FCR31, 0x800000); // 10 jmp_imm_short(state, 10); // 2 and_m32_imm32(state, (unsigned int*)&state->FCR31, ~0x800000); // 10 #endif }
void genc_le_s() { #ifdef INTERPRET_C_LE_S gencallinterp((u32)C_LE_S, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((u32 *)(®_cop1_simple[dst->f.cf.ft])); fld_preg32_dword(EAX); mov_eax_memoffs32((u32 *)(®_cop1_simple[dst->f.cf.fs])); fld_preg32_dword(EAX); fcomip_fpreg(1); ffree_fpreg(0); ja_rj(12); or_m32_imm32((u32*)&FCR31, 0x800000); /* 10 */ jmp_imm_short(10); /* 2 */ and_m32_imm32((u32*)&FCR31, ~0x800000); /* 10 */ #endif }
void genc_le_d() { #ifdef INTERPRET_C_LE_D gencallinterp((unsigned long)C_LE_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.ft])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); fcomip_fpreg(1); ffree_fpreg(0); ja_rj(12); // 2 or_m32_imm32((unsigned long*)&FCR31, 0x800000); // 10 jmp_imm_short(10); // 2 and_m32_imm32((unsigned long*)&FCR31, ~0x800000); // 10 #endif }
void genc_ole_s(void) { #ifdef INTERPRET_C_OLE_S gencallinterp((unsigned int)C_OLE_S, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned int *)(®_cop1_simple[dst->f.cf.ft])); fld_preg32_dword(EAX); mov_eax_memoffs32((unsigned int *)(®_cop1_simple[dst->f.cf.fs])); fld_preg32_dword(EAX); fucomip_fpreg(1); ffree_fpreg(0); ja_rj(12); or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10 jmp_imm_short(10); // 2 and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10 #endif }
void genc_le_s(void) { #if defined(COUNT_INSTR) inc_m32rel(&instr_count[118]); #endif #ifdef INTERPRET_C_LE_S gencallinterp((unsigned long long)cached_interpreter_table.C_LE_S, 0); #else gencheck_cop1_unusable(); mov_xreg64_m64rel(RAX, (unsigned long long *)(®_cop1_simple[dst->f.cf.ft])); fld_preg64_dword(RAX); mov_xreg64_m64rel(RAX, (unsigned long long *)(®_cop1_simple[dst->f.cf.fs])); fld_preg64_dword(RAX); fcomip_fpreg(1); ffree_fpreg(0); ja_rj(13); or_m32rel_imm32((unsigned int*)&FCR31, 0x800000); // 11 jmp_imm_short(11); // 2 and_m32rel_imm32((unsigned int*)&FCR31, ~0x800000); // 11 #endif }