bool lpc24xx_uart_probe_3(int minor)
{
static const lpc24xx_pin_range pins [] = {
LPC24XX_PIN_UART_3_TXD_P0_0,
LPC24XX_PIN_UART_3_RXD_P0_1,
LPC24XX_PIN_TERMINAL
};
lpc24xx_module_enable(LPC24XX_MODULE_UART_3, LPC24XX_MODULE_PCLK_DEFAULT);
lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
return true;
}
bool lpc24xx_uart_probe_1(rtems_termios_device_context *context)
{
static const lpc24xx_pin_range pins [] = {
LPC24XX_PIN_UART_1_TXD_P0_15,
LPC24XX_PIN_UART_1_RXD_P0_16,
LPC24XX_PIN_TERMINAL
};
lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_PCLK_DEFAULT);
lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
return ns16550_probe(context);
}
static void lpc24xx_rtc_initialize(int minor)
{
/* Enable module power */
lpc24xx_module_enable(LPC24XX_MODULE_RTC, LPC24XX_MODULE_PCLK_DEFAULT);
/* Enable the RTC and use external clock */
RTC_CCR = RTC_CCR_CLKEN | RTC_CCR_CLKSRC;
/* Disable interrupts */
RTC_CIIR = 0;
RTC_CISS = 0;
RTC_AMR = 0xff;
/* Clear interrupts */
RTC_ILR = RTC_ILR_RTCCIF | RTC_ILR_RTCALF | RTC_ILR_RTSSF;
}
void lpc24xx_dma_initialize(void)
{
/* Enable module power */
lpc24xx_module_enable(LPC24XX_MODULE_GPDMA, LPC24XX_MODULE_PCLK_DEFAULT);
/* Disable module */
GPDMA_CONFIG = 0;
/* Reset registers */
GPDMA_SOFT_SREQ = 0;
GPDMA_SOFT_BREQ = 0;
GPDMA_SOFT_LSREQ = 0;
GPDMA_SOFT_LBREQ = 0;
GPDMA_SYNC = 0;
GPDMA_CH0_CFG = 0;
GPDMA_CH1_CFG = 0;
/* Enable module */
#if BYTE_ORDER == LITTLE_ENDIAN
GPDMA_CONFIG = GPDMA_CONFIG_EN;
#else
GPDMA_CONFIG = GPDMA_CONFIG_EN | GPDMA_CONFIG_MODE;
#endif
}
static rtems_status_code lpc24xx_ssp_init(rtems_libi2c_bus_t *bus)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
rtems_interrupt_level level;
lpc24xx_ssp_bus_entry *e = (lpc24xx_ssp_bus_entry *) bus;
volatile lpc24xx_ssp *regs = e->regs;
unsigned pclk = lpc24xx_cclk();
unsigned pre =
((pclk + LPC24XX_SSP_BAUD_RATE - 1) / LPC24XX_SSP_BAUD_RATE + 1) & ~1U;
lpc24xx_module module = LPC24XX_MODULE_SSP_0;
rtems_vector_number vector = UINT32_MAX;
if (lpc24xx_ssp_dma_data.status == LPC24XX_SSP_DMA_NOT_INITIALIZED) {
lpc24xx_ssp_dma_status status = LPC24XX_SSP_DMA_INVALID;
/* Test and set DMA support status */
rtems_interrupt_disable(level);
status = lpc24xx_ssp_dma_data.status;
if (status == LPC24XX_SSP_DMA_NOT_INITIALIZED) {
lpc24xx_ssp_dma_data.status = LPC24XX_SSP_DMA_INITIALIZATION;
}
rtems_interrupt_enable(level);
if (status == LPC24XX_SSP_DMA_NOT_INITIALIZED) {
/* Install DMA interrupt handler */
sc = rtems_interrupt_handler_install(
LPC24XX_IRQ_DMA,
"SSP DMA",
RTEMS_INTERRUPT_SHARED,
lpc24xx_ssp_dma_handler,
&lpc24xx_ssp_dma_data
);
RTEMS_CHECK_SC(sc, "install DMA interrupt handler");
/* Set DMA support status */
lpc24xx_ssp_dma_data.status = LPC24XX_SSP_DMA_AVAILABLE;
}
}
/* Disable module */
regs->cr1 = 0;
switch ((uintptr_t) regs) {
case SSP0_BASE_ADDR:
module = LPC24XX_MODULE_SSP_0;
vector = LPC24XX_IRQ_SPI_SSP_0;
break;
case SSP1_BASE_ADDR:
module = LPC24XX_MODULE_SSP_1;
vector = LPC24XX_IRQ_SSP_1;
break;
default:
return RTEMS_IO_ERROR;
}
/* Set clock select */
sc = lpc24xx_module_enable(module, LPC24XX_MODULE_PCLK_DEFAULT);
RTEMS_CHECK_SC(sc, "enable module clock");
/* Set serial clock rate to save value */
regs->cr0 = SET_SSP_CR0_SCR(0, 255);
/* Set clock prescaler */
if (pre > 254) {
pre = 254;
} else if (pre < 2) {
pre = 2;
}
regs->cpsr = pre;
/* Save clock value */
e->clock = pclk / pre;
/* Enable module and loop back mode */
regs->cr1 = SSP_CR1_LBM | SSP_CR1_SSE;
/* Install interrupt handler */
sc = rtems_interrupt_handler_install(
vector,
"SSP",
RTEMS_INTERRUPT_UNIQUE,
lpc24xx_ssp_handler,
e
);
RTEMS_CHECK_SC(sc, "install interrupt handler");
/* Enable receiver overrun interrupts */
e->regs->imsc = SSP_IMSC_RORIM;
return RTEMS_SUCCESSFUL;
}
