//20101005 STAR_COUNTRY_KR Add [END_LGE_LAB1]
static void hook_det_work(struct work_struct *work)
{
int hok_adc_value =0;
if (headset_off) return;
if(headset_type != STAR_HEADSET)
return;
if(is_hook_test == false){
hok_adc_value = 20;
}
else{
lprintk(D_AUDIO, KERN_ERR "##(hook_det)## IS FACTORYMODE\n");
hok_adc_value = 65;
}
if(hook_status == HOOK_RELEASED){
#if HOOK_USE_ADC
hookkey_gpio_status = headset_get_hook_adc_average(5);
if( hookkey_gpio_status <= hok_adc_value )
{
hook_status = HOOK_PRESSED;
input_report_key(headset_sw_data->ip_dev, KEY_HOOK, 1);
input_sync(headset_sw_data->ip_dev);
lprintk(D_AUDIO, KERN_ERR "##(hook_det_work)## HOOK PRESSED ADC %d\n", hookkey_gpio_status);
}
#else
NvOdmGpioGetState(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Hookkey_Detection, &hookkey_gpio_status); // 20100419 for nVidia headset driver
if(hookkey_gpio_status == 0){
hook_status = HOOK_PRESSED;
input_report_key(headset_sw_data->ip_dev, KEY_HOOK, 1);
input_sync(headset_sw_data->ip_dev);
lprintk(D_AUDIO, KERN_ERR "##(hook_det_work)## HOOK PRESSED\n");
}
#endif
}
else{
#if HOOK_USE_ADC
hookkey_gpio_status = headset_get_hook_adc_value();
if(hookkey_gpio_status > hok_adc_value)
{
hook_status = HOOK_RELEASED;
input_report_key(headset_sw_data->ip_dev, KEY_HOOK, 0);
input_sync(headset_sw_data->ip_dev);
lprintk(D_AUDIO, KERN_ERR "##(hook_det_work)## HOOK RELEASED ADC %d\n", hookkey_gpio_status);
}
#else
NvOdmGpioGetState(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Hookkey_Detection, &hookkey_gpio_status); // 20100419 for nVidia headset driver
if(hookkey_gpio_status == 1){
hook_status = HOOK_RELEASED;
input_report_key(headset_sw_data->ip_dev, KEY_HOOK, 0);
input_sync(headset_sw_data->ip_dev);
lprintk(D_AUDIO, KERN_ERR "##(hook_det_work)## HOOK RELEASED\n");
}
#endif
}
}
//101106, [email protected], FOTA update [START] int fota_ebl_download(void) { static NvOdmServicesGpioHandle hCprom = NULL; static NvOdmGpioPinHandle hIFX_Reset = NULL; int ret; if(hCprom == NULL) { hCprom = NvOdmGpioOpen(); if (!hCprom) { lprintk(D_MUIC, "%s: NvOdmGpioOpen Error \n", __func__); goto error_open_gpio_fail; } } if(hIFX_Reset == NULL) { hIFX_Reset = NvOdmGpioAcquirePinHandle(hCprom, 'v' - 'a', 0); if (!hIFX_Reset) { lprintk(D_MUIC, "%s: Couldn't NvOdmGpioAcquirePinHandle pin \n", __func__); goto error_open_gpio_pin_acquire_fail; } } NvOdmGpioConfig(hCprom, hIFX_Reset, NvOdmGpioPinMode_Output); #if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, DISABLE); #endif NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_AP20_UART_SW, 0x0); NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_IFX_UART_SW, 0x0); //change USB path from AP to CP //Set_MAX14526_CP_USB_Mode(); NvOdmOsSleepMS(5000); //change TEST_GPIO state from low to high (GPIO_PV0) NvOdmGpioSetState(hCprom, hIFX_Reset, 0); NvOdmGpioGetState(hCprom, hIFX_Reset, &ret); lprintk(D_MUIC, "%s: hIFX_Reset is %d \n", __func__, ret); NvOdmOsSleepMS(10); NvOdmGpioSetState(hCprom, hIFX_Reset, 1); NvOdmGpioGetState(hCprom, hIFX_Reset, &ret); lprintk(D_MUIC, "%s: hIFX_Reset is %d \n", __func__, ret); return 0; error_open_gpio_pin_acquire_fail: NvOdmGpioClose(hCprom); error_open_gpio_fail: return -ENOSYS; }
void Set_MAX14526_Charger_Detect(NvU8 int_status_reg)
{
NvU8 reg_value;
printk("-->> MUIC : %s\n",__func__);
// charger type detection (0x02=0x02)
Set_MAX14526_ADDR(CTRL2_REG, CHG_TYPE_M);
// This line should be modified by a customer.
NvOdmOsSleepMS(250);
// Read INT_STAT_REG (0x04)
reg_value = Get_MAX14526_ADDR(INT_STAT_REG);
// Read STATUS_REG (0x05)
reg_value = Get_MAX14526_ADDR(STATUS_REG);
if (reg_value & CHPORT_M){
// High Current Host/Hub Detected
printk("MUIC : %s:%d CHPORT \n",__func__,__LINE__);
// Enable 200K, Charger Pump, and ADC (0x01=0x13)
Set_MAX14526_ADDR(CTRL1_REG, ID_200_M | ADC_EN_M | CP_EN_M);
// COMP2 to DP2 /COMN1 to DN1 (0x03=0x00)
Set_MAX14526_ADDR(SW_CTRL_REG, COMN1_TO_DN1 | COMP2_TO_DP2);
/* Enable charger IC in TA mode */
//20100526, [email protected], Enable charger IC in TA mode [START]
#if defined(CONFIG_STAR_BATTERY_CHARGER)
lprintk(D_MUIC, "%s: CHG_IC_TA_MODE(%d) \n", __func__, CHG_IC_TA_MODE);
charging_ic_active(CHG_IC_TA_MODE);
#endif /* CONFIG_STAR_BATTERY_CHARGER */
//20100526, [email protected], Enable charger IC in TA mode [END]
wake_lock(&s_hMuicHandle.wlock);
current_device = DEVICE_USB_CABLE;
}
else{
// Dedicated Charger(TA) Detected
printk("MUIC : %s:%d ELSE \n",__func__,__LINE__);
// COMP2 to H-Z /COMN1 to H-Z (0x03=0x24)
Set_MAX14526_ADDR(SW_CTRL_REG, COMP2_TO_HZ | COMN1_TO_HZ);
/* Enable charger IC in TA mode */
//20100526, [email protected], Enable charger IC in TA mode [START]
#if defined(CONFIG_STAR_BATTERY_CHARGER)
lprintk(D_MUIC, "%s: CHG_IC_TA_MODE(%d) \n", __func__, CHG_IC_TA_MODE);
charging_ic_active(CHG_IC_TA_MODE);
#endif /* CONFIG_STAR_BATTERY_CHARGER */
//20100526, [email protected], Enable charger IC in TA mode [END]
current_device = DEVICE_TA_CHARGER;
}
// Enable 200K, Charger Pump, and ADC (0x01=0x13)
Set_MAX14526_ADDR(CTRL1_REG, ID_200_M | ADC_EN_M | CP_EN_M);
// Enable Interrupts (0x02 = 0x40)
Set_MAX14526_ADDR(CTRL2_REG, INT_EN_M);
}
static ssize_t star_proxi_onoff_store(struct device *dev, struct device_attribute *attr, char *buf, size_t count)
{
u32 val = 0;
val = simple_strtoul(buf, NULL, 10);
if (val) {
lprintk(D_PROXI, "proximity on\n");
star_proxi_enable(&s_proximity);
} else {
lprintk(D_PROXI, "proximity off\n");
star_proxi_disable(&s_proximity);
}
return count;
}
static int headset_resume(struct platform_device *pdev)
{
//20101117, , gpio wakeup from LP1 [START]
if(core_lock_on && headset_vdd_address){
NvOdmServicesPmuSetVoltage(headset_h_pmu, headset_vdd_address, NVODM_VOLTAGE_OFF, NULL);
}
suspend_status = 0;
//20101117, , gpio wakeup from LP1 [END]
// 20110726 detecting headset when resuming [START]
star_Mic_bias(1);
headset_det_work(&headset_sw_data->work);
// 20110726 detecting headset when resuming [END]
if(core_lock_on){
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_resume()!! wakeup form LP1 headset detect\n");
input_report_key(headset_sw_data->ip_dev_wake, KEY_VOLUMEDOWN, 1);
input_sync(headset_sw_data->ip_dev_wake);
input_report_key(headset_sw_data->ip_dev_wake, KEY_VOLUMEDOWN, 0);
input_sync(headset_sw_data->ip_dev_wake);
schedule_delayed_work(&headset_sw_data->delayed_work, msecs_to_jiffies(300));
}
return 0;
}
static void headset_int_handler(void *dev_id)
{
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_int_handler()!!\n");
struct headset_switch_data *switch_data =
(struct headset_switch_data *)dev_id;
headset_detecting = 1;
cancel_delayed_work_sync(&switch_data->hook_delayed_work);
//schedule_work(&switch_data->work);
NvOdmGpioGetState(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Headset_Detection, &headset_gpio_status);
headset_status = headset_gpio_status;
if(headset_status == 0)
{
schedule_work(&headset_sw_data->delayed_work);
#if defined(STAR_COUNTRY_KR) && !defined(CONFIG_MACH_STAR_SKT_REV_A)
headset_Mic_Bias(0);
#endif
}
else
{
schedule_delayed_work(&headset_sw_data->delayed_work, msecs_to_jiffies(type_detection_time));
//P990_IFX_GB_PORTING_LGSI_START
#if !defined (STAR_OPERATOR_FIDO)
wake_lock_timeout(&headset_wake_lock, msecs_to_jiffies(type_detection_time + 50)); //20111017 [email protected] Problem that no wake up when disconn headset in calling
#endif
//P990_IFX_GB_PORTING_LGSI_END
}
NvOdmGpioInterruptDone(s_hHeadsetHandle.hheadsetInterrupt); //20100420 [email protected] for next interrupt (nVidia Interrupt Spec.) [LGE]
//FIDO - GB Porting [09/08/2011] - Start
#if defined (STAR_OPERATOR_FIDO)
wake_lock_timeout(&headset_wake_lock, msecs_to_jiffies(1500)); //20110427 [email protected] headset wake lock timeout
#endif
//FIDO - GB Porting [09/08/2011] - End
}
static NvBool star_proxi_write_reg(ProximityDevice* proximity, NvU8 reg, NvU8 val)
{
NvOdmI2cStatus Error;
NvOdmI2cTransactionInfo TransactionInfo;
NvU8 arr[2];
arr[0] = reg; // register address
arr[1] = val; // u16 value (lsb-msb)
TransactionInfo.Address = proximity->i2c_address;
TransactionInfo.Buf = arr;
TransactionInfo.Flags = NVODM_I2C_IS_WRITE;
TransactionInfo.NumBytes = 2;
do
{
Error = NvOdmI2cTransaction(proximity->gen2_i2c,
&TransactionInfo,
1,
400,
10);
} while (Error == NvOdmI2cStatus_Timeout);
if (Error != NvOdmI2cStatus_Success)
{
lprintk(D_PROXI,"I2C Write Failure = %d (addr=0x%x, reg=0x%x, val=0x%0x)\n", Error,
proximity->i2c_address, reg, val);
return NV_FALSE;
}
return NV_TRUE;
}
int max14526_muic_init(TYPE_RESET reset)
{
int ret;
/* clear default switch position */
// COMP2 to H-Z /COMN1 to H-Z (0x03=0x24)
ret= MUIC_Reg_Write(&s_hMuicHandle, SW_CTRL_REG, COMP2_TO_HZ|COMN1_TO_HZ);
// Enable 200K, ADC (0x01=0x12)
ret= MUIC_Reg_Write(&s_hMuicHandle, CTRL1_REG, ID_200_M|ADC_EN_M);
// Enable Interrupts (0x02 = 0x40)
ret= MUIC_Reg_Write(&s_hMuicHandle, CTRL2_REG, INT_EN_M);
DP3T_Switch_ctrl(DP3T_NC);
USIF_ctrl(USIF_IPC);
//20100526, [email protected], Charging IC Reset [START]
#if defined(CONFIG_STAR_BATTERY_CHARGER)
if ( !reset )
{
lprintk(D_MUIC, "%s: charging_ic_deactive call \n", __func__ );
charging_ic_deactive();
}
#endif /* CONFIG_STAR_BATTERY_CHARGER */
//20100526, [email protected], Charging IC Reset [END]
wake_unlock(&s_hMuicHandle.wlock);
current_device = DEVICE_NONE;
return ret;
}
static int headset_resume(struct platform_device *pdev)
{
//20101117, [email protected], gpio wakeup from LP1 [START]
if(core_lock_on && headset_vdd_address){
NvOdmServicesPmuSetVoltage(headset_h_pmu, headset_vdd_address, NVODM_VOLTAGE_OFF, NULL);
}
suspend_status = 0;
//20101117, [email protected], gpio wakeup from LP1 [END]
//[email protected] 20110726 detecting headset when resuming [START]
star_Mic_bias(1);
headset_det_work(&headset_sw_data->work);
//[email protected] 20110726 detecting headset when resuming [END]
if(core_lock_on){
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_resume()!! wakeup form LP1 headset detect\n");
input_report_key(headset_sw_data->ip_dev_wake, KEY_VOLUMEDOWN, 1);
input_sync(headset_sw_data->ip_dev_wake);
input_report_key(headset_sw_data->ip_dev_wake, KEY_VOLUMEDOWN, 0);
input_sync(headset_sw_data->ip_dev_wake);
//P990_IFX_GB_PORTING_LGSI_START
#if !defined (STAR_OPERATOR_FIDO)
cancel_delayed_work_sync(&headset_sw_data->delayed_work); //20111017 [email protected] Problem that no wake up when disconn headset in calling
#endif
//P990_IFX_GB_PORTING_LGSI_END
schedule_delayed_work(&headset_sw_data->delayed_work, msecs_to_jiffies(300));
}
return 0;
}
static void headset_int_handler(void *dev_id)
{
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_int_handler()!!\n");
struct headset_switch_data *switch_data =
(struct headset_switch_data *)dev_id;
headset_detecting = 1;
cancel_delayed_work_sync(&switch_data->hook_delayed_work);
//schedule_work(&switch_data->work);
NvOdmGpioGetState(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Headset_Detection, &headset_gpio_status);
headset_status = headset_gpio_status;
if(headset_status == 0)
{
schedule_work(&headset_sw_data->delayed_work);
#if defined(STAR_COUNTRY_KR) && !defined(CONFIG_MACH_STAR_SKT_REV_A)
headset_Mic_Bias(0);
#endif
}
else
{
schedule_delayed_work(&headset_sw_data->delayed_work, msecs_to_jiffies(type_detection_time));
}
NvOdmGpioInterruptDone(s_hHeadsetHandle.hheadsetInterrupt); //20100420 for next interrupt (nVidia Interrupt Spec.) [LGE]
}
void USIF_ctrl(USIF_MODE_TYPE mode)
{
if(mode == USIF_UART)
{
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USIF1_SW, 0x1);
lprintk(D_MUIC, "%s: USIF Switch is USIF_UART\n", __func__);
}
else if(mode == USIF_IPC)
{
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USIF1_SW, 0x0);
lprintk(D_MUIC, "%s: USIF Switch is USIF_IPC\n", __func__);
}
else
{
lprintk(D_MUIC, "%s: USIF Switch is USIF_NONE\n", __func__);
}
}
static void create_star_muic_proc_file(void)
{
star_muic_proc_file = create_proc_entry(STAR_MUIC_PROC_FILE, 0777, NULL);
if (star_muic_proc_file) {
star_muic_proc_file->proc_fops = &star_muic_proc_ops;
} else
lprintk(D_MUIC, KERN_INFO "%s: MUIC Proc file create failed!\n", __func__);
}
static ssize_t muic_proc_read (struct file *filp, char *buf, size_t len, loff_t *offset)
{
int i;
NvU8 val;
for (i=0; i <= 5; i++) {
MUIC_Reg_Read(&s_hMuicHandle, i, &val);
lprintk(D_MUIC, "%s: MUIC Reg 0x%X, Val=0x%X\n", __func__, i, val);
}
return 0;
}
static ssize_t switch_gpio_print_state(struct switch_dev *sdev, char *buf)
{
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## switch_gpio_print_state() => sdev->state(%d), headset_sw_data->state_on(%d)/state_off(%d)\n",sdev->state,headset_sw_data->state_on,headset_sw_data->state_off);
const char *state;
if (switch_get_state(sdev))
state = headset_sw_data->state_on;
else
state = headset_sw_data->state_off;
if (state)
return sprintf(buf, "%s\n", state);
return -1;
}
void DP3T_Switch_ctrl(DP3T_MODE_TYPE mode)
{
if(mode == DP3T_S1_AP) {
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, DISABLE);
#endif
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_AP20_UART_SW, 0x1);
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_IFX_UART_SW, 0x0);
lprintk(D_MUIC, "%s: DP3T Switch is S1_AP\n", __func__);
}
else if(mode == DP3T_S2_CP_SW) {
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, DISABLE);
#endif
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_AP20_UART_SW, 0x0);
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_IFX_UART_SW, 0x1);
lprintk(D_MUIC, "%s: DP3T Switch is CP_SW\n", __func__);
}
else if(mode == DP3T_S3_CP_USB) {
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, ENABLE);
#endif
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_AP20_UART_SW, 0x1);
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_IFX_UART_SW, 0x1);
lprintk(D_MUIC, "%s: DP3T Switch is CP_USB\n", __func__);
}
else if (mode == DP3T_NC) {
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, DISABLE);
#endif
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_AP20_UART_SW, 0x0);
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_IFX_UART_SW, 0x0);
lprintk(D_MUIC, "%s: DP3T Switch is NC \n", __func__);
}
// DP3T_mode = mode;
}
static int headsetdet_remove(struct platform_device *pdev)
{
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headsetdet_remove() : headset detection ended..!!\n"); //20100421 [email protected] [LGE]
struct headset_switch_data *switch_data = platform_get_drvdata(pdev);
//20101125, [email protected], hookkey press is skipped When wakeup from LP1 [START]
//wake_lock_destroy(&hook_det_lock);
//20101125, [email protected], hookkey press is skipped When wakeup from LP1 [END]
if (headset_h_pmu)
NvOdmServicesPmuClose(headset_h_pmu);
cancel_work_sync(&switch_data->work);
cancel_delayed_work_sync(&switch_data->delayed_work);
//P990_IFX_GB_PORTING_LGSI_START
//FIDO - GB Porting [09/08/2011] - Start
#if 1 //defined (STAR_OPERATOR_FIDO)
wake_lock_destroy(&headset_wake_lock); //20110425 [email protected] headset wake lock timeout
#endif
//FIDO - GB Porting [09/08/2011] - End
//P990_IFX_GB_PORTING_LGSI_END
/*====================== nVidia GPIO Control(S) =======================*/
NvOdmGpioInterruptUnregister(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Headset_Detection, s_hHeadsetHandle.hheadsetInterrupt);
NvOdmGpioInterruptUnregister(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Hookkey_Detection, s_hHeadsetHandle.hhookInterrupt); //20100421 [email protected] for Hookkey [LGE]
NvOdmGpioReleasePinHandle(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Headset_Detection);
NvOdmGpioReleasePinHandle(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Hookkey_Detection); //20100421 [email protected] for Hookkey [LGE]
NvOdmGpioClose(s_hHeadsetHandle.hGpio);
/*====================== nVidia GPIO Control(E) =======================*/
switch_dev_unregister(&switch_data->sdev);
input_unregister_device(switch_data->ip_dev); //20100421 [email protected] for Hookkey [LGE]
kfree(switch_data);
return 0;
}
static int headset_suspend(struct platform_device *pdev, pm_message_t state)
{
//20101117, [email protected], gpio wakeup from LP1 [START]
if(core_lock_on && headset_vdd_address){
NvOdmServicesPmuSetVoltage(headset_h_pmu, headset_vdd_address, headset_vdd_voltage, NULL);
}
suspend_status = 1;
//20101117, [email protected], gpio wakeup from LP1 [END]
if(core_lock_on == 0){
block_hook_int =1;
headset_type = STAR_NONE;
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_suspend()!! disable hook int\n");
}
cancel_delayed_work_sync(&headset_sw_data->delayed_work);
cancel_delayed_work_sync(&headset_sw_data->hook_delayed_work);
return 0;
}
NvU32 headset_get_hook_adc_average(int cnt)
{
NvU32 value =0;
NvU32 aver =0;
NvU32 i =0;
NvOdmServicesPmuHandle adc_pmu = NvOdmServicesPmuOpen();
for(i=0;i<cnt;i++){
value += NvOdmServicesPmuGetHookValue(adc_pmu);
}
if(cnt !=0 )
aver = value/cnt;
else
aver = value;
NvOdmServicesPmuClose(adc_pmu);
lprintk(D_AUDIO, KERN_ERR "##(hook_det_work)## headset_get_hook_adc_average ADC: %d\n", aver);
return aver;
}
static NvU8 star_read_vo_bit(ProximityDevice *data)
{
NvU8 vo = 0;
NvU32 pinvalue;
star_proxi_read_reg(&s_proximity, 0x00, &vo);
// vo = (vo & 0x01) ? 0 : 1;
if(vo & 0x01)
vo = 1;
else
vo = 0;
#if STAR_PROX_DEBUG
lprintk(D_PROXI, "star proxi out [%d]\n", vo);
NvOdmGpioGetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, &pinvalue);
printk("pin value = %d\n", pinvalue);
#endif
return vo;
}
void muic_initialize_max(TYPE_RESET reset)
{
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, DISABLE);
#endif
// Enable 200K, ADC (0x01=0x12)
Set_MAX14526_ADDR(CTRL1_REG, ID_200_M| ADC_EN_M);
// Enable Interrupts (0x02 = 0x40)
Set_MAX14526_ADDR(CTRL2_REG, INT_EN_M);
//20100526, [email protected], Charging IC Reset [START]
#if defined(CONFIG_STAR_BATTERY_CHARGER)
if ( !reset )
{
lprintk(D_MUIC, "%s: charging_ic_deactive call \n", __func__ );
charging_ic_deactive();
}
#endif /* CONFIG_STAR_BATTERY_CHARGER */
//20100526, [email protected], Charging IC Reset [END]
wake_unlock(&s_hMuicHandle.wlock);
}
static void headset_det_work(struct work_struct *work)
{
if (headset_off) return;
NvOdmGpioGetState(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Headset_Detection, &headset_gpio_status); //20100419 [email protected] for nVidia headset driver [LGE]
headset_status = headset_gpio_status;
lprintk(D_AUDIO, KERN_ERR "@@(Headset_det.c)@@ headset_det_work(), headset_status = %d\n",headset_status);
if(headset_status == 0)
{
schedule_delayed_work(&headset_sw_data->delayed_work, msecs_to_jiffies(remove_detection_time));
#if defined(STAR_COUNTRY_KR) && !defined(CONFIG_MACH_STAR_SKT_REV_A)
headset_Mic_Bias(0);
#endif
}
else
{
schedule_delayed_work(&headset_sw_data->delayed_work, msecs_to_jiffies(type_detection_time));
}
}
void Set_MAX14526_Usb_Mode_Detect(void)
{
printk("-->> MUIC : %s \n",__func__);
USIF_ctrl(USIF_IPC);
DP3T_Switch_ctrl(DP3T_NC);
// Enable 200K, Charger Pump, and ADC (0x01=0x13)
Set_MAX14526_ADDR(CTRL1_REG, ID_200_M | ADC_EN_M | CP_EN_M);
// COMP2 to DP2 /COMN1 to DN1 (0x03=0x00)
Set_MAX14526_ADDR(SW_CTRL_REG, COMP2_TO_DP2 | COMN1_TO_DN1);
/* Turn on charger IC with Standard USB mode */
//20100526, [email protected], Turn on charger IC with Standard USB mode [START]
#if defined(CONFIG_STAR_BATTERY_CHARGER)
lprintk(D_MUIC, "%s: CHG_IC_DEFAULT_MODE(%d) \n", __func__, CHG_IC_DEFAULT_MODE);
charging_ic_active(CHG_IC_DEFAULT_MODE);
#endif /* CONFIG_STAR_BATTERY_CHARGER */
//20100526, [email protected], Turn on charger IC with Standard USB mode [END]
wake_lock(&s_hMuicHandle.wlock);
current_device = DEVICE_USB_CABLE;
}
static void headset_hook_int_handler(void *dev_id)
{
//lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_hook_int_handler()!! detecting %d headset type %d\n", headset_detecting, headset_type );
NvOdmGpioGetState(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Hookkey_Detection, &hook_gpio);
if( block_hook_int ){
NvOdmGpioInterruptDone(s_hHeadsetHandle.hhookInterrupt);
return;
}
struct headset_switch_data *switch_data =
(struct headset_switch_data *)dev_id;
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_hook_int_handler()!! detecting %d headset type %d\n", headset_detecting, headset_type );
if( (headset_detecting == 1) || (headset_type != STAR_HEADSET)){
NvOdmGpioInterruptDone(s_hHeadsetHandle.hhookInterrupt);
}
else{
//lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headset_hook_int_handler()!!\n");
//20101125, [email protected], hookkey press is skipped When wakeup from LP1 [START]
if(suspend_status){
schedule_work(&switch_data->hook_delayed_work);
}else{
//20101125, [email protected], hookkey press is skipped When wakeup from LP1 [END]
if(hook_gpio){
schedule_delayed_work(&switch_data->hook_delayed_work, msecs_to_jiffies(hook_release_time));
}
else{
schedule_delayed_work(&switch_data->hook_delayed_work, msecs_to_jiffies(hook_press_time));
}
}
NvOdmGpioInterruptDone(s_hHeadsetHandle.hhookInterrupt);
}
}
static int headsetdet_remove(struct platform_device *pdev)
{
lprintk(D_AUDIO, KERN_ERR "##(Headset_det.c)## headsetdet_remove() : headset detection ended..!!\n"); //20100421 [LGE]
struct headset_switch_data *switch_data = platform_get_drvdata(pdev);
//20101125, , hookkey press is skipped When wakeup from LP1 [START]
//wake_lock_destroy(&hook_det_lock);
//20101125, , hookkey press is skipped When wakeup from LP1 [END]
if (headset_h_pmu)
NvOdmServicesPmuClose(headset_h_pmu);
cancel_work_sync(&switch_data->work);
cancel_delayed_work_sync(&switch_data->delayed_work);
/*====================== nVidia GPIO Control(S) =======================*/
NvOdmGpioInterruptUnregister(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Headset_Detection, s_hHeadsetHandle.hheadsetInterrupt);
NvOdmGpioInterruptUnregister(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Hookkey_Detection, s_hHeadsetHandle.hhookInterrupt); //20100421 for Hookkey [LGE]
NvOdmGpioReleasePinHandle(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Headset_Detection);
NvOdmGpioReleasePinHandle(s_hHeadsetHandle.hGpio, s_hHeadsetHandle.h_Hookkey_Detection); //20100421 for Hookkey [LGE]
NvOdmGpioClose(s_hHeadsetHandle.hGpio);
/*====================== nVidia GPIO Control(E) =======================*/
switch_dev_unregister(&switch_data->sdev);
input_unregister_device(switch_data->ip_dev); //20100421 for Hookkey [LGE]
kfree(switch_data);
return 0;
}
static NvBool star_proxi_read_reg(ProximityDevice* proximity, NvU8 reg, NvU8 *val)
{
NvU8 reg_buff = 0, ReadBuffer[2];
NvOdmI2cStatus status = NvOdmI2cStatus_Success;
NvOdmI2cTransactionInfo TransactionInfo[2];
reg_buff = reg & 0xFF;
TransactionInfo[0].Address = (proximity->i2c_address);
TransactionInfo[0].Buf = ®_buff;
TransactionInfo[0].Flags = NVODM_I2C_IS_WRITE;
TransactionInfo[0].NumBytes = 1;
TransactionInfo[1].Address = (proximity->i2c_address|0x1);
TransactionInfo[1].Buf = &ReadBuffer;
TransactionInfo[1].Flags = 0;
TransactionInfo[1].NumBytes = 2;
do
{
status = NvOdmI2cTransaction(proximity->gen2_i2c, TransactionInfo, 2, 400, 10);
} while(status == NvOdmI2cStatus_Timeout);
if (status != NvOdmI2cStatus_Success)
{
lprintk(D_PROXI, "I2C Read Failure = %d (addr=0x%x, reg=0x%x, val=0x%x)\n", status,
proximity->i2c_address, reg, *val);
return NV_FALSE;
}
*val = ReadBuffer[1];
return NV_TRUE;
}
void Set_MAX14526_Device_None_Detect(NvU8 int_status_reg)
{
NvU8 reg_value;
// IDNO=0100? 130Kohm :: CP UART MODE
if((int_status_reg & IDNO_M) == IDNO_0100)
Set_MAX14526_Factory_Mode_Detect();
// IDNO=0010? 56Kohm :: CP USB MODE
else if ((int_status_reg &IDNO_M )==IDNO_0010)
Set_MAX14526_CP_USB_Mode();
// IDNO=0010? 910Kohm :: CP USB MODE
else if ((int_status_reg &IDNO_M )==IDNO_1010)
Set_MAX14526_CP_USB_Mode();
// CHGDET=1? :: HIGH CURRENT USB or TA?
else if (int_status_reg & CHGDET_M)
{
Set_MAX14526_Charger_Detect(int_status_reg);
}
// VBUS=1? :: TA or AP USB?
else if (int_status_reg & VBUS_M){
// COMP2 to H-Z / COMN1 to C1COMP (0x03=0x23)
Set_MAX14526_ADDR(SW_CTRL_REG, COMP2_TO_HZ | COMN1_TO_C1COMP);
NvOdmOsSleepMS(200) ;
// Read STATUS_REG (0x05)
reg_value = Get_MAX14526_ADDR(STATUS_REG);
if (reg_value & C1COMP_M){
// Dedicated Charger(TA) Detected
// COMP2 to H-Z / COMN1 to H-Z (0x03=0x24)
Set_MAX14526_ADDR(SW_CTRL_REG, COMP2_TO_HZ | COMN1_TO_HZ);
//20100526, [email protected], Enable charger IC in TA mode [START]
#if defined(CONFIG_STAR_BATTERY_CHARGER)
lprintk(D_MUIC, "%s: CHG_IC_TA_MODE(%d) \n", __func__, CHG_IC_TA_MODE);
charging_ic_active(CHG_IC_TA_MODE);
#endif /* CONFIG_STAR_BATTERY_CHARGER */
//20100526, [email protected], Enable charger IC in TA mode [END]
current_device = DEVICE_TA_CHARGER;
printk("-->> MUIC : %s : DEVICE_TA_CHARGER \n",__func__);
}
else
{
// USB Detected
Set_MAX14526_Usb_Mode_Detect();
//20101117, [email protected], for autorun
#ifdef CONFIG_USB_SUPPORT_LGE_ANDROID_AUTORUN
switch_set_state(&s_hMuicHandle.sdev_autorun, 1);
#endif
}
}
else
{
// Accessory Not Supported
current_device = DEVICE_NONE;
muic_initialize_max(DEFAULT);
}
}
void MAX14526_Device_Detection(void)
{
NvU8 reg_value;
//20101002, [email protected], keep CP USB state after rebooting [START]
if(DEVICE_CP_USB_CABLE == boot_muic_state)
{
lprintk(D_MUIC, "CP Retain mode. \n");
// Read INT_STAT_REG (0x04)
reg_value = Get_MAX14526_ADDR(INT_STAT_REG);
lprintk(D_MUIC, "***********************************************\n");
lprintk(D_MUIC, "%s: 1231 MUIC int_state 0x%2x : current_device : %d \n", __func__, reg_value, current_device);
lprintk(D_MUIC, "***********************************************\n");
// CP USB Mode
if (reg_value & VBUS_M){
Set_MAX14526_CP_USB_Mode();
lprintk(D_MUIC, "CP Retain mode CP USB Setting. \n");
}
else {
// Exit CP USB Mode
max14526_muic_init(DEFAULT);
lprintk(D_MUIC, "CP Retain mode MUIC Init. \n");
}
return;
}
//20101002, [email protected], keep CP USB state after rebooting [END]
// Read INT_STAT_REG (0x04)
reg_value = Get_MAX14526_ADDR(INT_STAT_REG);
lprintk(D_MUIC, "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n");
lprintk(D_MUIC, "%s: 1231 MUIC int_state 0x%2x : current_device : %d \n", __func__, reg_value, current_device);
lprintk(D_MUIC, "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n");
switch (current_device)
{
case DEVICE_NONE:
case DEVICE_USB_OTG:
Set_MAX14526_Device_None_Detect(reg_value);
break;
// CP UART Mode
case DEVICE_UART_CABLE:
if ((reg_value & VBUS_M) == 0) {
// Exit CP UART Mode
max14526_muic_init(DEFAULT);
}
else {
Set_MAX14526_Device_None_Detect(reg_value);
}
break;
// TA Mode
case DEVICE_TA_CHARGER:
if ((reg_value & VBUS_M) == 0){
// Exit Charger Mode
max14526_muic_init(DEFAULT);
}
else {
Set_MAX14526_Device_None_Detect(reg_value);
}
break;
// AP UART Mode
case DEVICE_FACTORY_USB_CABLE:
if ((reg_value & VBUS_M) == 0) {
// Exit AP UART Mode
max14526_muic_init(DEFAULT);
}
else{
Set_MAX14526_Device_None_Detect(reg_value);
}
break;
// AP USB Mode
case DEVICE_USB_CABLE:
if ((reg_value & VBUS_M) == 0){
// Exit AP USB Mode
max14526_muic_init(DEFAULT);
//20101117, [email protected], for autorun
#ifdef CONFIG_USB_SUPPORT_LGE_ANDROID_AUTORUN
switch_set_state(&s_hMuicHandle.sdev_autorun, 0);
#endif
}
else{
Set_MAX14526_Device_None_Detect(reg_value);
}
break;
// CP USB Mode
case DEVICE_CP_USB_CABLE:
if ((reg_value & VBUS_M) == 0){
// Exit CP USB Mode
max14526_muic_init(DEFAULT);
}
else{
Set_MAX14526_Device_None_Detect(reg_value);
}
break;
// TA Mode
case DEVICE_LG_PROP_TA :
if ((reg_value & CHGDET_M) == 0) {
// Exit Charger Mode
max14526_muic_init(DEFAULT);
}
else {
Set_MAX14526_Device_None_Detect(reg_value);
}
break;
default:
current_device = DEVICE_NONE;
break;
}
}
static int __init proximity_probe(struct platform_device *pdev)
{
int i, ret = 0;
NvU32 I2cInstance = 0;
const NvOdmPeripheralConnectivity *pConnectivity = NULL;
NvU32 port = 0, pin = 0;
struct device *dev = &pdev->dev;
unsigned int pinvalue;
atomic_set(&proxi_status, 1);
pConnectivity = NvOdmPeripheralGetGuid(PROXIMITY_GUID);
for (i = 0; i < pConnectivity->NumAddress; i++)
{
switch (pConnectivity->AddressList[i].Interface)
{
case NvOdmIoModule_I2c:
s_proximity.i2c_address = (pConnectivity->AddressList[i].Address << 1);
I2cInstance = pConnectivity->AddressList[i].Instance;
break;
case NvOdmIoModule_Gpio:
port = pConnectivity->AddressList[i].Instance;
pin = pConnectivity->AddressList[i].Address;
break;
case NvOdmIoModule_Vdd:
s_proximity.vddId = pConnectivity->AddressList[i].Address;
break;
default:
break;
}
}
s_proximity.MVO = 0;
#if defined(CONFIG_MACH_STAR_MDM_C)
port = 'r' - 'a';//'a' - 'a';
pin = 2;//0;
#elif defined (CONFIG_MACH_STAR_REV_F) || defined (CONFIG_MACH_STAR_TMUS)
port = 'w'-'a';
pin = 2;
#else
#error PROXI_OUT PIN not assigned
#endif
lprintk(D_PROXI, "[star Proximity] start!!!--------------------------------------------------------------------------\n");
s_proximity.proxi_out_gpio = NvOdmGpioOpen();
if (!s_proximity.proxi_out_gpio)
{
lprintk(D_PROXI, "[star Proximity] gpio open fail!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n");
ret = -ENOSYS;
goto err_open_gpio_fail;
}
s_proximity.proxi_out_gpio_pin = NvOdmGpioAcquirePinHandle(s_proximity.proxi_out_gpio, port, pin);
if (!s_proximity.proxi_out_gpio_pin)
{
lprintk(D_PROXI, "[star Proximity] gpio pin acquire fail!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n");
ret = -ENOSYS;
goto err_open_gpio_pin_acquire_fail;
}
// NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x1);
// NvOdmGpioConfig(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, NvOdmGpioPinMode_InputData);
#if 1
INIT_WORK(&s_proximity.work, star_proxi_workqueue_func);
s_proximity.gen2_i2c = NvOdmI2cPinMuxOpen(NvOdmIoModule_I2c, 1, NvOdmI2cPinMap_Config2);
if (!s_proximity.gen2_i2c)
{
lprintk(D_PROXI, "[star Proximity] i2c open fail!\n");
ret = -ENOSYS;
goto err_open_i2c_handle_fail;
}
s_proximity.use_int_mode = true;
#if 0
NvOdmGpioConfig(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, NvOdmGpioPinMode_Output);
NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x1);
NvOdmOsWaitUS(100000);//100ms
NvOdmGpioGetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, &pinvalue);
printk("interrupt pin level = %d\n----------------", pinvalue );
NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x0);
NvOdmOsWaitUS(100000);//100ms
NvOdmGpioGetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, &pinvalue);
printk("interrupt pin level = %d\n----------------", pinvalue );
NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x1);
NvOdmOsWaitUS(100000);//100ms
NvOdmGpioGetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, &pinvalue);
printk("interrupt pin level = %d\n----------------", pinvalue );
NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x0);
NvOdmOsWaitUS(100000);//100ms
NvOdmGpioGetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, &pinvalue);
printk("interrupt pin level = %d\n----------------", pinvalue );
NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x1);
NvOdmOsWaitUS(100000);//100ms
NvOdmGpioGetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, &pinvalue);
printk("interrupt pin level = %d\n----------------", pinvalue );
#endif
#if 0
while(1)
{
NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x1);
NvOdmOsWaitUS(100000);//100ms
NvOdmGpioSetState(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, 0x0);
NvOdmOsWaitUS(100000);//100ms
}
#endif
NvOdmGpioConfig(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin, NvOdmGpioPinMode_InputData);
if (s_proximity.use_int_mode == true) {
if (NvOdmGpioInterruptRegister(s_proximity.proxi_out_gpio, &s_proximity.proxi_out_intr,
s_proximity.proxi_out_gpio_pin, NvOdmGpioPinMode_InputInterruptLow, star_proxi_interrupt_handler, (void*)&s_proximity, 0) == NV_FALSE)
{
lprintk(D_PROXI, "[star Proximity] interrupt register fail!\n");
ret = -ENOSYS;
goto err_open_irq_handle_fail;
}
} else {
if (NvOdmGpioInterruptRegister(s_proximity.proxi_out_gpio, &s_proximity.proxi_out_intr,
s_proximity.proxi_out_gpio_pin, NvOdmGpioPinMode_InputInterruptFallingEdge, star_proxi_sleep_handler, (void*)&s_proximity, 0) == NV_FALSE)
{
lprintk(D_PROXI, "[star Proximity] interrupt register fail!\n");
ret = -ENOSYS;
goto err_open_irq_handle_fail;
}
hrtimer_init(&s_proximity.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
s_proximity.timer.function = star_proxi_timer_func;
s_proximity.delay = PROXI_DEFAULT_DELAY_NS;
}
NvOdmGpioInterruptMask(s_proximity.proxi_out_intr, NV_TRUE);
s_proximity.input_dev = input_allocate_device();
if (!s_proximity.input_dev) {
lprintk(D_PROXI, "[star Proximity] input device alloc fail!\n");
ret = -ENOMEM;
goto err_alloc_input_device_fail;
}
set_bit(EV_KEY, s_proximity.input_dev->evbit);
set_bit(KEY_POWER, s_proximity.input_dev->keybit);
set_bit(EV_ABS, s_proximity.input_dev->evbit);
input_set_abs_params(s_proximity.input_dev, ABS_DISTANCE, 0, 1, 0, 0);
s_proximity.input_dev->name = "proximity";
ret = input_register_device(s_proximity.input_dev);
if (ret) {
lprintk(D_PROXI, "[star Proximity] input device register fail!\n");
ret = -ENOMEM;
goto err_alloc_input_device_fail;
}
if ((ret = sysfs_create_group(&dev->kobj, &star_proxi_group))) {
lprintk(D_PROXI, "[star Proximity] sysfs_create_group fail!\n");
ret = -ENOMEM;
goto err_sysfs_group_fail;
}
// star_proxi_power_onoff(&s_proximity, true);
return 0;
err_sysfs_group_fail:
input_unregister_device(s_proximity.input_dev);
err_alloc_input_device_fail:
NvOdmGpioInterruptUnregister(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin,
s_proximity.proxi_out_intr);
err_open_irq_handle_fail:
NvOdmI2cClose(s_proximity.gen2_i2c);
err_open_i2c_handle_fail:
NvOdmGpioReleasePinHandle(s_proximity.proxi_out_gpio, s_proximity.proxi_out_gpio_pin);
err_open_gpio_pin_acquire_fail:
NvOdmGpioClose(s_proximity.proxi_out_gpio);
err_open_gpio_fail:
return ret;
#endif
}
static int __init muic_probe(struct platform_device *pdev)
{
int i, j, ret;
#ifdef _MUIC_GPIO_I2C_
int ret_val;
#else
NvU32 I2cInstance = 0;
#endif
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvU32 pin[5], port[5];
#else
NvU32 pin[4], port[4];
#endif
const NvOdmPeripheralConnectivity *pConnectivity = NULL;
printk(KERN_INFO "muic_probe\n");
pConnectivity = NvOdmPeripheralGetGuid(MUIC_GUID);
for (i = 0, j = 0 ; i < pConnectivity->NumAddress; i++)
{
switch (pConnectivity->AddressList[i].Interface)
{
#ifndef _MUIC_GPIO_I2C_
case NvOdmIoModule_I2c:
s_hMuicHandle.DeviceAddr = (pConnectivity->AddressList[i].Address << 1);
I2cInstance = pConnectivity->AddressList[i].Instance;
break;
#endif
case NvOdmIoModule_Gpio:
port[j] = pConnectivity->AddressList[i].Instance;
pin[j] = pConnectivity->AddressList[i].Address;
j++;
break;
default:
break;
}
}
s_hMuicHandle.hGpio = NvOdmGpioOpen();
if (!s_hMuicHandle.hGpio)
{
lprintk(D_MUIC, "%s: NvOdmGpioOpen Error \n", __func__);
goto err_open_gpio_fail;
}
s_hMuicHandle.h_INT_N_MUIC = NvOdmGpioAcquirePinHandle(s_hMuicHandle.hGpio, port[0], pin[0]);
if (!s_hMuicHandle.h_INT_N_MUIC)
{
lprintk(D_MUIC, "%s: Couldn't NvOdmGpioAcquirePinHandle pin \n", __func__);
goto err_open_gpio_pin_acquire_fail;
}
s_hMuicHandle.h_AP20_UART_SW = NvOdmGpioAcquirePinHandle(s_hMuicHandle.hGpio, port[1], pin[1]);
if (!s_hMuicHandle.h_AP20_UART_SW)
{
lprintk(D_MUIC, "%s:Couldn't NvOdmGpioAcquirePinHandle pin \n", __func__);
goto err_open_gpio_pin_acquire_fail;
}
s_hMuicHandle.h_IFX_UART_SW = NvOdmGpioAcquirePinHandle(s_hMuicHandle.hGpio, port[2], pin[2]);
if (!s_hMuicHandle.h_IFX_UART_SW)
{
lprintk(D_MUIC, "%s:Couldn't NvOdmGpioAcquirePinHandle pin \n", __func__);
goto err_open_gpio_pin_acquire_fail;
}
s_hMuicHandle.h_USIF1_SW = NvOdmGpioAcquirePinHandle(s_hMuicHandle.hGpio, port[3], pin[3]);
if (!s_hMuicHandle.h_USIF1_SW)
{
lprintk(D_MUIC, "%s: Couldn't NvOdmGpioAcquirePinHandle pin \n", __func__);
goto err_open_gpio_pin_acquire_fail;
}
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
s_hMuicHandle.h_USB_VBUS_EN = NvOdmGpioAcquirePinHandle(s_hMuicHandle.hGpio, port[4], pin[4]);
if (!s_hMuicHandle.h_USB_VBUS_EN)
{
lprintk(D_MUIC, "%s: Couldn't NvOdmGpioAcquirePinHandle pin \n", __func__);
goto err_open_gpio_pin_acquire_fail;
}
#endif
NvOdmGpioConfig(s_hMuicHandle.hGpio, s_hMuicHandle.h_INT_N_MUIC, NvOdmGpioPinMode_InputData);
NvOdmGpioConfig(s_hMuicHandle.hGpio, s_hMuicHandle.h_AP20_UART_SW, NvOdmGpioPinMode_Output);
NvOdmGpioConfig(s_hMuicHandle.hGpio, s_hMuicHandle.h_IFX_UART_SW, NvOdmGpioPinMode_Output);
NvOdmGpioConfig(s_hMuicHandle.hGpio, s_hMuicHandle.h_USIF1_SW, NvOdmGpioPinMode_Output);
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvOdmGpioConfig(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, NvOdmGpioPinMode_Output);
#endif
#ifdef _MUIC_GPIO_I2C_
ret_val = MUIC_Gpio_i2c_init(&s_hMuicHandle);
if (ret_val < 0)
{
lprintk(D_MUIC, "%s: MUIC_Gpio_i2c_init Error \n", __func__);
goto err_open_i2c_handle;
}
#else
s_hMuicHandle.hOdmI2c = NvOdmI2cOpen(NvOdmIoModule_I2c, I2cInstance);
if (!s_hMuicHandle.hOdmI2c)
{
lprintk(D_MUIC, "%s: NvOdmI2cOpen Error \n", __func__);
goto err_open_i2c_handle;
}
#endif
wake_lock_init(&s_hMuicHandle.wlock, WAKE_LOCK_SUSPEND, "muic_active");
//20101117, [email protected], for autorun [START]
#ifdef CONFIG_USB_SUPPORT_LGE_ANDROID_AUTORUN
s_hMuicHandle.sdev_autorun.name = DRIVER_NAME_FOR_AUTORUN;
s_hMuicHandle.sdev_autorun.print_name = print_switch_name_for_autorun;
s_hMuicHandle.sdev_autorun.print_state = print_switch_state_for_autorun;
ret = switch_dev_register(&s_hMuicHandle.sdev_autorun);
if (ret) {
goto err_sdev_unregister;
}
#endif
//20101117, [email protected], for autorun [END]
INIT_DELAYED_WORK(&muic_wq, muic_wq_func);
if (NvOdmGpioInterruptRegister(s_hMuicHandle.hGpio, &s_hMuicHandle.hGpioInterrupt,
s_hMuicHandle.h_INT_N_MUIC, NvOdmGpioPinMode_InputInterruptFallingEdge , muic_interrupt_handler,
(void*)&s_hMuicHandle, 0) == NV_FALSE)
{
lprintk(D_MUIC, KERN_ERR "%s: cannot register interrupt.\n", __func__);
goto err_get_interrupt_handler;
}
create_star_muic_proc_file();
current_device = DEVICE_NONE;
muic_initialize_max(RESET);
//20100915, [email protected], move to late_initcall [START]
#if 0
NvOdmOsSleepMS(400) ;
MAX14526_Device_Detection();
#endif
//20100915, [email protected], move to late_initcall [STOP]
return 0;
err_get_interrupt_handler:
#ifndef _MUIC_GPIO_I2C_
NvOdmI2cClose(s_hMuicHandle.hOdmI2c);
#endif
//20101117, [email protected], for autorun [START]
#ifdef CONFIG_USB_SUPPORT_LGE_ANDROID_AUTORUN
err_sdev_unregister:
switch_dev_unregister(&s_hMuicHandle.sdev_autorun);
#endif
//20101117, [email protected], for autorun [END]
err_open_i2c_handle:
NvOdmGpioReleasePinHandle(s_hMuicHandle.hGpio, s_hMuicHandle.h_INT_N_MUIC);
NvOdmGpioReleasePinHandle(s_hMuicHandle.hGpio, s_hMuicHandle.h_AP20_UART_SW);
NvOdmGpioReleasePinHandle(s_hMuicHandle.hGpio, s_hMuicHandle.h_IFX_UART_SW);
NvOdmGpioReleasePinHandle(s_hMuicHandle.hGpio, s_hMuicHandle.h_USIF1_SW);
#if defined(CONFIG_MACH_STAR_REV_D) || defined(CONFIG_MACH_STAR_REV_E) || defined(CONFIG_MACH_STAR_REV_F)
NvOdmGpioReleasePinHandle(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN);
#endif
err_open_gpio_pin_acquire_fail:
NvOdmGpioClose(s_hMuicHandle.hGpio);
err_open_gpio_fail:
return -ENOSYS;
}
static ssize_t muic_proc_write (struct file *filp, const char *buf, size_t len, loff_t *off)
{
char messages[10];
NvU32 reg, val;
int err;
char cmd;
if (len > 12)
len = 12;
if (copy_from_user(messages, buf, len))
return -EFAULT;
sscanf(buf, "%c 0x%x 0x%x", &cmd, ®, &val);
lprintk(D_MUIC, "%s: MUIC_proc_write \n", __func__);
printk("-->>MUIC : buf : %s\n",buf);
printk("-->>MUIC : %s %c 0x%x 0x%x \n",__func__, cmd, reg, val);
switch(cmd){
case '3':
/* CP_Image Download mode*/
cp_Image_download();
break;
case '4':
/* CP_ USB VBUS DISABLE*/
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, DISABLE);
break;
case '5':
/* CP USB VBUS ENABLE*/
NvOdmGpioSetState(s_hMuicHandle.hGpio, s_hMuicHandle.h_USB_VBUS_EN, ENABLE);
break;
/* AP_UART mode*/
case '6':
Set_MAX14526_Develop_Mode_Detect();
break;
/* CP_UART mode*/
case '7':
Set_MAX14526_Factory_Mode_Detect();
break;
/* AP_USB mode*/
case '8':
Set_MAX14526_Usb_Mode_Detect();
break;
/* CP_USB mode*/
case '9':
Set_MAX14526_CP_USB_Mode();
break;
case 'w':
err = MUIC_Reg_Write(&s_hMuicHandle, (NvU8)reg, (NvU8)val);
lprintk(D_MUIC, "%s: MUIC Write Reg. = 0x%X, Value 0x%X\n", __func__, reg, val);
break;
default :
printk(KERN_INFO "[MUIC] LGE: Star MUIC invalid command\n");
printk(KERN_INFO "[MUIC] 6: AP_UART, 7: CP_UART, 8: AP_USB, 9: CP_USB\n");
printk(KERN_INFO "[MUIC] or \"w address value\"\n");
break;
}
return len;
}