/**
* gelic_net_kick_txdma - enables TX DMA processing
* @card: card structure
* @descr: descriptor address to enable TX processing at
*
*/
static int gelic_net_kick_txdma(struct gelic_net_card *card,
struct gelic_net_descr *descr)
{
int status = 0;
int count = 10;
if (card->tx_dma_progress)
return 0;
if (gelic_net_get_descr_status(descr) == GELIC_NET_DESCR_CARDOWNED) {
card->tx_dma_progress = 1;
/* sometimes we need retry here */
while (count--) {
status = lv1_net_start_tx_dma(bus_id(card),
dev_id(card),
descr->bus_addr, 0);
if (!status)
break;
}
if (!count)
dev_info(ctodev(card), "lv1_net_start_txdma failed," \
"status=%d %#lx\n",
status, card->irq_status);
}
return status;
}
static void gelic_sendbuf(int msgsize)
{
u16 *p;
u32 sum;
int i;
dbg.descr.buf_size = header_size + msgsize;
h_ip->total_length = msgsize + sizeof(struct udphdr) +
sizeof(struct iphdr);
h_udp->len = msgsize + sizeof(struct udphdr);
h_ip->checksum = 0;
sum = 0;
p = (u16 *)h_ip;
for (i = 0; i < 5; i++)
sum += *p++;
h_ip->checksum = ~(sum + (sum >> 16));
dbg.descr.dmac_cmd_status = GELIC_DESCR_DMA_CMD_NO_CHKSUM |
GELIC_DESCR_TX_DMA_FRAME_TAIL;
dbg.descr.result_size = 0;
dbg.descr.data_status = 0;
wmb();
lv1_net_start_tx_dma(GELIC_BUS_ID, GELIC_DEVICE_ID, bus_addr, 0);
while ((dbg.descr.dmac_cmd_status & GELIC_DESCR_DMA_STAT_MASK) ==
GELIC_DESCR_DMA_CARDOWNED)
cpu_relax();
}
s64 debug_print(const char* buffer, size_t msgsize)
{
if (msgsize > MAX_MESSAGE_SIZE)
msgsize = MAX_MESSAGE_SIZE;
if (buffer)
memcpy(pmsg, buffer, msgsize);
dbg->descr.buf_size = header_size + msgsize;
h_ip->total_length = msgsize + sizeof(struct udphdr) + sizeof(struct iphdr);
h_udp->len = msgsize + sizeof(struct udphdr);
h_ip->checksum = 0;
u32 sum = 0;
u16 *p = (u16*)h_ip;
int i;
for (i=0; i<5; i++)
sum += *p++;
h_ip->checksum = ~(sum + (sum>>16));
dbg->descr.dmac_cmd_status = GELIC_DESCR_DMA_CMD_NO_CHKSUM | GELIC_DESCR_TX_DMA_FRAME_TAIL;
dbg->descr.result_size = 0;
dbg->descr.data_status = 0;
s64 ret = lv1_net_start_tx_dma(bus_id, dev_id, bus_addr, 0);
if (ret)
return ret;
while ((dbg->descr.dmac_cmd_status & GELIC_DESCR_DMA_STAT_MASK) == GELIC_DESCR_DMA_CARDOWNED);
return 0;
}
/**
* gelic_card_kick_txdma - enables TX DMA processing
* @card: card structure
* @descr: descriptor address to enable TX processing at
*
*/
static int gelic_card_kick_txdma(struct gelic_card *card,
struct gelic_descr *descr)
{
int status = 0;
if (card->tx_dma_progress)
return 0;
if (gelic_descr_get_status(descr) == GELIC_DESCR_DMA_CARDOWNED) {
card->tx_dma_progress = 1;
status = lv1_net_start_tx_dma(bus_id(card), dev_id(card),
descr->bus_addr, 0);
if (status)
dev_info(ctodev(card), "lv1_net_start_txdma failed," \
"status=%d\n", status);
}
return status;
}
