/*******************************************************************************
* Function: BoardInit(void)
* PreCondition:None
* Input: None
* Output: None
* Overview: SPI pins and SFR, Maintenance Tasks Timer, External Interrupts,
* and other board issues initialization.
* Note: This routine needs to be called before initialising MiWi stack
* or invoking other function that operates on MiWi stack.
******************************************************************************/
void BoardInit(void){
#if defined(__PIC32MX__)
// RADIO INTERFACES & SPI INIT -------------------------------------------//
#if defined HARDWARE_SPI
/* Peripheral Bus Frequency = System Clock / PB Divider */
unsigned int pbFreq;
pbFreq = (DWORD) CLOCK_FREQ/(1 << mOSCGetPBDIV());
unsigned int SPI_Clk_Freq;
unsigned char SPI_Brg;
#endif
#if defined MRF24J40
PHY_CS_TRIS = OUTPUT_PIN;
PHY_CS = 1;
PHY_RESETn_TRIS = OUTPUT_PIN;
PHY_RESETn = 1;
MRF24J40_INT_TRIS = INPUT_PIN;
SDI_TRIS = INPUT_PIN;
SDO_TRIS = OUTPUT_PIN;
SCK_TRIS = OUTPUT_PIN;
SPI_SDO = 0;
SPI_SCK = 0;
PHY_WAKE_TRIS = OUTPUT_PIN;
PHY_WAKE = 1;
MRF24J40_PWR_TRIS = OUTPUT_PIN;
MRF24J40_PWR = 1;
SPICONCLR = 0xFFFFFFFF; // Clear SPIxCON register
#ifdef HARDWARE_SPI
/* Enable SPI, Set to Master Mode & Set CKE bit : Serial output
* data changes on transition from active clock state to Idle
* clock state */
SPICON = 0x00008120;
/* PB Frequency can be maximum 40 MHz */
if(pbFreq > (2 * MAX_SPI_CLK_FREQ_FOR_P2P)){
SPI_Brg = 1;
/* Continue the loop till you find SPI Baud Rate Reg Value */
while(1){
/* SPI Clock Calculation as per PIC32 Manual */
SPI_Clk_Freq = pbFreq / (2 * (SPI_Brg + 1));
if(SPI_Clk_Freq <= MAX_SPI_CLK_FREQ_FOR_P2P){
break;
}
SPI_Brg++;
}
#if defined MRF24J40_IN_SPI1
mSpiChnSetBrg (1, SPI_Brg);
#elif defined MRF24J40_IN_SPI2
mSpiChnSetBrg (2, SPI_Brg);
#elif defined MRF24J40_IN_SPI3
mSpiChnSetBrg (1A, SPI_Brg);
#elif defined MRF24J40_IN_SPI4
mSpiChnSetBrg (3A, SPI_Brg);
#endif
}
else{
#if defined MRF24J40_IN_SPI1
mSpiChnSetBrg (1, 0);
#elif defined MRF24J40_IN_SPI2
mSpiChnSetBrg (2, 0);
#elif defined MRF24J40_IN_SPI3
mSpiChnSetBrg (1A, 0);
#elif defined MRF24J40_IN_SPI4
mSpiChnSetBrg (3A, SPI_Brg);
#endif
}
#endif
#endif
#if defined(MRF49XA_1)
// pruebas de funcionamiento
/* MRF49XA_1_PHY_CS_TRIS = OUTPUT_PIN;
MRF49XA_1_PHY_CS = 0;
MRF49XA_1_PHY_CS = 1;
MRF49XA_1_PHY_RESETn_TRIS = OUTPUT_PIN;
MRF49XA_1_PHY_RESETn = 0;
MRF49XA_1_PHY_RESETn = 1;
MRF49XA_1_INT_TRIS = OUTPUT_PIN;
MRF49XA_1_INT_PIN = 0;
MRF49XA_1_INT_PIN = 1;
MRF49XA_1_SDI_TRIS = OUTPUT_PIN;
MRF49XA_1_SPI_SDI = 0;
MRF49XA_1_SPI_SDI = 1;
MRF49XA_1_SDO_TRIS = OUTPUT_PIN;
MRF49XA_1_SPI_SDO = 0;
MRF49XA_1_SPI_SDO = 1;
MRF49XA_1_SCK_TRIS = OUTPUT_PIN;
MRF49XA_1_SPI_SCK = 0;
MRF49XA_1_SPI_SCK = 1;
MRF49XA_1_nFSEL_TRIS = OUTPUT_PIN;
MRF49XA_1_nFSEL = 0;
MRF49XA_1_nFSEL = 1;
MRF49XA_1_FINT_TRIS = OUTPUT_PIN;
MRF49XA_1_FINT = 0;
MRF49XA_1_FINT = 1;
*/
// configuration. Juan: Added; Agus: Modified to a standard way
MRF49XA_1_PHY_CS_TRIS = OUTPUT_PIN;
MRF49XA_1_PHY_CS = 1;
MRF49XA_1_PHY_RESETn_TRIS = OUTPUT_PIN;
MRF49XA_1_PHY_RESETn = 1;
MRF49XA_1_INT_TRIS = INPUT_PIN;
MRF49XA_1_SDI_TRIS = INPUT_PIN;
MRF49XA_1_SDO_TRIS = OUTPUT_PIN;
MRF49XA_1_SCK_TRIS = OUTPUT_PIN;
MRF49XA_1_SPI_SDO = 0;
MRF49XA_1_SPI_SCK = 0;
MRF49XA_1_nFSEL_TRIS = OUTPUT_PIN;
MRF49XA_1_FINT_TRIS = INPUT_PIN;
MRF49XA_1_nFSEL = 1; // nFSEL inactive
#ifdef cNGD_PLATFORM
// MRF49XA_1_PWR_TRIS = OUTPUT_PIN;
// MRF49XA_1_PWR = 1;
#endif
MRF49XA_1_SPICONCLR = 0xFFFFFFFF; //Clear SPIxCON register
#ifdef HARDWARE_SPI
/* Enable SPI1, Set to Master Mode & Set CKE bit : Serial output
* data changes on transition from active clock state to Idle
* clock state */
MRF49XA_1_SPICON = 0x00008120;
/* PB Frequency can be maximum 40 MHz */
if(pbFreq > (2 * MAX_SPI_CLK_FREQ_FOR_P2P)){
SPI_Brg = 1;
/* Continue the loop till you find SPI Baud Rate Reg Value */
while(1){
/* SPI Clock Calculation as per PIC32 Manual */
SPI_Clk_Freq = pbFreq / (2 * (SPI_Brg + 1));
if(SPI_Clk_Freq <= MAX_SPI_CLK_FREQ_FOR_P2P){
break;
}
SPI_Brg++;
}
#if defined MRF49XA_1_IN_SPI1
mSpiChnSetBrg (1, SPI_Brg);
#elif defined MRF49XA_1_IN_SPI2
mSpiChnSetBrg (2, SPI_Brg);
#elif defined MRF49XA_1_IN_SPI3
mSpiChnSetBrg (1A, SPI_Brg);
#endif
}
else{
#if defined MRF49XA_1_IN_SPI1
mSpiChnSetBrg (1, 0);
#elif defined MRF49XA_1_IN_SPI2
mSpiChnSetBrg (2, 0);
#elif defined MRF49XA_1_IN_SPI3
mSpiChnSetBrg (1A, 0);
#endif
}
#endif
#endif
#if defined(MRF49XA_2)
MRF49XA_2_PHY_CS_TRIS = OUTPUT_PIN;
MRF49XA_2_PHY_CS = 1;
MRF49XA_2_PHY_RESETn_TRIS = OUTPUT_PIN;
MRF49XA_2_PHY_RESETn = 1;
MRF49XA_2_INT_TRIS = 1;
MRF49XA_2_SDI_TRIS = INPUT_PIN;
MRF49XA_2_SDO_TRIS = OUTPUT_PIN;
MRF49XA_2_SCK_TRIS = OUTPUT_PIN;
MRF49XA_2_SPI_SDO = 0;
MRF49XA_2_SPI_SCK = 0;
MRF49XA_2_nFSEL_TRIS = OUTPUT_PIN;
MRF49XA_2_FINT_TRIS = INPUT_PIN;
MRF49XA_2_nFSEL = 1; // nFSEL inactive
#ifdef cNGD_PLATFORM
MRF49XA_2_PWR_TRIS = OUTPUT_PIN;
MRF49XA_2_PWR = 1;
#endif
MRF49XA_2_SPICONCLR = 0xFFFFFFFF; // Clear SPIxCON register
#ifdef HARDWARE_SPI
/* Enable SPI1, Set to Master Mode & Set CKE bit : Serial output
* data changes on transition from active clock state to Idle
* clock state */
MRF49XA_2_SPICON = 0x00008120;
/* PB Frequency can be maximum 40 MHz */
if(pbFreq > (2 * MAX_SPI_CLK_FREQ_FOR_P2P)){
SPI_Brg = 1;
/* Continue the loop till you find SPI Baud Rate Reg Value */
while(1){
/* SPI Clock Calculation as per PIC32 Manual */
SPI_Clk_Freq = pbFreq / (2 * (SPI_Brg + 1));
if(SPI_Clk_Freq <= MAX_SPI_CLK_FREQ_FOR_P2P){
break;
}
SPI_Brg++;
}
#if defined MRF49XA_2_IN_SPI1
mSpiChnSetBrg (1, SPI_Brg);
#elif defined MRF49XA_2_IN_SPI2
mSpiChnSetBrg (2, SPI_Brg);
#elif defined MRF49XA_2_IN_SPI3
mSpiChnSetBrg (1A, SPI_Brg);
#endif
}
else{
#if defined MRF49XA_2_IN_SPI1
mSpiChnSetBrg (1, 0);
#elif defined MRF49XA_2_IN_SPI2
mSpiChnSetBrg (2, 0);
#elif defined MRF49XA_2_IN_SPI3
mSpiChnSetBrg (1A, 0);
#endif
}
#endif
#endif
#if defined MRF89XA
Data_nCS_TRIS = 0;
Config_nCS_TRIS = 0;
Data_nCS = 1;
Config_nCS = 1;
PHY_IRQ1_TRIS = 1;
//... REVIEW...
#endif
// SPI & EXTERNAL INTERRUPTS PINS AND CONFIGURATION ----------------------//
/* Set the SPI Port Directions (SDO, SDI, SCK) for every SPI module.*/
#if defined SPI1_IN_USE
SDI1_TRIS = INPUT_PIN; //DIGITAL IN
SDO1_TRIS = OUTPUT_PIN; //DIGITAL OUT
SCK1_TRIS = OUTPUT_PIN; //DIGITAL OUT
#endif
#if defined SPI2_IN_USE
SDI2_TRIS = INPUT_PIN; //DIGITAL IN
SDO2_TRIS = OUTPUT_PIN; //DIGITAL OUT
SCK2_TRIS = OUTPUT_PIN; //DIGITAL OUT
#endif
#if defined SPI3_IN_USE
SDI3_TRIS = INPUT_PIN; //DIGITAL IN
SDO3_TRIS = OUTPUT_PIN; //DIGITAL OUT
SCK3_TRIS = OUTPUT_PIN; //DIGITAL OUT
#endif
#if defined SPI4_IN_USE
SDI4_TRIS = INPUT_PIN; //DIGITAL IN
SDO4_TRIS = OUTPUT_PIN; //DIGITAL OUT
SCK4_TRIS = OUTPUT_PIN; //DIGITAL OUT
#endif
/* Set the external interrups Pin Directions and Priority*/
#if defined INT1_IN_USE
INT1_TRIS = INPUT_PIN; // DIGITAL IN
mINT1SetIntPriority(4);
mINT1SetIntSubPriority(2);
mINT1SetEdgeMode(0); //0: Falling Edge.
// Enable INT1
mINT1IntEnable(1);
#endif
#if defined INT2_IN_USE
INT2_TRIS = INPUT_PIN; // DIGITAL IN
mINT2SetIntPriority(4);
mINT2SetIntSubPriority(2);
mINT2SetEdgeMode(0); //0: Falling Edge.
/* Enable INT2 */
mINT2IntEnable(1);
#endif
#if defined INT3_IN_USE
INT3_TRIS = INPUT_PIN; // DIGITAL IN
mINT3SetIntPriority(4);
mINT3SetIntSubPriority(2);
mINT3SetEdgeMode(0); //0: Falling Edge.
/* Enable INT3 */
mINT3IntEnable(1);
#endif
#if defined INT4_IN_USE
INT4_TRIS = INPUT_PIN; // DIGITAL IN
mINT4SetIntPriority(4);
mINT4SetIntSubPriority(2);
mINT4SetEdgeMode(0); //0: Falling Edge.
/* Enable INT4 */
mINT4IntEnable(1);
#endif
// LEDs
#ifdef cNGD_PLATFORM
mJTAGPortEnable(0); //Needed due to multiplexed pins
LED1_TRIS = OUTPUT_PIN;
LED2_TRIS = OUTPUT_PIN;
LED3_TRIS = OUTPUT_PIN;
LED1 = 0;
LED2 = 0;
LED3 = 0;
#endif
// TIMER 1 FOR TIME_SYNC -------------------------------------------------//
#if defined(ENABLE_TIME_SYNC)
//TIMER 1 MAY BE USED FOR SLEEP MODE AND/OR FOR STACKS MAINTENANCE. IT
//NEEDS ADAPTATION BEFORE ENABLING TIME_SYNC WITH TIMER 1 TOO!
T1CON = 0;
T1CON = 0x0012;
T1CONSET = 0x8000;
PR1 = 0xFFFF;
IFS0bits.T1IF = 0;
mT1IntEnable(1);
mT1SetIntPriority(4);
while(T1CONbits.TWIP);
TMR1 = 0;
#endif
// TIMER 1 FOR NODE STACKS AUTO-MAINTENANCE ------------------------------//
#if defined NODE_DOES_MAINTENANCE_TASKS
T1CON = 0x0070; //Disable timer, PBCLK source, PS=256
TMR1 = 0x0000; //Reset count
PR1 = MAINTENANCE_PERIOD; //Set period.
IPC1SET = 0x00000005; //Set Priority level 1, Subpriority level 1
IFS0CLR = 0x00000010; //Clear T1IF
IEC0SET = 0x00000010; //Set T1IE
//Timer will be triggered after initialization.
#endif
//************************************* TODO
// IOPORT CN - For waking up the node manually. --------------------------//
mPORTDSetPinsDigitalIn(BIT_5); // CN14
CNCON = 0x8000; //Module enabled.
CNEN = 0x00004000; //Enable CN14
CNPUE = 0x00004000; //Enable CN14 weak pull-up.
ReadBUTTONS(); //Clear PORT mismatch condition.
IFS1CLR = 0x00000001; //Clear the CN interrupt flag status bit
IPC6SET = 0x00180000; //Set CN priority 6, subpriority 0.
//It will be enabled only during sleep mode time interval
//------------------------------------------------------------------------//
// Lo modifico en el wifi config
#if defined(ENABLE_NVM) //REVIEW
//EE_nCS_TRIS = 0;//FERNANDO, CUIDADO NO SE SI LA PILA REALMENTE FUNCIONA CON FLASH MEMORY
//EE_nCS = 1;
#endif
// INTERRUPTION FLAGS AND EXT_INT PIN FINAL SETTINGS ---------------------//
#if defined MRF49XA_1
MRF49XA_1_IF = 0;
if(MRF49XA_1_INT_PIN == 0){
MRF49XA_1_IF = 1;
}
#endif
#if defined MRF49XA_2
MRF49XA_2_IF = 0;
if(MRF49XA_2_INT_PIN == 0){
MRF49XA_2_IF = 1;
}
#endif
#if defined MRF89XA
PHY_IRQ1 = 0;
#endif
#if defined MRF24J40
MRF24J40_IF = 0;
if(MRF24J40_INT_PIN == 0){
MRF24J40_IF = 1;
}
#endif
#else //Not PIC32.
#error "Unknown target board."
#endif
}
/****************************************************************************
Function:
static void InitializeBoard(void)
Description:
This routine initializes the hardware. It is a generic initialization
routine for many of the Microchip development boards, using definitions
in HardwareProfile.h to determine specific initialization.
Precondition:
None
Parameters:
None - None
Returns:
None
Remarks:
None
***************************************************************************/
static void InitializeBoard(void) {
// WiFi Module hardware Initialization handled by Library
// Enable multi-vectored interrupts
INTEnableSystemMultiVectoredInt();
// Enable optimal performance
SYSTEMConfigPerformance(GetSystemClock());
mOSCSetPBDIV(OSC_PB_DIV_1); // Use 1:1 CPU Core:Peripheral clocks
// Disable JTAG port so we get our I/O pins back, but first
// wait 50ms so if you want to reprogram the part with
// JTAG, you'll still have a tiny window before JTAG goes away.
// The PIC32 Starter Kit debuggers use JTAG and therefore must not
// disable JTAG.
DelayMs(50);
DDPCONbits.JTAGEN = 0;
// LEDs
LEDS_OFF();
mPORTESetPinsDigitalOut(BIT_5 | BIT_6 | BIT_7);
// Switches
mPORTDSetPinsDigitalIn(BIT_4 | BIT_5 | BIT_6);
ConfigCNPullups(CN13_PULLUP_ENABLE | CN14_PULLUP_ENABLE | CN15_PULLUP_ENABLE);
// LCD
mPORTESetPinsDigitalOut(BIT_0 | BIT_1 | BIT_2 | BIT_3);
//Configure LCD SPI pins
mPORTFSetPinsDigitalOut(BIT_8);
mPORTDSetPinsDigitalOut(BIT_15);
//SPI Flash
mPORTDSetPinsDigitalOut(BIT_14);
//UART
mPORTFSetPinsDigitalOut(BIT_5);
mPORTFSetPinsDigitalIn(BIT_4);
//MiWi
#if defined(MRF24J40) || defined(MRF49XA)
PHY_CS = 1;
mPORTDSetPinsDigitalOut(BIT_9);
PHY_RESETn = 1;
mPORTDSetPinsDigitalOut(BIT_11);
#endif
#if defined(MRF49XA)
nFSEL_TRIS = 0;
FINT_TRIS = 1;
nFSEL = 1;
#elif defined(MRF24J40)
PHY_WAKE = 1;
mPORTBSetPinsDigitalOut(BIT_9);
#else
Data_nCS_TRIS = 0;
Config_nCS_TRIS = 0;
Data_nCS = 1;
Config_nCS = 1;
IRQ1_INT_TRIS = 1;
IRQ0_INT_TRIS = 1;
#endif
/* Set the Port Directions of SDO, SDI, Clock & Slave Select Signal */
/* Set SCK port pin to output */
mPORTDSetPinsDigitalOut(BIT_10);
/* Set SDO port pin to output */
mPORTDSetPinsDigitalOut(BIT_0);
/* Set SDI port pin to input */
mPORTCSetPinsDigitalIn(BIT_4);
/* Set INT1, INT2 port pins to input */
mPORTESetPinsDigitalIn(BIT_8 | BIT_9);
/* Clear SPI1CON register */
SPI1CONCLR = 0xFFFFFFFF;
#ifdef HARDWARE_SPI
unsigned int pbFreq;
/* Enable SPI1, Set to Master Mode & Set CKE bit : Serial output data changes on transition
from active clock state to Idle clock state */
SPI1CON = 0x00008120;
/* Peripheral Bus Frequency = System Clock / PB Divider */
pbFreq = (DWORD) CLOCK_FREQ / (1 << mOSCGetPBDIV());
/* PB Frequency can be maximum 40 MHz */
if (pbFreq > (2 * MAX_SPI_CLK_FREQ_FOR_P2P)) {
{
unsigned int SPI_Clk_Freq;
unsigned char SPI_Brg1 = 1;
//For the SPI1
/* Continue the loop till you find SPI Baud Rate Register Value */
while (1) {
/* SPI Clock Calculation as per PIC32 Manual */
SPI_Clk_Freq = pbFreq / (2 * (SPI_Brg1 + 1));
if (SPI_Clk_Freq <= MAX_SPI_CLK_FREQ_FOR_P2P) {
break;
}
SPI_Brg1++;
}
mSpiChnSetBrg(1, SPI_Brg1);
}
} else {
/* Set SPI1 Baud Rate */
mSpiChnSetBrg(1, 0);
}
#endif
/* Set the Interrupt Priority */
mINT2SetIntPriority(4);
#if defined(MRF89XA)
mINT1SetIntPriority(4);
#endif
/* Set Interrupt Subpriority Bits for INT2 */
mINT2SetIntSubPriority(2);
#if defined(MRF89XA)
mINT2SetIntSubPriority(1);
#endif
/* Set INT2 to falling edge */
mINT2SetEdgeMode(0);
#if defined(MRF89XA)
mINT1SetEdgeMode(1);
mINT2SetEdgeMode(1);
#endif
/* Enable INT2 */
mINT2IntEnable(1);
#if defined(MRF89XA)
mINT2IntEnable(1);
#endif
/* Enable Multi Vectored Interrupts */
// INTEnableSystemMultiVectoredInt();
#if defined(MRF89XA)
PHY_IRQ1 = 0;
PHY_IRQ0 = 0;
PHY_RESETn_TRIS = 1;
#else
RFIF = 0;
if (RF_INT_PIN == 0) {
RFIF = 1;
}
#endif
// Initialize the EEPROM
XEEInit();
// UART Initialization
#if defined(STACK_USE_UART)
UARTTX_TRIS = 0;
UARTRX_TRIS = 1;
UMODE = 0x8000; // Set UARTEN. Note: this must be done before setting UTXEN
USTA = 0x00001400; // RXEN set, TXEN set
#define CLOSEST_UBRG_VALUE ((GetPeripheralClock()+8ul*BAUD_RATE)/16/BAUD_RATE-1)
#define BAUD_ACTUAL (GetPeripheralClock()/16/(CLOSEST_UBRG_VALUE+1))
#define BAUD_ERROR ((BAUD_ACTUAL > BAUD_RATE) ? BAUD_ACTUAL-BAUD_RATE : BAUD_RATE-BAUD_ACTUAL)
#define BAUD_ERROR_PRECENT ((BAUD_ERROR*100+BAUD_RATE/2)/BAUD_RATE)
#if (BAUD_ERROR_PRECENT > 3)
#warning UART frequency error is worse than 3%
#elif (BAUD_ERROR_PRECENT > 2)
#warning UART frequency error is worse than 2%
#endif
UBRG = CLOSEST_UBRG_VALUE;
#endif
}
/*******************************************************************************
* Function: BoardInit(void)
* PreCondition:None
* Input: None
* Output: None
* Overview: SPI pins and SFR, Maintenance Tasks Timer, External Interrupts,
* and other board issues initialization.
* Note: This routine needs to be called before initialising MiWi stack
* or invoking other function that operates on MiWi stack.
******************************************************************************/
void BoardInit(void){
#if defined(__PIC32MX__)
// RADIO INTERFACES & SPI INIT -------------------------------------------//
#if defined HARDWARE_SPI
/* Peripheral Bus Frequency = System Clock / PB Divider */
unsigned int pbFreq;
pbFreq = (DWORD) CLOCK_FREQ/(1 << mOSCGetPBDIV());
unsigned int SPI_Clk_Freq;
unsigned char SPI_Brg;
#endif
#if defined MRF24J40
PHY_CS_TRIS = 0;
PHY_CS = 1;
PHY_RESETn_TRIS = 0;
PHY_RESETn = 1;
MRF24J40_INT_TRIS = 1;
SDI_TRIS = 1;
SDO_TRIS = 0;
SCK_TRIS = 0;
SPI_SDO = 0;
SPI_SCK = 0;
PHY_WAKE_TRIS = 0;
PHY_WAKE = 1;
SPICONCLR = 0xFFFFFFFF; // Clear SPIxCON register
#ifdef HARDWARE_SPI
/* Enable SPI, Set to Master Mode & Set CKE bit : Serial output
* data changes on transition from active clock state to Idle
* clock state */
SPICON = 0x00008120;
/* PB Frequency can be maximum 40 MHz */
if(pbFreq > (2 * MAX_SPI_CLK_FREQ_FOR_P2P)){
SPI_Brg = 1;
/* Continue the loop till you find SPI Baud Rate Reg Value */
while(1){
/* SPI Clock Calculation as per PIC32 Manual */
SPI_Clk_Freq = pbFreq / (2 * (SPI_Brg + 1));
if(SPI_Clk_Freq <= MAX_SPI_CLK_FREQ_FOR_P2P){
break;
}
SPI_Brg++;
}
#if defined MRF24J40_IN_SPI1
mSpiChnSetBrg (1, SPI_Brg);
#elif defined MRF24J40_IN_SPI2
mSpiChnSetBrg (2, SPI_Brg);
#elif defined MRF24J40_IN_SPI3
mSpiChnSetBrg (1A, SPI_Brg);
#elif defined MRF24J40_IN_SPI4
mSpiChnSetBrg (3A, SPI_Brg);
#endif
}
else{
#if defined MRF24J40_IN_SPI1
mSpiChnSetBrg (1, 0);
#elif defined MRF24J40_IN_SPI2
mSpiChnSetBrg (2, 0);
#elif defined MRF24J40_IN_SPI3
mSpiChnSetBrg (1A, 0);
#elif defined MRF24J40_IN_SPI4
mSpiChnSetBrg (3A, SPI_Brg);
#endif
}
#endif
#endif
#if defined(MRF49XA_1)
//Configuration for Guilja's Expansion Board, Connection SLot 1 --//
mPORTESetPinsDigitalOut(BIT_1); //nCS
mPORTBSetPinsDigitalIn(BIT_2); //FINT //Juan: Added.
//----------------------------------------------------------------//
MRF49XA_1_PHY_CS_TRIS = 0;
MRF49XA_1_PHY_CS = 1;
MRF49XA_1_PHY_RESETn_TRIS = 0;
MRF49XA_1_PHY_RESETn = 1;
MRF49XA_1_INT_TRIS = 1;
MRF49XA_1_SDI_TRIS = 1;
MRF49XA_1_SDO_TRIS = 0;
MRF49XA_1_SCK_TRIS = 0;
MRF49XA_1_SPI_SDO = 0;
MRF49XA_1_SPI_SCK = 0;
MRF49XA_1_nFSEL_TRIS = 0;
MRF49XA_1_FINT_TRIS = 1;
MRF49XA_1_nFSEL = 1; // nFSEL inactive
MRF49XA_1_SPICONCLR = 0xFFFFFFFF; //Clear SPIxCON register
#ifdef HARDWARE_SPI
/* Enable SPI1, Set to Master Mode & Set CKE bit : Serial output
* data changes on transition from active clock state to Idle
* clock state */
MRF49XA_1_SPICON = 0x00008120;
/* PB Frequency can be maximum 40 MHz */
if(pbFreq > (2 * MAX_SPI_CLK_FREQ_FOR_P2P)){
SPI_Brg = 1;
/* Continue the loop till you find SPI Baud Rate Reg Value */
while(1){
/* SPI Clock Calculation as per PIC32 Manual */
SPI_Clk_Freq = pbFreq / (2 * (SPI_Brg + 1));
if(SPI_Clk_Freq <= MAX_SPI_CLK_FREQ_FOR_P2P){
break;
}
SPI_Brg++;
}
#if defined MRF49XA_1_IN_SPI1
mSpiChnSetBrg (1, SPI_Brg);
#elif defined MRF49XA_1_IN_SPI2
mSpiChnSetBrg (2, SPI_Brg);
#elif defined MRF49XA_1_IN_SPI3
mSpiChnSetBrg (1A, SPI_Brg);
#endif
}
else{
#if defined MRF49XA_1_IN_SPI1
mSpiChnSetBrg (1, 0);
#elif defined MRF49XA_1_IN_SPI2
mSpiChnSetBrg (2, 0);
#elif defined MRF49XA_1_IN_SPI3
mSpiChnSetBrg (1A, 0);
#endif
}
#endif
#endif
#if defined(MRF49XA_2)
MRF49XA_2_PHY_CS_TRIS = 0;
MRF49XA_2_PHY_CS = 1;
MRF49XA_2_PHY_RESETn_TRIS = 0;
MRF49XA_2_PHY_RESETn = 1;
MRF49XA_2_INT_TRIS = 1;
MRF49XA_2_SDI_TRIS = 1;
MRF49XA_2_SDO_TRIS = 0;
MRF49XA_2_SCK_TRIS = 0;
MRF49XA_2_SPI_SDO = 0;
MRF49XA_2_SPI_SCK = 0;
MRF49XA_2_nFSEL_TRIS = 0;
MRF49XA_2_FINT_TRIS = 1;
MRF49XA_2_nFSEL = 1; // nFSEL inactive
MRF49XA_2_SPICONCLR = 0xFFFFFFFF; // Clear SPIxCON register
#ifdef HARDWARE_SPI
/* Enable SPI1, Set to Master Mode & Set CKE bit : Serial output
* data changes on transition from active clock state to Idle
* clock state */
MRF49XA_2_SPICON = 0x00008120;
/* PB Frequency can be maximum 40 MHz */
if(pbFreq > (2 * MAX_SPI_CLK_FREQ_FOR_P2P)){
SPI_Brg = 1;
/* Continue the loop till you find SPI Baud Rate Reg Value */
while(1){
/* SPI Clock Calculation as per PIC32 Manual */
SPI_Clk_Freq = pbFreq / (2 * (SPI_Brg + 1));
if(SPI_Clk_Freq <= MAX_SPI_CLK_FREQ_FOR_P2P){
break;
}
SPI_Brg++;
}
#if defined MRF49XA_2_IN_SPI1
mSpiChnSetBrg (1, SPI_Brg);
#elif defined MRF49XA_2_IN_SPI2
mSpiChnSetBrg (2, SPI_Brg);
#elif defined MRF49XA_2_IN_SPI3
mSpiChnSetBrg (1A, SPI_Brg);
#endif
}
else{
#if defined MRF49XA_2_IN_SPI1
mSpiChnSetBrg (1, 0);
#elif defined MRF49XA_2_IN_SPI2
mSpiChnSetBrg (2, 0);
#elif defined MRF49XA_2_IN_SPI3
mSpiChnSetBrg (1A, 0);
#endif
}
#endif
#endif
#if defined MRF89XA
Data_nCS_TRIS = 0;
Config_nCS_TRIS = 0;
Data_nCS = 1;
Config_nCS = 1;
PHY_IRQ1_TRIS = 1;
//... REVIEW...
#endif
// SPI & EXTERNAL INTERRUPTS PINS AND CONFIGURATION ----------------------//
#if defined (__32MX795F512L__) || defined __32MX675F256L__
/* Set the SPI Port Directions (SDO, SDI, SCK) for every SPI module.*/
#if defined MRF49XA_1_IN_SPI1 || defined MRF49XA_2_IN_SPI1 || \
defined MRF89XA_IN_SPI1 || defined MRF24J40_IN_SPI1 || \
defined MRF24WB0M_IN_SPI1
mPORTDSetPinsDigitalOut(BIT_0); //SDO1
mPORTDSetPinsDigitalOut(BIT_10); //SCK1
mPORTCSetPinsDigitalIn(BIT_4); //SDI1
#endif
#if defined MRF49XA_1_IN_SPI2 || defined MRF49XA_2_IN_SPI2 || \
defined MRF89XA_IN_SPI2 || defined MRF24J40_IN_SPI2 || \
defined MRF24WB0M_IN_SPI2
mPORTGSetPinsDigitalOut(BIT_8); //SDO2
mPORTGSetPinsDigitalOut(BIT_6); //SCK2
mPORTGSetPinsDigitalIn(BIT_7); //SDI2
#endif
#if defined MRF49XA_1_IN_SPI3 || defined MRF49XA_2_IN_SPI3 || \
defined MRF89XA_IN_SPI3 || defined MRF24J40_IN_SPI3 || \
defined MRF24WB0M_IN_SPI3
mPORTFSetPinsDigitalOut(BIT_8); //SDO3
mPORTDSetPinsDigitalOut(BIT_15); //SCK3
mPORTFSetPinsDigitalIn(BIT_2); //SDI3
#endif
#if defined MRF49XA_1_IN_SPI4 || defined MRF49XA_2_IN_SPI4 || \
defined MRF89XA_IN_SPI4 || defined MRF24J40_IN_SPI4 || \
defined MRF24WB0M_IN_SPI4
mPORTFSetPinsDigitalOut(BIT_5); //SDO4
mPORTFSetPinsDigitalOut(BIT_13); //SCK4
mPORTFSetPinsDigitalIn(BIT_4); //SDI4
#endif
#elif defined (__32MX795F512H__)
#if defined MRF49XA_1_IN_SPI2 || defined MRF49XA_2_IN_SPI2 || \
defined MRF89XA_IN_SPI2 || defined MRF24J40_IN_SPI2 || \
defined MRF24WB0M_IN_SPI2
mPORTGSetPinsDigitalOut(BIT_8); //SDO2
mPORTGSetPinsDigitalOut(BIT_6); //SCK2
mPORTGSetPinsDigitalIn(BIT_7); //SDI2
#endif
#if defined MRF49XA_1_IN_SPI3 || defined MRF49XA_2_IN_SPI3 || \
defined MRF89XA_IN_SPI3 || defined MRF24J40_IN_SPI3 || \
defined MRF24WB0M_IN_SPI3
mPORTDSetPinsDigitalOut(BIT_3); //SDO3
mPORTDSetPinsDigitalOut(BIT_1); //SCK3
mPORTDSetPinsDigitalIn(BIT_2); //SDI3
#endif
#if defined MRF24J40_IN_SPI4 || defined MRF24WB0M_IN_SPI4
mPORTFSetPinsDigitalOut(BIT_5); //SDO4
mPORTBSetPinsDigitalOut(BIT_14); //SCK4
mPORTFSetPinsDigitalIn(BIT_4); //SDI4
#endif
#endif
#if defined (__32MX795F512L__) || defined __32MX675F256L__
/* Set the external interrups Pin Directions and Priority*/
#if defined MRF49XA_1_USES_INT1 || defined MRF49XA_2_USES_INT1 || \
defined MRF89XA_USES_INT1 || defined MRF24J40_USES_INT1 || \
defined MRF24WB0M_USES_INT1
mPORTESetPinsDigitalIn(BIT_8);
mINT1SetIntPriority(4);
mINT1SetIntSubPriority(2);
mINT1SetEdgeMode(0); //0: Falling Edge.
/* Enable INT1 */
mINT1IntEnable(1);
#endif
#if defined MRF49XA_1_USES_INT2 || defined MRF49XA_2_USES_INT2 || \
defined MRF89XA_USES_INT2 || defined MRF24J40_USES_INT2 || \
defined MRF24WB0M_USES_INT2
mPORTESetPinsDigitalIn(BIT_9);
mINT2SetIntPriority(4);
mINT2SetIntSubPriority(2);
mINT2SetEdgeMode(0); //0: Falling Edge.
/* Enable INT2 */
mINT2IntEnable(1);
#endif
#if defined MRF49XA_1_USES_INT3 || defined MRF49XA_2_USES_INT3 || \
defined MRF89XA_USES_INT3 || defined MRF24J40_USES_INT3 || \
defined MRF24WB0M_USES_INT3
mPORTASetPinsDigitalIn(BIT_14);
mINT3SetIntPriority(4);
mINT3SetIntSubPriority(2);
mINT3SetEdgeMode(0); //0: Falling Edge.
/* Enable INT3 */
mINT3IntEnable(1);
#endif
#if defined MRF49XA_1_USES_INT4 || defined MRF49XA_2_USES_INT4 || \
defined MRF89XA_USES_INT4 || defined MRF24J40_USES_INT4 || \
defined MRF24WB0M_USES_INT4
mPORTASetPinsDigitalIn(BIT_15);
mINT4SetIntPriority(4);
mINT4SetIntSubPriority(2);
mINT4SetEdgeMode(0); //0: Falling Edge.
/* Enable INT4 */
mINT4IntEnable(1);
#endif
#elif defined (__32MX795F512H__)
#if defined MRF49XA_1_USES_INT1 || defined MRF49XA_2_USES_INT1 || \
defined MRF89XA_USES_INT1 || defined MRF24J40_USES_INT1 || \
defined MRF24WB0M_USES_INT1
mPORTDSetPinsDigitalIn(BIT_8);
mINT1SetIntPriority(4);
mINT1SetIntSubPriority(2);
mINT1SetEdgeMode(0); //0: Falling Edge.
/* Enable INT1 */
mINT1IntEnable(1);
#endif
#if defined MRF49XA_1_USES_INT2 || defined MRF49XA_2_USES_INT2 || \
defined MRF89XA_USES_INT2 || defined MRF24J40_USES_INT2 || \
defined MRF24WB0M_USES_INT2
mPORTDSetPinsDigitalIn(BIT_9); //Warning. Shared with SPI3 nSS3
mINT2SetIntPriority(4);
mINT2SetIntSubPriority(2);
mINT2SetEdgeMode(0); //0: Falling Edge.
/* Enable INT2 */
mINT2IntEnable(1);
#endif
#if defined MRF49XA_1_USES_INT3 || defined MRF49XA_2_USES_INT3 || \
defined MRF89XA_USES_INT3 || defined MRF24J40_USES_INT3 || \
defined MRF24WB0M_USES_INT3
mPORTDSetPinsDigitalIn(BIT_10);
mINT3SetIntPriority(4);
mINT3SetIntSubPriority(2);
mINT3SetEdgeMode(0); //0: Falling Edge.
/* Enable INT3 */
mINT3IntEnable(1);
#endif
#if defined MRF49XA_1_USES_INT4 || defined MRF49XA_2_USES_INT4 || \
defined MRF89XA_USES_INT4 || defined MRF24J40_USES_INT4 || \
defined MRF24WB0M_USES_INT4
mPORTDSetPinsDigitalIn(BIT_11);
mINT4SetIntPriority(4);
mINT4SetIntSubPriority(2);
mINT4SetEdgeMode(0); //0: Falling Edge.
/* Enable INT4 */
mINT4IntEnable(1);
#endif
#endif
// TIMER 1 FOR TIME_SYNC -------------------------------------------------//
#if defined(ENABLE_TIME_SYNC)
//TIMER 1 MAY BE USED FOR SLEEP MODE AND/OR FOR STACKS MAINTENANCE. IT
//NEEDS ADAPTATION BEFORE ENABLING TIME_SYNC WITH TIMER 1 TOO!
T1CON = 0;
T1CON = 0x0012;
T1CONSET = 0x8000;
PR1 = 0xFFFF;
IFS0bits.T1IF = 0;
mT1IntEnable(1);
mT1SetIntPriority(4);
while(T1CONbits.TWIP);
TMR1 = 0;
#endif
// TIMER 1 FOR NODE STACKS AUTO-MAINTENANCE ------------------------------//
#if defined NODE_DOES_MAINTENANCE_TASKS
T1CON = 0x0070; //Disable timer, PBCLK source, PS=256
TMR1 = 0x0000; //Reset count
PR1 = MAINTENANCE_PERIOD; //Set period.
IPC1SET = 0x00000005; //Set Priority level 1, Subpriority level 1
IFS0CLR = 0x00000010; //Clear T1IF
IEC0SET = 0x00000010; //Set T1IE
//Timer will be triggered after initialization.
#endif
// IOPORT CN - For waking up the node manually. --------------------------//
mPORTDSetPinsDigitalIn(BIT_5); // CN14
CNCON = 0x8000; //Module enabled.
CNEN = 0x00004000; //Enable CN14
CNPUE = 0x00004000; //Enable CN14 weak pull-up.
//ReadBUTTONS(); //Clear PORT mismatch condition.
IFS1CLR = 0x00000001; //Clear the CN interrupt flag status bit
IPC6SET = 0x00180000; //Set CN priority 6, subpriority 0.
//It will be enabled only during sleep mode time interval
//------------------------------------------------------------------------//
//JUAN: NVM NOT ADAPTED FOR LSI-CWSN MIWI STACK // Lo modifico en el wifi config
#if defined(ENABLE_NVM)
//EE_nCS_TRIS = 0;
//EE_nCS = 1;
#endif
// INTERRUPTION FLAGS AND EXT_INT PIN FINAL SETTINGS ---------------------//
#if defined MRF49XA_1
MRF49XA_1_IF = 0;
if(MRF49XA_1_INT_PIN == 0){
MRF49XA_1_IF = 1;
}
#endif
#if defined MRF49XA_2
MRF49XA_2_IF = 0;
if(MRF49XA_2_INT_PIN == 0){
MRF49XA_2_IF = 1;
}
#endif
#if defined MRF89XA
PHY_IRQ1 = 0;
#endif
#if defined MRF24J40
MRF24J40_IF = 0;
if(MRF24J40_INT_PIN == 0){
MRF24J40_IF = 1;
}
#endif
#else //Not PIC32.
#error "Unknown target board."
#endif
}