int mali_platform_device_register(void)
{
int err = -1;
MALI_DEBUG_PRINT(1, ("%s\n", __FUNCTION__));
err = platform_device_register(&mali_gpu_device);
if (0 == err)
{
mali_pmm_init();
#ifdef CONFIG_PM_RUNTIME
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
pm_runtime_set_autosuspend_delay(&(mali_gpu_device.dev), 1000);
pm_runtime_use_autosuspend(&(mali_gpu_device.dev));
#endif
pm_runtime_enable(&(mali_gpu_device.dev));
#endif
#if defined(__MALI_CORE_SCALING_ENABLE__)
mali_core_scaling_init(num_pp_cores);
#endif
return 0;
}
MALI_DEBUG_PRINT(1, ("%s err=%d\n",__FUNCTION__, err));
platform_device_unregister(&mali_gpu_device);
return err;
}
int mali_meson_init_finish(struct platform_device* ptr_plt_dev)
{
#ifdef CONFIG_GPU_THERMAL
int err;
struct gpufreq_cooling_device *gcdev = NULL;
#endif
if (mali_core_scaling_init(&mali_plat_data) < 0)
return -1;
#ifdef CONFIG_GPU_THERMAL
gcdev = gpufreq_cooling_alloc();
if(IS_ERR(gcdev))
printk("malloc gpu cooling buffer error!!\n");
else if(!gcdev)
printk("system does not enable thermal driver\n");
else {
gcdev->get_gpu_freq_level = get_mali_freq_level;
gcdev->get_gpu_max_level = get_mali_max_level;
gcdev->set_gpu_freq_idx = set_limit_mali_freq;
gcdev->get_gpu_current_max_level = get_limit_mali_freq;
err = gpufreq_cooling_register(gcdev);
if(err < 0)
printk("register GPU cooling error\n");
printk("gpu cooling register okay with err=%d\n",err);
}
#endif
return 0;
}
int mali_meson_init_finish(struct platform_device* ptr_plt_dev)
{
#ifndef CONFIG_MALI_DVFS
if (mali_core_scaling_init(&mali_plat_data) < 0)
return -1;
#endif
return 0;
}
int mali_meson_init_finish(struct platform_device* ptr_plt_dev)
{
#ifdef CONFIG_GPU_THERMAL
int err;
struct gpufreq_cooling_device *gcdev = NULL;
struct gpucore_cooling_device *gccdev = NULL;
#endif
if (mali_core_scaling_init(&mali_plat_data) < 0)
return -1;
#ifdef CONFIG_GPU_THERMAL
gcdev = gpufreq_cooling_alloc();
register_gpu_freq_info(get_current_frequency);
if(IS_ERR(gcdev))
printk("malloc gpu cooling buffer error!!\n");
else if(!gcdev)
printk("system does not enable thermal driver\n");
else {
gcdev->get_gpu_freq_level = get_mali_freq_level;
gcdev->get_gpu_max_level = get_mali_max_level;
gcdev->set_gpu_freq_idx = set_limit_mali_freq;
gcdev->get_gpu_current_max_level = get_limit_mali_freq;
err = gpufreq_cooling_register(gcdev);
if(err < 0)
printk("register GPU cooling error\n");
printk("gpu cooling register okay with err=%d\n",err);
}
gccdev=gpucore_cooling_alloc();
if(IS_ERR(gccdev))
printk("malloc gpu core cooling buffer error!!\n");
else if(!gccdev)
printk("system does not enable thermal driver\n");
else {
gccdev->max_gpu_core_num=mali_plat_data.cfg_pp;
gccdev->set_max_pp_num=set_limit_pp_num;
err = (int)gpucore_cooling_register(gccdev);
if(err < 0)
printk("register GPU cooling error\n");
printk("gpu core cooling register okay with err=%d\n",err);
}
#endif
#ifdef CONFIG_AM_VDEC_H264_4K2K
vh264_4k2k_register_module_callback(mali_4k2k_enter, mali_4k2k_exit);
#endif /* CONFIG_AM_VDEC_H264_4K2K */
return 0;
}
int mali_meson_init_finish(struct platform_device* ptr_plt_dev)
{
if (mali_core_scaling_init(&mali_plat_data) < 0)
return -1;
return 0;
}
/* Register the platform device */
err = platform_device_register(&mali_gpu_device);
if (0 == err) {
#ifdef CONFIG_PM_RUNTIME
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
pm_runtime_set_autosuspend_delay(&(mali_gpu_device.dev), 1000);
pm_runtime_use_autosuspend(&(mali_gpu_device.dev));
#endif
pm_runtime_enable(&(mali_gpu_device.dev));
#endif
MALI_DEBUG_ASSERT(0 < num_pp_cores);
mali_core_scaling_init(num_pp_cores);
return 0;
}
return err;
}
void mali_platform_device_unregister(void)
{
MALI_DEBUG_PRINT(4, ("mali_platform_device_unregister() called\n"));
mali_core_scaling_term();
platform_device_unregister(&mali_gpu_device);
platform_device_put(&mali_gpu_device);
#if defined(CONFIG_ARCH_REALVIEW)
mali_write_phys(0xC0010020, 0x9); /* Restore default (legacy) memory mapping */
#endif
}
static void mali_platform_device_release(struct device *device)
{
MALI_DEBUG_PRINT(4, ("mali_platform_device_release() called\n"));
}
#else /* CONFIG_MALI_DT */
int mali_platform_device_init(struct platform_device *device)
{
int num_pp_cores;
int err = -1;
#if defined(CONFIG_ARCH_REALVIEW)
u32 m400_gp_version;
#endif
/* Detect present Mali GPU and connect the correct resources to the device */
#if defined(CONFIG_ARCH_VEXPRESS)
#if defined(CONFIG_ARM64)
if (mali_read_phys(0x6F000000) == 0x40601450) {
MALI_DEBUG_PRINT(4, ("Registering Mali-450 MP6 device\n"));
num_pp_cores = 6;
}
#else
if (mali_read_phys(0xFC000000) == 0x00000450) {
MALI_DEBUG_PRINT(4, ("Registering Mali-450 MP8 device\n"));
num_pp_cores = 8;
} else if (mali_read_phys(0xFC000000) == 0x40400450) {
MALI_DEBUG_PRINT(4, ("Registering Mali-450 MP4 device\n"));
num_pp_cores = 4;
}
#endif
#elif defined(CONFIG_ARCH_REALVIEW)
m400_gp_version = mali_read_phys(0xC000006C);
if ((m400_gp_version & 0xFFFF0000) == 0x0C070000) {
MALI_DEBUG_PRINT(4, ("Registering Mali-300 device\n"));
num_pp_cores = 1;
mali_write_phys(0xC0010020, 0xA); /* Enable direct memory mapping for FPGA */
} else if ((m400_gp_version & 0xFFFF0000) == 0x0B070000) {
u32 fpga_fw_version = mali_read_phys(0xC0010000);
if (fpga_fw_version == 0x130C008F || fpga_fw_version == 0x110C008F) {
/* Mali-400 MP1 r1p0 or r1p1 */
MALI_DEBUG_PRINT(4, ("Registering Mali-400 MP1 device\n"));
num_pp_cores = 1;
mali_write_phys(0xC0010020, 0xA); /* Enable direct memory mapping for FPGA */
} else if (fpga_fw_version == 0x130C000F) {
/* Mali-400 MP2 r1p1 */
MALI_DEBUG_PRINT(4, ("Registering Mali-400 MP2 device\n"));
num_pp_cores = 2;
mali_write_phys(0xC0010020, 0xA); /* Enable direct memory mapping for FPGA */
}
}
#endif
err = platform_device_add_data(device, &mali_gpu_data, sizeof(mali_gpu_data));
if (0 == err) {
#ifdef CONFIG_PM_RUNTIME
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
pm_runtime_set_autosuspend_delay(&(device->dev), 1000);
pm_runtime_use_autosuspend(&(device->dev));
#endif
pm_runtime_enable(&(device->dev));
#endif
MALI_DEBUG_ASSERT(0 < num_pp_cores);
mali_core_scaling_init(num_pp_cores);
}
return err;
}
