Esempio n. 1
0
static _mali_osk_errcode_t mali_gp_upper_half(void *data)
{
    struct mali_gp_core *core = (struct mali_gp_core *)data;
    u32 irq_readout = 0;

#if MALI_SHARED_INTERRUPTS
    mali_pm_lock();
    if (MALI_TRUE == mali_pm_is_powered_on())
    {
#endif
        irq_readout = mali_hw_core_register_read(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_STAT);
#if MALI_SHARED_INTERRUPTS
    }
    mali_pm_unlock();
#endif

    if (MALIGP2_REG_VAL_IRQ_MASK_NONE != irq_readout)
    {

        mali_hw_core_register_write(&core->hw_core, MALIGP2_REG_ADDR_MGMT_INT_MASK, MALIGP2_REG_VAL_IRQ_MASK_NONE);

#if MALI_TIMELINE_PROFILING_ENABLED
        _mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_SINGLE|MALI_PROFILING_MAKE_EVENT_CHANNEL_GP(0)|MALI_PROFILING_EVENT_REASON_SINGLE_HW_INTERRUPT, irq_readout, 0, 0, 0, 0);
#endif


        _mali_osk_irq_schedulework(core->irq);
        return _MALI_OSK_ERR_OK;
    }

    return _MALI_OSK_ERR_FAULT;
}
static _mali_osk_errcode_t mali_mmu_upper_half(void * data)
{
    struct mali_mmu_core *mmu = (struct mali_mmu_core *)data;
    u32 int_stat = 0;

    MALI_DEBUG_ASSERT_POINTER(mmu);

#if MALI_SHARED_INTERRUPTS
    mali_pm_lock();
    if (MALI_TRUE == mali_pm_is_powered_on())
    {
#endif
        /* Check if it was our device which caused the interrupt (we could be sharing the IRQ line) */
        int_stat = mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_INT_STATUS);
#if MALI_SHARED_INTERRUPTS
    }
    mali_pm_unlock();
#endif

    if (0 != int_stat)
    {
        mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_MASK, 0);
        mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_STATUS);

        if (int_stat & MALI_MMU_INTERRUPT_PAGE_FAULT)
        {
            _mali_osk_irq_schedulework(mmu->irq);
        }

        if (int_stat & MALI_MMU_INTERRUPT_READ_BUS_ERROR)
        {
            /* clear interrupt flag */
            mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_CLEAR, MALI_MMU_INTERRUPT_READ_BUS_ERROR);
            /* reenable it */
            mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_MASK,
                                        mali_hw_core_register_read(&mmu->hw_core, MALI_MMU_REGISTER_INT_MASK) | MALI_MMU_INTERRUPT_READ_BUS_ERROR);
            MALI_PRINT_ERROR(("Mali MMU: Read bus error\n"));
        }
        return _MALI_OSK_ERR_OK;
    }

    return _MALI_OSK_ERR_FAULT;
}
void mali_l2_cache_unlock_power_state(struct mali_l2_cache_core *cache)
{
	/* Release PM lock */
	mali_pm_unlock();
}