Esempio n. 1
0
int max8907c_pwr_en_config(void)
{
	int ret;
	u8 data;

	if (!max8907c_client)
		return -EINVAL;

	/*
	 * Enable/disable PWREN h/w control mechanism (PWREN signal must be
	 * inactive = high at this time)
	 */
	ret = max8907c_set_bits(max8907c_client, MAX8907C_REG_RESET_CNFG,
					MAX8907C_MASK_PWR_EN, MAX8907C_PWR_EN);
	if (ret != 0)
		return ret;

	/*
	 * When enabled, connect PWREN to SEQ2 by clearing SEQ2 configuration
	 * settings for silicon revision that requires s/w WAR. On other
	 * MAX8907B revisions PWREN is always connected to SEQ2.
	 */
	data = max8907c_reg_read(max8907c_client, MAX8907C_REG_II2RR);

	if (data == MAX8907B_II2RR_PWREN_WAR) {
		data = 0x00;
		ret = max8907c_reg_write(max8907c_client, MAX8907C_REG_SEQ2CNFG, data);
	}
	return ret;
}
Esempio n. 2
0
int max8907c_pwr_en_attach(void)
{
	int ret;

	if (!max8907c_client)
		return -EINVAL;

	/* No sequencer delay for CPU rail when it is attached */
	ret = max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT1,
							MAX8907C_DELAY_CNT0);
	if (ret != 0)
		return ret;

	return max8907c_set_bits(max8907c_client, MAX8907C_REG_SDCTL1,
					MAX8907C_MASK_CTL_SEQ, MAX8907C_CTL_SEQ);
}
Esempio n. 3
0
static __devexit int max8907c_charger_remove(struct platform_device *pdev)
{
	struct max8907c_charger *charger = platform_get_drvdata(pdev);
	struct max8907c *chip = charger->chip;
	int ret;

	ret = max8907c_reg_write(charger->i2c, MAX8907C_REG_CHG_IRQ1_MASK, 0xFF);
	if (unlikely(ret != 0)) {
		pr_err("Failed to set IRQ1_MASK: %d\n", ret);
		goto out;
	}

	free_irq(chip->irq_base + MAX8907C_IRQ_VCHG_DC_R, charger);
	free_irq(chip->irq_base + MAX8907C_IRQ_VCHG_DC_F, charger);
	power_supply_unregister(&max8907c_charger_ps);
out:
	kfree(charger);
	return 0;
}
Esempio n. 4
0
static void max8907c_set_charger(struct max8907c_charger *charger)
{
	struct max8907c_charger_pdata *pdata = charger->pdata;
	int ret;
	if (charger->online) {
		ret = max8907c_reg_write(charger->i2c, MAX8907C_REG_CHG_CNTL1,
					 (pdata->topoff_threshold << 5) |
					 (pdata->restart_hysteresis << 3) |
					 (pdata->fast_charging_current));
		if (unlikely(ret != 0))
			pr_err("Failed to set CHG_CNTL1: %d\n", ret);

		ret = max8907c_set_bits(charger->i2c, MAX8907C_REG_CHG_CNTL2,
					0x30, pdata->fast_charger_time << 4);
		if (unlikely(ret != 0))
			pr_err("Failed to set CHG_CNTL2: %d\n", ret);
	} else {
		ret = max8907c_set_bits(charger->i2c, MAX8907C_REG_CHG_CNTL1, 0x80, 0x1);
		if (unlikely(ret != 0))
			pr_err("Failed to set CHG_CNTL1: %d\n", ret);
	}
}
Esempio n. 5
0
void max8907c_deep_sleep(int enter)
{
	if (!max8907c_client)
		return;

	if (enter) {
		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT1,
						MAX8907C_POWER_UP_DELAY_CNT12);
		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT2,
							MAX8907C_DELAY_CNT0);
		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDCTL2,
							MAX8907C_SD_SEQ2);
	} else {
		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT1,
							MAX8907C_DELAY_CNT0);
		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDCTL2,
							MAX8907C_SD_SEQ1);
		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT2,
				MAX8907C_POWER_UP_DELAY_CNT1 | MAX8907C_POWER_DOWN_DELAY_CNT12);
	}
}
Esempio n. 6
0
int max8907c_power_off(void)
{
	if (!max8907c_client)
		return -EINVAL;

    //                                                       
#if defined (CONFIG_MACH_STAR) || defined (CONFIG_MACH_BSSQ)

        // Disable WLED (Qwerty LED or touch LED)
        max8907c_reg_write(max8907c_client, MAX8907C_REG_ILED_CNTL, 0x00);
    
        // Disable all regulators i2c controlled, set value as i2c_enabled, discharge res connected, output disabled
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL3, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL4, 0x1e);
//        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL5, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL6, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL7, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL8, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL9, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL10, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL11, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL12, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL13, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL14, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL15, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL16, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL17, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL18, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL19, 0x1e);
        max8907c_reg_write(max8907c_client, MAX8907C_REG_LDOCTL20, 0x1e);
    
        // Disable PWREN, SW Power off SEQ1, SFT reset
        return max8907c_set_bits(max8907c_client, MAX8907C_REG_RESET_CNFG,
                            0xe0, 0x60);
#else
        return max8907c_set_bits(max8907c_client, MAX8907C_REG_RESET_CNFG,
                            MAX8907C_MASK_POWER_OFF, 0x40);
#endif
    //                                                       
}