//---------------------------------------------------------------------- static void add_stkpnt(sval_t v) { if ( !may_trace_sp() ) return; func_t *pfn = get_func(cmd.ea); if ( pfn == NULL ) return; add_auto_stkpnt2(pfn, cmd.ea+cmd.size, v); }
//---------------------------------------------------------------------- int idaapi emu(void) { uint32 Feature = cmd.get_canon_feature(); int flag1 = is_forced_operand(cmd.ea, 0); int flag2 = is_forced_operand(cmd.ea, 1); int flag3 = is_forced_operand(cmd.ea, 2); flow = ((Feature & CF_STOP) == 0); if ( Feature & CF_USE1 ) process_operand(cmd.Op1, flag1, 1); if ( Feature & CF_USE2 ) process_operand(cmd.Op2, flag2, 1); if ( Feature & CF_USE3 ) process_operand(cmd.Op3, flag3, 1); if ( Feature & CF_CHG1 ) process_operand(cmd.Op1, flag1, 0); if ( Feature & CF_CHG2 ) process_operand(cmd.Op2, flag2, 0); if ( Feature & CF_CHG3 ) process_operand(cmd.Op3, flag3, 0); // // Check for table and generic indirect jumps // if ( cmd.itype == H8_jmp && cmd.Op1.type == o_phrase ) { if ( !check_for_table_jump() ) check_for_generic_indirect_jump(); } if ( cmd.itype == H8_jsr && cmd.Op1.type == o_phrase ) { check_for_generic_indirect_call(); } // // Determine if the next instruction should be executed // if ( segtype(cmd.ea) == SEG_XTRN ) flow = 0; if ( flow ) ua_add_cref(0,cmd.ea+cmd.size,fl_F); // // Handle SP modifications // if ( may_trace_sp() ) { if ( !flow ) recalc_spd(cmd.ea); // recalculate SP register for the next insn else trace_sp(); } return 1; }
//---------------------------------------------------------------------- int emu(void) { uint32 feature = cmd.get_canon_feature(); flow = (feature & CF_STOP) == 0; if ((cmd.auxpref & DBrFlag) == 0) // У отложенных переходов не надо обрабатывать операнды, т.к. // регистры и так не обрабатываются, а адр. перехода будет обработан через 3 команды { if ( feature & CF_USE1 ) process_operand(cmd.Op1, 1); if ( feature & CF_USE2 ) process_operand(cmd.Op2, 1); if ( feature & CF_USE3 ) process_operand(cmd.Op3, 1); if ( feature & CF_CHG1 ) process_operand(cmd.Op1, 0); if ( feature & CF_CHG2 ) process_operand(cmd.Op2, 0); if ( feature & CF_CHG3 ) process_operand(cmd.Op3, 0); } if (GetDelayedBranchAdr() != BADADDR) // добавить ссылку по отложенному переходу ua_add_cref(0, toEA(cmd.cs, GetDelayedBranchAdr()), fl_JN); if (cmd.itype == TMS320C3X_RETScond) // добавить ссылку по условному выходу ua_add_cref(0, cmd.ea, fl_JN); // check for DP changes if ( ((cmd.itype == TMS320C3X_LDIcond) || (cmd.itype == TMS320C3X_LDI)) && (cmd.Op1.type == o_imm) && (cmd.Op2.type == o_reg) && (cmd.Op2.reg == dp)) splitSRarea1(get_item_end(cmd.ea), dp, cmd.Op1.value & 0xFF, SR_auto); // determine if the next instruction should be executed if ( segtype(cmd.ea) == SEG_XTRN ) flow = 0; if ( flow && delayed_stop() ) flow = 0; if ( flow ) ua_add_cref(0,cmd.ea+cmd.size,fl_F); if ( may_trace_sp() ) { if ( !flow ) recalc_spd(cmd.ea); // recalculate SP register for the next insn else trace_sp(); } return 1; }
//---------------------------------------------------------------------- int emu(void) { uint32 feature = cmd.get_canon_feature(); flow = (feature & CF_STOP) == 0; if ( feature & CF_USE1 ) process_operand(cmd.Op1, 1); if ( feature & CF_USE2 ) process_operand(cmd.Op2, 1); if ( feature & CF_USE3 ) process_operand(cmd.Op3, 1); if ( feature & CF_CHG1 ) process_operand(cmd.Op1, 0); if ( feature & CF_CHG2 ) process_operand(cmd.Op2, 0); if ( feature & CF_CHG3 ) process_operand(cmd.Op3, 0); // check for CPL changes if ((cmd.itype == TMS320C54_rsbx1 || cmd.itype == TMS320C54_ssbx1) && cmd.Op1.type == o_reg && cmd.Op1.reg == CPL) splitSRarea1(get_item_end(cmd.ea), CPL, cmd.itype == TMS320C54_rsbx1 ? 0 : 1, SR_auto); // check for DP changes if (cmd.itype == TMS320C54_ld2 && cmd.Op1.type == o_imm && cmd.Op1.dtyp == dt_byte && cmd.Op2.type == o_reg && cmd.Op2.reg == DP) splitSRarea1(get_item_end(cmd.ea), DP, cmd.Op1.value & 0x1FF, SR_auto); // determine if the next instruction should be executed if ( segtype(cmd.ea) == SEG_XTRN ) flow = 0; if ( flow && delayed_stop() ) flow = 0; if ( flow ) ua_add_cref(0,cmd.ea+cmd.size,fl_F); if ( may_trace_sp() ) { if ( !flow ) recalc_spd(cmd.ea); // recalculate SP register for the next insn else trace_sp(); } return 1; }
//---------------------------------------------------------------------- int idaapi emu(void) { uint32 Feature = cmd.get_canon_feature(); int flag1 = is_forced_operand(cmd.ea, 0); int flag2 = is_forced_operand(cmd.ea, 1); int flag3 = is_forced_operand(cmd.ea, 2); flow = ((Feature & CF_STOP) == 0); if ( Feature & CF_USE1 ) process_operand(cmd.Op1, flag1, 1); if ( Feature & CF_USE2 ) process_operand(cmd.Op2, flag2, 1); if ( Feature & CF_USE3 ) process_operand(cmd.Op3, flag3, 1); if ( Feature & CF_CHG1 ) process_operand(cmd.Op1, flag1, 0); if ( Feature & CF_CHG2 ) process_operand(cmd.Op2, flag2, 0); if ( Feature & CF_CHG3 ) process_operand(cmd.Op3, flag3, 0); // // Determine if the next instruction should be executed // if ( segtype(cmd.ea) == SEG_XTRN ) flow = false; // // Handle loads to segment registers // sel_t v = BADSEL; switch ( cmd.itype ) { case H8500_andc: if ( cmd.Op1.value == 0 ) v = 0; goto SPLIT; case H8500_orc: if ( cmd.Op1.value == 0xFF ) v = 0xFF; goto SPLIT; case H8500_ldc: if ( cmd.Op1.type == o_imm ) v = cmd.Op1.value; case H8500_xorc: SPLIT: if ( cmd.Op2.reg >= BR && cmd.Op2.reg <= TP ) split_srarea(cmd.ea+cmd.size, cmd.Op2.reg, v, SR_auto); break; } if ( (Feature & CF_CALL) != 0 ) { ea_t callee = find_callee(); if ( !handle_function_call(callee) ) flow = false; } // // Handle SP modifications // if ( may_trace_sp() ) { func_t *pfn = get_func(cmd.ea); if ( pfn != NULL ) { if ( (pfn->flags & FUNC_USERFAR) == 0 && (pfn->flags & FUNC_FAR) == 0 && is_far_ending() ) { pfn->flags |= FUNC_FAR; update_func(pfn); reanalyze_callers(pfn->startEA, 0); } if ( !flow ) recalc_spd(cmd.ea); // recalculate SP register for the next insn else trace_sp(); } } if ( flow ) ua_add_cref(0, cmd.ea+cmd.size, fl_F); return 1; }
//---------------------------------------------------------------------- int emu(void) { if ( segtype(cmd.ea) == SEG_XTRN ) return 1; //uint32 Feature = cmd.get_canon_feature(); int flag1 = is_forced_operand(cmd.ea, 0); int flag2 = is_forced_operand(cmd.ea, 1); int flag3 = is_forced_operand(cmd.ea, 2); // Determine if the next instruction should be executed flow = (InstrIsSet(cmd.itype, CF_STOP) != true); if ( InstrIsSet(cmd.itype,CF_USE1) ) process_operand(cmd.Op1, flag1, 1); if ( InstrIsSet(cmd.itype,CF_USE2) ) process_operand(cmd.Op2, flag2, 1); if ( InstrIsSet(cmd.itype,CF_USE3) ) process_operand(cmd.Op3, flag3, 1); if ( InstrIsSet(cmd.itype,CF_CHG1) ) process_operand(cmd.Op1, flag1, 0); if ( InstrIsSet(cmd.itype,CF_CHG2) ) process_operand(cmd.Op2, flag2, 0); if ( InstrIsSet(cmd.itype,CF_CHG3) ) process_operand(cmd.Op3, flag3, 0); // check for DP changes if ( cmd.itype == OAK_Dsp_lpg ) splitSRarea1(get_item_end(cmd.ea), PAGE, cmd.Op1.value & 0xFF, SR_auto); if ( ( cmd.itype == OAK_Dsp_mov ) && (cmd.Op1.type == o_imm) && (cmd.Op2.type == o_reg) && (cmd.Op2.reg == ST1) ) splitSRarea1(get_item_end(cmd.ea), PAGE, cmd.Op1.value & 0xFF, SR_auto); //Delayed Return insn_t saved = cmd; cycles = cmd.cmd_cycles; delayed = false; if ( decode_prev_insn(cmd.ea) != BADADDR ) { if ( (cmd.itype == OAK_Dsp_retd) || (cmd.itype == OAK_Dsp_retid) ) delayed = true; else cycles += cmd.cmd_cycles; if (!delayed) if ( decode_prev_insn(cmd.ea) != BADADDR ) if ( (cmd.itype == OAK_Dsp_retd) || (cmd.itype == OAK_Dsp_retid) ) delayed = true; } if (delayed && (cycles > 1) ) flow = 0; cmd = saved; //mov #imm, pc if ( ( cmd.itype == OAK_Dsp_mov ) && (cmd.Op2.type == o_reg) && (cmd.Op2.reg == PC) ) flow = 0; if ( flow ) ua_add_cref(0,cmd.ea+cmd.size,fl_F); if ( may_trace_sp() ) { if ( !flow ) recalc_spd(cmd.ea); // recalculate SP register for the next insn else trace_sp(); } return 1; }