/* * Sets or clears DTR and RTS on the requested line. */ static void mcfrs_setsignals(struct mcf_serial *info, int dtr, int rts) { volatile unsigned char *uartp; unsigned long flags; #if 0 printk("%s(%d): mcfrs_setsignals(info=%x,dtr=%d,rts=%d)\n", __FILE__, __LINE__, info, dtr, rts); #endif local_irq_save(flags); if (dtr >= 0) { #ifdef MCFPP_DTR0 if (info->line) mcf_setppdata(MCFPP_DTR1, (dtr ? 0 : MCFPP_DTR1)); else mcf_setppdata(MCFPP_DTR0, (dtr ? 0 : MCFPP_DTR0)); #endif } if (rts >= 0) { uartp = info->addr; if (rts) { info->sigs |= TIOCM_RTS; uartp[MCFUART_UOP1] = MCFUART_UOP_RTS; } else { info->sigs &= ~TIOCM_RTS; uartp[MCFUART_UOP0] = MCFUART_UOP_RTS; } } local_irq_restore(flags); return; }
static void __init nettel_smc91x_init(void) { writew(0x00ec, MCF_MBAR + MCFSIM_PADDR); mcf_setppdata(0, 0x0080); writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT); writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR); mcf_setppdata(0x0080, 0); /* Set correct chip select timing for SMC9196 accesses */ writew(0x1180, MCF_MBAR + MCFSIM_CSCR3); /* Set the SMC interrupts to be auto-vectored */ mcf_autovector(NETTEL_SMC0_IRQ); mcf_autovector(NETTEL_SMC1_IRQ); /* Set MAC addresses from flash for both interfaces */ nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000); nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006); }