/*
* set refreshing area
*/
int mdfld_dsi_dbi_update_area(struct mdfld_dsi_dbi_output *dbi_output,
u16 x1, u16 y1, u16 x2, u16 y2)
{
struct mdfld_dsi_pkg_sender *sender =
mdfld_dsi_encoder_get_pkg_sender(&dbi_output->base);
u8 param[4];
u8 cmd;
int err;
if (!sender) {
WARN_ON(1);
return -EINVAL;
}
/* Set column */
cmd = DCS_SET_COLUMN_ADDRESS;
param[0] = x1 >> 8;
param[1] = x1;
param[2] = x2 >> 8;
param[3] = x2;
err = mdfld_dsi_send_dcs(sender,
cmd,
param,
4,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(sender->dev->dev, "DCS 0x%x sent failed\n", cmd);
goto err_out;
}
/* Set page */
cmd = DCS_SET_PAGE_ADDRESS;
param[0] = y1 >> 8;
param[1] = y1;
param[2] = y2 >> 8;
param[3] = y2;
err = mdfld_dsi_send_dcs(sender,
cmd,
param,
4,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(sender->dev->dev, "DCS 0x%x sent failed\n", cmd);
goto err_out;
}
/*update screen*/
err = mdfld_dsi_send_dcs(sender,
write_mem_start,
NULL,
0,
CMD_DATA_SRC_PIPE,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(sender->dev->dev, "DCS 0x%x sent failed\n", cmd);
goto err_out;
}
mdfld_dsi_cmds_kick_out(sender);
err_out:
return err;
}
/*
* set panel's power state
*/
int mdfld_dsi_dbi_update_power(struct mdfld_dsi_dbi_output *dbi_output,
int mode)
{
struct drm_device *dev = dbi_output->dev;
struct mdfld_dsi_pkg_sender *sender =
mdfld_dsi_encoder_get_pkg_sender(&dbi_output->base);
u8 param = 0;
u32 err = 0;
if (!sender) {
WARN_ON(1);
return -EINVAL;
}
if (mode == DRM_MODE_DPMS_ON) {
/* Exit sleep mode */
err = mdfld_dsi_send_dcs(sender,
DCS_EXIT_SLEEP_MODE,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(dev->dev, "DCS 0x%x sent failed\n",
DCS_EXIT_SLEEP_MODE);
goto power_err;
}
/* Set display on */
err = mdfld_dsi_send_dcs(sender,
DCS_SET_DISPLAY_ON,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(dev->dev, "DCS 0x%x sent failed\n",
DCS_SET_DISPLAY_ON);
goto power_err;
}
/* set tear effect on */
err = mdfld_dsi_send_dcs(sender,
DCS_SET_TEAR_ON,
¶m,
1,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(dev->dev, "DCS 0x%x sent failed\n",
set_tear_on);
goto power_err;
}
/**
* FIXME: remove this later
*/
err = mdfld_dsi_send_dcs(sender,
DCS_WRITE_MEM_START,
NULL,
0,
CMD_DATA_SRC_PIPE,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(dev->dev, "DCS 0x%x sent failed\n",
DCS_WRITE_MEM_START);
goto power_err;
}
} else {
/* Set tear effect off */
err = mdfld_dsi_send_dcs(sender,
DCS_SET_TEAR_OFF,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(dev->dev, "DCS 0x%x sent failed\n",
DCS_SET_TEAR_OFF);
goto power_err;
}
/* Turn display off */
err = mdfld_dsi_send_dcs(sender,
DCS_SET_DISPLAY_OFF,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(dev->dev, "DCS 0x%x sent failed\n",
DCS_SET_DISPLAY_OFF);
goto power_err;
}
/* Now enter sleep mode */
err = mdfld_dsi_send_dcs(sender,
DCS_ENTER_SLEEP_MODE,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_QUEUE_PACKAGE);
if (err) {
dev_err(dev->dev, "DCS 0x%x sent failed\n",
DCS_ENTER_SLEEP_MODE);
goto power_err;
}
}
mdfld_dsi_cmds_kick_out(sender);
power_err:
return err;
}
static
void jdi_cmd_controller_init(
struct mdfld_dsi_config *dsi_config)
{
struct mdfld_dsi_hw_context *hw_ctx =
&dsi_config->dsi_hw_context;
#ifdef ENABLE_CSC_GAMMA /*FIXME*/
struct drm_device *dev = dsi_config->dev;
struct csc_setting csc = {
.pipe = 0,
.type = CSC_REG_SETTING,
.enable_state = true,
.data_len = CSC_REG_COUNT,
.data.csc_reg_data = {
0xFFB0424, 0xFDF, 0x4320FF1,
0xFDC, 0xFF50FF5, 0x415}
};
struct gamma_setting gamma = {
.pipe = 0,
.type = GAMMA_REG_SETTING,
.enable_state = true,
.data_len = GAMMA_10_BIT_TABLE_COUNT,
.gamma_tableX100 = {
0x000000, 0x030303, 0x050505, 0x070707,
0x090909, 0x0C0C0C, 0x0E0E0E, 0x101010,
0x121212, 0x141414, 0x171717, 0x191919,
0x1B1B1B, 0x1D1D1D, 0x1F1F1F, 0x212121,
0x232323, 0x252525, 0x282828, 0x2A2A2A,
0x2C2C2C, 0x2E2E2E, 0x303030, 0x323232,
0x343434, 0x363636, 0x383838, 0x3A3A3A,
0x3C3C3C, 0x3E3E3E, 0x404040, 0x424242,
0x444444, 0x464646, 0x484848, 0x4A4A4A,
0x4C4C4C, 0x4E4E4E, 0x505050, 0x525252,
0x545454, 0x565656, 0x585858, 0x5A5A5A,
0x5C5C5C, 0x5E5E5E, 0x606060, 0x626262,
0x646464, 0x666666, 0x686868, 0x6A6A6A,
0x6C6C6C, 0x6E6E6E, 0x707070, 0x727272,
0x747474, 0x767676, 0x787878, 0x7A7A7A,
0x7C7C7C, 0x7E7E7E, 0x808080, 0x828282,
0x848484, 0x868686, 0x888888, 0x8A8A8A,
0x8C8C8C, 0x8E8E8E, 0x909090, 0x929292,
0x949494, 0x969696, 0x989898, 0x999999,
0x9B9B9B, 0x9D9D9D, 0x9F9F9F, 0xA1A1A1,
0xA3A3A3, 0xA5A5A5, 0xA7A7A7, 0xA9A9A9,
0xABABAB, 0xADADAD, 0xAFAFAF, 0xB1B1B1,
0xB3B3B3, 0xB5B5B5, 0xB6B6B6, 0xB8B8B8,
0xBABABA, 0xBCBCBC, 0xBEBEBE, 0xC0C0C0,
0xC2C2C2, 0xC4C4C4, 0xC6C6C6, 0xC8C8C8,
0xCACACA, 0xCCCCCC, 0xCECECE, 0xCFCFCF,
0xD1D1D1, 0xD3D3D3, 0xD5D5D5, 0xD7D7D7,
0xD9D9D9, 0xDBDBDB, 0xDDDDDD, 0xDFDFDF,
0xE1E1E1, 0xE3E3E3, 0xE4E4E4, 0xE6E6E6,
0xE8E8E8, 0xEAEAEA, 0xECECEC, 0xEEEEEE,
0xF0F0F0, 0xF2F2F2, 0xF4F4F4, 0xF6F6F6,
0xF7F7F7, 0xF9F9F9, 0xFBFBFB, 0xFDFDFD}
};
#endif
PSB_DEBUG_ENTRY("\n");
/*reconfig lane configuration*/
dsi_config->lane_count = 3;
dsi_config->lane_config = MDFLD_DSI_DATA_LANE_4_0;
/* FIXME: enable CSC and GAMMA */
/*dsi_config->enable_gamma_csc = ENABLE_GAMMA | ENABLE_CSC;*/
/* This is for 400 mhz. Set it to 0 for 800mhz */
hw_ctx->cck_div = 1;
hw_ctx->pll_bypass_mode = 0;
hw_ctx->mipi_control = 0x0;
hw_ctx->intr_en = 0xFFFFFFFF;
hw_ctx->hs_tx_timeout = 0xFFFFFF;
hw_ctx->lp_rx_timeout = 0xFFFFFF;
hw_ctx->device_reset_timer = 0xffff;
hw_ctx->turn_around_timeout = 0x1a;
hw_ctx->high_low_switch_count = 0x21;
hw_ctx->clk_lane_switch_time_cnt = 0x21000f;
hw_ctx->lp_byteclk = 0x5;
hw_ctx->dphy_param = 0x25155b1e;
hw_ctx->eot_disable = 0x3;
hw_ctx->init_count = 0xf0;
hw_ctx->dbi_bw_ctrl = 1390;
hw_ctx->hs_ls_dbi_enable = 0x0;
hw_ctx->dsi_func_prg = ((DBI_DATA_WIDTH_OPT2 << 13) |
dsi_config->lane_count);
hw_ctx->mipi = PASS_FROM_SPHY_TO_AFE |
BANDGAP_CHICKEN_BIT |
TE_TRIGGER_GPIO_PIN;
hw_ctx->video_mode_format = 0xf;
#ifdef ENABLE_CSC_GAMMA /*FIXME*/
if (dsi_config->enable_gamma_csc & ENABLE_CSC) {
/* setting the tuned csc setting */
drm_psb_enable_color_conversion = 1;
mdfld_intel_crtc_set_color_conversion(dev, &csc);
}
if (dsi_config->enable_gamma_csc & ENABLE_GAMMA) {
/* setting the tuned gamma setting */
drm_psb_enable_gamma = 1;
mdfld_intel_crtc_set_gamma(dev, &gamma);
}
#endif
}
static
int jdi_cmd_panel_connection_detect(
struct mdfld_dsi_config *dsi_config)
{
int status;
int pipe = dsi_config->pipe;
PSB_DEBUG_ENTRY("\n");
if (pipe == 0) {
status = MDFLD_DSI_PANEL_CONNECTED;
} else {
DRM_INFO("%s: do NOT support dual panel\n",
__func__);
status = MDFLD_DSI_PANEL_DISCONNECTED;
}
return status;
}
static
int jdi_cmd_power_on(
struct mdfld_dsi_config *dsi_config)
{
struct mdfld_dsi_pkg_sender *sender =
mdfld_dsi_get_pkg_sender(dsi_config);
int err = 0;
PSB_DEBUG_ENTRY("\n");
if (!sender) {
DRM_ERROR("Failed to get DSI packet sender\n");
return -EINVAL;
}
err = mdfld_dsi_send_mcs_short_hs(sender,
set_address_mode, 0x0, 1,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("%s: %d: Set Address Mode\n",
__func__, __LINE__);
goto power_err;
}
usleep_range(20000, 20100);
err = mdfld_dsi_send_mcs_short_hs(sender,
set_pixel_format, 0x77, 1,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("%s: %d: Set Pixel format\n",
__func__, __LINE__);
goto power_err;
}
/*turn on display*/
err = mdfld_dsi_send_dcs(sender,
set_display_on,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("faild to set_display_on mode\n");
goto power_err;
}
usleep_range(20000, 20100);
power_err:
return err;
}
static void __vpro2_power_ctrl(bool on)
{
u8 addr, value;
addr = 0xad;
if (intel_scu_ipc_ioread8(addr, &value))
DRM_ERROR("%s: %d: failed to read vPro2\n",
__func__, __LINE__);
/* Control vPROG2 power rail with 2.85v. */
if (on)
value |= 0x1;
else
value &= ~0x1;
if (intel_scu_ipc_iowrite8(addr, value))
DRM_ERROR("%s: %d: failed to write vPro2\n",
__func__, __LINE__);
}
static
void intel_dsi_dbi_update_fb(struct mdfld_dsi_dbi_output *dbi_output)
{
struct mdfld_dsi_pkg_sender *sender;
struct drm_device *dev = dbi_output->dev;
struct drm_crtc *crtc = dbi_output->base.base.crtc;
struct psb_intel_crtc *psb_crtc =
(crtc) ? to_psb_intel_crtc(crtc) : NULL;
int pipe = dbi_output->channel_num ? 2 : 0;
u32 dpll_reg = MRST_DPLL_A;
u32 dspcntr_reg = DSPACNTR;
u32 pipeconf_reg = PIPEACONF;
u32 dsplinoff_reg = DSPALINOFF;
u32 dspsurf_reg = DSPASURF;
sender = mdfld_dsi_encoder_get_pkg_sender(&dbi_output->base);
if (!sender) {
DRM_ERROR("pkg sender is NULL\n");
return;
}
/* if mode setting on-going, back off */
if (!IS_ANN(dev)) {
if ((dbi_output->mode_flags & MODE_SETTING_ON_GOING) ||
(psb_crtc && (psb_crtc->mode_flags & MODE_SETTING_ON_GOING)) ||
!(dbi_output->mode_flags & MODE_SETTING_ENCODER_DONE))
return;
}
if (pipe == 2) {
dspcntr_reg = DSPCCNTR;
pipeconf_reg = PIPECCONF;
dsplinoff_reg = DSPCLINOFF;
dspsurf_reg = DSPCSURF;
}
/* check DBI FIFO status */
if (is_panel_vid_or_cmd(dev) == MDFLD_DSI_ENCODER_DBI) {
if (!(REG_READ(dspcntr_reg) & DISPLAY_PLANE_ENABLE) ||
!(REG_READ(pipeconf_reg) & DISPLAY_PLANE_ENABLE))
return;
} else if (!(REG_READ(dpll_reg) & DPLL_VCO_ENABLE) ||
!(REG_READ(dspcntr_reg) & DISPLAY_PLANE_ENABLE) ||
!(REG_READ(pipeconf_reg) & DISPLAY_PLANE_ENABLE))
return;
if (!IS_ANN(dev)) {
/* refresh plane changes */
REG_WRITE(dsplinoff_reg, REG_READ(dsplinoff_reg));
REG_WRITE(dspsurf_reg, REG_READ(dspsurf_reg));
REG_READ(dspsurf_reg);
}
mdfld_dsi_send_dcs(sender,
write_mem_start,
NULL,
0,
CMD_DATA_SRC_PIPE,
MDFLD_DSI_SEND_PACKAGE);
dbi_output->dsr_fb_update_done = true;
mdfld_dsi_cmds_kick_out(sender);
}
static int __mdfld_auo_dsi_power_on(struct mdfld_dsi_config *dsi_config)
{
struct mdfld_dsi_pkg_sender *sender =
mdfld_dsi_get_pkg_sender(dsi_config);
u8 cmd = 0;
u8 param = 0;
u8 param_set[4];
int err = 0;
PSB_DEBUG_ENTRY("\n");
if (!sender) {
DRM_ERROR("Failed to get DSI packet sender\n");
return -EINVAL;
}
/* Send DCS commands. */
cmd = exit_sleep_mode;
err = mdfld_dsi_send_dcs(sender,
cmd,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
msleep(120);
cmd = write_display_brightness;
err = mdfld_dsi_send_mcs_short_hs(sender,
cmd,
(u8)0xff,
1,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
cmd = write_ctrl_cabc;
err = mdfld_dsi_send_mcs_short_hs(sender,
cmd,
MOVING_IMAGE,
1,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
cmd = write_ctrl_display;
err = mdfld_dsi_send_mcs_short_hs(sender,
cmd,
BRIGHT_CNTL_BLOCK_ON | DISPLAY_DIMMING_ON,
1,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
cmd = set_tear_on;
err = mdfld_dsi_send_dcs(sender,
cmd,
¶m,
1,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
cmd = set_column_address;
param_set[0] = 0 >> 8;
param_set[1] = 0;
param_set[2] = 539 >> 8;
param_set[3] = (u8)539;
err = mdfld_dsi_send_dcs(sender,
cmd,
param_set,
4,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
cmd = set_page_addr;
param_set[0] = 0 >> 8;
param_set[1] = 0;
param_set[2] = 959 >> 8;
param_set[3] = (u8)959;
err = mdfld_dsi_send_dcs(sender,
cmd,
param_set,
4,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
cmd = set_display_on;
err = mdfld_dsi_send_dcs(sender,
cmd,
NULL,
0,
CMD_DATA_SRC_SYSTEM_MEM,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
cmd = write_ctrl_display;
err = mdfld_dsi_send_mcs_short_hs(sender,
cmd,
BRIGHT_CNTL_BLOCK_ON | DISPLAY_DIMMING_ON |
BACKLIGHT_ON,
1,
MDFLD_DSI_SEND_PACKAGE);
if (err) {
DRM_ERROR("DCS 0x%x sent failed\n", cmd);
return err;
}
return err;
}