Esempio n. 1
0
int mdss_mdp_irq_enable(u32 intr_type, u32 intf_num)
{
	u32 irq;
	unsigned long irq_flags;
	int ret = 0;

	irq = mdss_mdp_irq_mask(intr_type, intf_num);

	spin_lock_irqsave(&mdp_lock, irq_flags);
	if (mdss_res->mdp_irq_mask & irq) {
		pr_warn("MDSS MDP IRQ-0x%x is already set, mask=%x\n",
				irq, mdss_res->mdp_irq_mask);
		ret = -EBUSY;
	} else {
		pr_debug("MDP IRQ mask old=%x new=%x\n",
				mdss_res->mdp_irq_mask, irq);
		mdss_res->mdp_irq_mask |= irq;
		MDSS_MDP_REG_WRITE(MDSS_MDP_REG_INTR_CLEAR, irq);
		MDSS_MDP_REG_WRITE(MDSS_MDP_REG_INTR_EN,
				mdss_res->mdp_irq_mask);
		mdss_enable_irq(&mdss_mdp_hw);
	}
	spin_unlock_irqrestore(&mdp_lock, irq_flags);

	return ret;
}
Esempio n. 2
0
void mdss_dsi_irq_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, int enable, int isr)
{
	unsigned long flags;

	if (ctrl == NULL) {
		pr_err("%s: Invalid ctrl\n", __func__);
		return;
	}

	spin_lock_irqsave(&dsi_irq_lock, flags);
	if (enable) {
		if (ctrl->irq_cnt == 0)
			mdss_enable_irq(ctrl->mdss_hw);
		ctrl->irq_cnt++;
	} else {
		if (ctrl->irq_cnt) {
			ctrl->irq_cnt--;
			if (ctrl->irq_cnt == 0) {
				if (isr)
					mdss_disable_irq_nosync(ctrl->mdss_hw);
				else
					mdss_disable_irq(ctrl->mdss_hw);
			}
		}
	}
	pr_debug("%s: ctrl=%d enable=%d cnt=%d\n", __func__,
					ctrl->ndx, enable, ctrl->irq_cnt);
	spin_unlock_irqrestore(&dsi_irq_lock, flags);
}
Esempio n. 3
0
static void mdss_edp_irq_enable(struct mdss_edp_drv_pdata *edp_drv)
{
	edp_write(edp_drv->base + 0x308, EDP_INTR_MASK1);
	edp_write(edp_drv->base + 0x30c, EDP_INTR_MASK2);

	mdss_enable_irq(&mdss_edp_hw);
}
Esempio n. 4
0
static void mdss_edp_irq_enable(struct mdss_edp_drv_pdata *edp_drv)
{
	unsigned long flags;

	spin_lock_irqsave(&edp_drv->lock, flags);
	edp_write(edp_drv->base + 0x308, edp_drv->mask1);
	edp_write(edp_drv->base + 0x30c, edp_drv->mask2);
	spin_unlock_irqrestore(&edp_drv->lock, flags);

	mdss_enable_irq(&mdss_edp_hw);
}
void mdss_dsi_enable_irq(struct mdss_dsi_ctrl_pdata *ctrl, u32 term)
{
	unsigned long flags;

	spin_lock_irqsave(&ctrl->irq_lock, flags);
	if (ctrl->dsi_irq_mask & term) {
		spin_unlock_irqrestore(&ctrl->irq_lock, flags);
		return;
	}
	if (ctrl->dsi_irq_mask == 0) {
		mdss_enable_irq(ctrl->dsi_hw);
		pr_debug("%s: IRQ Enable, ndx=%d mask=%x term=%x\n", __func__,
			ctrl->ndx, (int)ctrl->dsi_irq_mask, (int)term);
	}
	ctrl->dsi_irq_mask |= term;
	spin_unlock_irqrestore(&ctrl->irq_lock, flags);
}
void mdss_dsi_enable_irq(struct mdss_dsi_ctrl_pdata *ctrl, u32 term)
{
	unsigned long flags;

	spin_lock_irqsave(&ctrl->irq_lock, flags);
#if defined (CONFIG_FB_MSM_MDSS_DSI_DBG)
	xlog(__func__, ctrl->ndx, term, ctrl->dsi_irq_mask, (u32)ctrl->dsi_hw, 0, 0xB);
#endif
	if (ctrl->dsi_irq_mask & term) {
		spin_unlock_irqrestore(&ctrl->irq_lock, flags);
		return;
	}
	if (ctrl->dsi_irq_mask == 0) {
		mdss_enable_irq(ctrl->dsi_hw);
		pr_debug("%s: IRQ Enable, ndx=%d mask=%x term=%x\n", __func__,
			ctrl->ndx, (int)ctrl->dsi_irq_mask, (int)term);
	}
	ctrl->dsi_irq_mask |= term;
#if defined (CONFIG_FB_MSM_MDSS_DSI_DBG)
	xlog(__func__, ctrl->ndx, term, ctrl->dsi_irq_mask, (u32)ctrl->dsi_hw, 0, 0xE);
#endif
	spin_unlock_irqrestore(&ctrl->irq_lock, flags);
}