static void sync()
{
mem_setprg16(0x8,latch_reg & 7);
mem_setprg16(0xC,latch_reg & 7);
mem_setchr8(0,latch_reg & 7);
ppu_setmirroring(((latch_reg >> 3) & 1) ^ 1);
}
void sachen_tca01_init(int hard)
{
read4 = mem_getread(4);
mem_setread(4,read_reg);
mem_setread(5,read_reg);
mem_setprg32(8,0);
mem_setchr8(0,0);
}
static void reset(int hard)
{
read4 = mem_getread(4);
mem_setread(4,read);
mem_setread(5,read);
mem_setprg32(8,0);
mem_setchr8(0,0);
}
static void sync()
{
if(latch_addr & 0x1E) {
mem_setprg16(0x8,latch_addr & 0x1F);
mem_setprg16(0xC,latch_addr & 0x1F);
}
else {
mem_setprg32(8,0);
}
mem_setchr8(0,latch_addr & 0x1F);
mem_setmirroring(((latch_addr >> 5) & 1) ^ 1);
}
static void sync()
{
switch(latch_reg & 0xC0) {
case 0x00:
switch(reg & 0xC0) {
case 0x40:
chr = reg & 0xF;
break;
case 0x80:
prg = reg & 0xF;
break;
}
break;
}
reg = latch_reg;
mem_setprg16(0x8,0);
mem_setprg16(0xC,prg);
mem_setchr8(0,chr);
}
static void sync()
{
switch(mode) {
case 0x00:
case 0x10:
mem_setprg16(0x8,bankhi | banklo);
mem_setprg16(0xC,bankhi | 7);
break;
case 0x20:
mem_setprg32(0x8,(bankhi | banklo) >> 1);
break;
case 0x30:
mem_setprg16(0x8,bankhi | banklo);
mem_setprg16(0xC,bankhi | banklo);
break;
}
if(revision == BMC_70IN1)
mem_setchr8(0,chrbank);
else
mem_setvram8(0,0);
mem_setmirroring(mirror);
}
static void reset(int hard)
{
mem_setwramsize(8);
//initialize all bank pointers
mem_setprg4(6,8);
mem_setwram4(7,0);
mem_setprg32(8,0);
mem_setchr8(0,0);
//get pointers to the data
prg6 = mem_getreadptr(6);
sram7 = mem_getreadptr(7);
//remove pointers to memory
mem_setreadptr(6,0);
mem_setreadptr(7,0);
mem_setwriteptr(7,0);
//insert the function pointers from here
mem_setreadfunc(6,read6);
mem_setreadfunc(7,read7);
mem_setwritefunc(7,write7);
}
static void sync()
{
mem_setprg32(8,latch_addr & 0xFF);
mem_setchr8(0,latch_addr & 0xFF);
}
static void init_128(int hard)
{
mem_setprg16(0x8,0);
mem_setprg16(0xC,0);
mem_setchr8(0,0);
}
static void init_256(int hard)
{
mem_setprg16(0x8,0);
mem_setprg16(0xC,1);
mem_setchr8(0,0);
}
static void sync()
{
mem_setprg32(8,(reg & 4) & 1);
mem_setchr8(0,reg & 3);
}
static void sync()
{
mem_setchr8(0,banks[latch_reg & 3]);
}
