u32 msm_fb_read_frame_count(void){ struct msm_fb_data_type *mfd = fbi_list[0]->par; struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd); struct mdss_mdp_ctl *ctl = mdp5_data->ctl; return ctl->play_cnt; // struct mdss_panel_info *mdss_panel = mfd->panel_info; // trace("%s, %d\n", __FUNCTION__, mdss_panel->frame_count); // return mdss_panel->frame_count; }
u32 msm_fb_read_frame_rate(void){ int rdfps = 0; struct msm_fb_data_type* mfd = fbi_list[0]->par; struct mdss_panel_info *mdss_panel = mfd->panel_info; struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd); mutex_lock(&mdp5_data->dfps_lock); rdfps = mdss_panel_get_framerate(mdss_panel); mutex_unlock(&mdp5_data->dfps_lock); return rdfps; }
int g3_display_send_event_to_mdss_display(unsigned long val, void *v){ int wdfps = 0; int ret = 0; struct mdss_panel_data *pdata; struct msm_fb_data_type* mfd = fbi_list[0]->par; struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd); struct mdss_mdp_ctl *ctl = mdp5_data->ctl; pr_debug("send_event_to_mdss_display, val=%lu, freq=%lu\n", val, g3_display_opp_table[val].freq); if (!ctl || !(ctl->power_on) || !(mfd->panel_power_on)) { pr_err("Panel is off...FPS will not be changed\n"); return -EPERM; } if(ctl->play_cnt==0) { pr_err("Vsync is not enabled...FPS will not be changed\n"); return -EPERM; } pdata = dev_get_platdata(&mfd->pdev->dev); mutex_lock(&mdp5_data->dfps_lock); wdfps = g3_display_opp_table[val].freq; if (wdfps == pdata->panel_info.mipi.frame_rate) { pr_debug("%s: FPS is already %d\n", __func__, wdfps); mutex_unlock(&mdp5_data->dfps_lock); return 0; } if (wdfps < 38) { pr_err("Unsupported FPS. Configuring to min_fps = 30\n"); wdfps = 38; ret = mdss_mdp_ctl_update_fps(mdp5_data->ctl, wdfps); } else if (wdfps > 60) { pr_err("Unsupported FPS. Configuring to max_fps = 60\n"); wdfps = 60; ret = mdss_mdp_ctl_update_fps(mdp5_data->ctl, wdfps); } else { ret = mdss_mdp_ctl_update_fps(mdp5_data->ctl, wdfps); } if (!ret) { pr_debug("%s: configured to '%d' FPS\n", __func__, wdfps); } else { pr_err("Failed to configure '%d' FPS. ret = %d\n", wdfps, ret); mutex_unlock(&mdp5_data->dfps_lock); return ret; } pdata->panel_info.new_fps = wdfps; mutex_unlock(&mdp5_data->dfps_lock); g3_cur_level = val; return 0; }
void mdss_timeout_dump(struct msm_fb_data_type *mfd, const char *timeout_type) { struct mdss_overlay_private *mdp5_data = mfd_to_mdp5_data(mfd); struct mdss_mdp_ctl *ctl = mdp5_data->ctl; if (!initialized) return; mdss_timeout_data_pos = 0; MDSS_TIMEOUT_DUMP("%s", timeout_type); mdss_interrupts_dump(); mdss_dump_ctl(ctl); dump_stack(); dropbox_queue_event_text("mdss_diag_timeout", mdss_timeout_data, mdss_timeout_data_pos); }
void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) { struct dsi_status_data *pstatus_data = NULL; struct mdss_panel_data *pdata = NULL; struct mipi_panel_info *mipi = NULL; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; struct mdss_overlay_private *mdp5_data = NULL; struct mdss_mdp_ctl *ctl = NULL; int ret = 0; pstatus_data = container_of(to_delayed_work(work), struct dsi_status_data, check_status); if (!pstatus_data || !(pstatus_data->mfd)) { pr_err("%s: mfd not available\n", __func__); return; } pdata = dev_get_platdata(&pstatus_data->mfd->pdev->dev); if (!pdata) { pr_err("%s: Panel data not available\n", __func__); return; } mipi = &pdata->panel_info.mipi; ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); if (!ctrl_pdata || (!ctrl_pdata->check_status && (ctrl_pdata->status_mode != ESD_TE))) { pr_err("%s: DSI ctrl or status_check callback not available\n", __func__); return; } mdp5_data = mfd_to_mdp5_data(pstatus_data->mfd); ctl = mfd_to_ctl(pstatus_data->mfd); if (!ctl) { pr_err("%s: Display is off\n", __func__); return; } if (ctl->power_state == MDSS_PANEL_POWER_OFF) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); pr_debug("%s: ctl not powered on\n", __func__); return; } if (ctrl_pdata->status_mode == ESD_TE) { mdss_check_te_status(ctrl_pdata, pstatus_data, interval); return; } mutex_lock(&ctl->offlock); if (mipi->mode == DSI_CMD_MODE) mutex_lock(&mdp5_data->ov_lock); if (mdss_panel_is_power_off(pstatus_data->mfd->panel_power_state) || pstatus_data->mfd->shutdown_pending) { if (mipi->mode == DSI_CMD_MODE) mutex_unlock(&mdp5_data->ov_lock); mutex_unlock(&ctl->offlock); pr_err("%s: DSI turning off, avoiding panel status check\n", __func__); return; } if (ctl->wait_pingpong) ctl->wait_pingpong(ctl, NULL); pr_debug("%s: DSI ctrl wait for ping pong done\n", __func__); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON); ret = ctrl_pdata->check_status(ctrl_pdata); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF); if (mipi->mode == DSI_CMD_MODE) mutex_unlock(&mdp5_data->ov_lock); mutex_unlock(&ctl->offlock); if ((pstatus_data->mfd->panel_power_state == MDSS_PANEL_POWER_ON)) { if (ret > 0) schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); else mdss_report_panel_dead(pstatus_data); } }
/* * mdss_check_dsi_ctrl_status() - Check MDP5 DSI controller status periodically. * @work : dsi controller status data * @interval : duration in milliseconds to schedule work queue * * This function calls check_status API on DSI controller to send the BTA * command. If DSI controller fails to acknowledge the BTA command, it sends * the PANEL_ALIVE=0 status to HAL layer. */ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) { struct dsi_status_data *pstatus_data = NULL; struct mdss_panel_data *pdata = NULL; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; struct mdss_overlay_private *mdp5_data = NULL; struct mdss_mdp_ctl *ctl = NULL; int ret = 0; pstatus_data = container_of(to_delayed_work(work), struct dsi_status_data, check_status); if (!pstatus_data || !(pstatus_data->mfd)) { pr_err("%s: mfd not available\n", __func__); return; } pdata = dev_get_platdata(&pstatus_data->mfd->pdev->dev); if (!pdata) { pr_err("%s: Panel data not available\n", __func__); return; } ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); if (!ctrl_pdata || (!ctrl_pdata->check_status && (ctrl_pdata->status_mode != ESD_TE))) { pr_err("%s: DSI ctrl or status_check callback not available\n", __func__); return; } mdp5_data = mfd_to_mdp5_data(pstatus_data->mfd); ctl = mfd_to_ctl(pstatus_data->mfd); if (!ctl) { pr_err("%s: Display is off\n", __func__); return; } if (ctl->power_state == MDSS_PANEL_POWER_OFF) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); pr_debug("%s: ctl not powered on\n", __func__); return; } if (ctrl_pdata->status_mode == ESD_TE) { mdss_check_te_status(ctrl_pdata, pstatus_data, interval); return; } mutex_lock(&ctrl_pdata->mutex); if (ctl->shared_lock) mutex_lock(ctl->shared_lock); mutex_lock(&mdp5_data->ov_lock); if (pstatus_data->mfd->shutdown_pending) { mutex_unlock(&mdp5_data->ov_lock); if (ctl->shared_lock) mutex_unlock(ctl->shared_lock); mutex_unlock(&ctrl_pdata->mutex); pr_err("%s: DSI turning off, avoiding panel status check\n", __func__); return; } /* * For the command mode panels, we return pan display * IOCTL on vsync interrupt. So, after vsync interrupt comes * and when DMA_P is in progress, if the panel stops responding * and if we trigger BTA before DMA_P finishes, then the DSI * FIFO will not be cleared since the DSI data bus control * doesn't come back to the host after BTA. This may cause the * display reset not to be proper. Hence, wait for DMA_P done * for command mode panels before triggering BTA. */ if (ctl->wait_pingpong) ctl->wait_pingpong(ctl, NULL); pr_debug("%s: DSI ctrl wait for ping pong done\n", __func__); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON); ret = ctrl_pdata->check_status(ctrl_pdata); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF); mutex_unlock(&mdp5_data->ov_lock); if (ctl->shared_lock) mutex_unlock(ctl->shared_lock); mutex_unlock(&ctrl_pdata->mutex); if ((pstatus_data->mfd->panel_power_state == MDSS_PANEL_POWER_ON)) { if (ret > 0) schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); else mdss_report_panel_dead(pstatus_data); } }
/* * mdss_check_dsi_ctrl_status() - Check MDP5 DSI controller status periodically. * @work : dsi controller status data * @interval : duration in milliseconds to schedule work queue * * This function calls check_status API on DSI controller to send the BTA * command. If DSI controller fails to acknowledge the BTA command, it sends * the PANEL_ALIVE=0 status to HAL layer. */ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) { struct dsi_status_data *pstatus_data = NULL; struct mdss_panel_data *pdata = NULL; struct mipi_panel_info *mipi = NULL; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; struct mdss_overlay_private *mdp5_data = NULL; struct mdss_mdp_ctl *ctl = NULL; int ret = 0; #ifdef VENDOR_EDIT /* Xiaori.Yuan@Mobile Phone Software Dept.Driver, 2015/01/09 Add for 14045 TP and LCD ESD */ int tp_ret=-1; #endif /*VENDOR_EDIT*/ pstatus_data = container_of(to_delayed_work(work), struct dsi_status_data, check_status); if (!pstatus_data || !(pstatus_data->mfd)) { pr_err("%s: mfd not available\n", __func__); return; } pdata = dev_get_platdata(&pstatus_data->mfd->pdev->dev); if (!pdata) { pr_err("%s: Panel data not available\n", __func__); return; } mipi = &pdata->panel_info.mipi; ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); if (!ctrl_pdata || !ctrl_pdata->check_status) { pr_err("%s: DSI ctrl or status_check callback not available\n", __func__); return; } mdp5_data = mfd_to_mdp5_data(pstatus_data->mfd); ctl = mfd_to_ctl(pstatus_data->mfd); if (!ctl) { pr_err("%s: Display is off\n", __func__); return; } if (!ctl->power_on) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); pr_err("%s: ctl not powered on\n", __func__); return; } /* * TODO: Because mdss_dsi_cmd_mdp_busy has made sure DMA to * be idle in mdss_dsi_cmdlist_commit, it is not necessary * to acquire ov_lock in case of video mode. Removing this * lock to fix issues so that ESD thread could block other * overlay operations. Need refine this lock for command mode */ if (mipi->mode == DSI_CMD_MODE) mutex_lock(&mdp5_data->ov_lock); if (pstatus_data->mfd->shutdown_pending || !pstatus_data->mfd->panel_power_on) { if (mipi->mode == DSI_CMD_MODE) mutex_unlock(&mdp5_data->ov_lock); pr_err("%s: DSI turning off, avoiding panel status check\n", __func__); return; } /* * For the command mode panels, we return pan display * IOCTL on vsync interrupt. So, after vsync interrupt comes * and when DMA_P is in progress, if the panel stops responding * and if we trigger BTA before DMA_P finishes, then the DSI * FIFO will not be cleared since the DSI data bus control * doesn't come back to the host after BTA. This may cause the * display reset not to be proper. Hence, wait for DMA_P done * for command mode panels before triggering BTA. */ if (ctl->wait_pingpong) ctl->wait_pingpong(ctl, NULL); pr_debug("%s: DSI ctrl wait for ping pong done\n", __func__); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false); ret = ctrl_pdata->check_status(ctrl_pdata); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false); if (mipi->mode == DSI_CMD_MODE) mutex_unlock(&mdp5_data->ov_lock); #ifdef VENDOR_EDIT /* Xiaori.Yuan@Mobile Phone Software Dept.Driver, 2015/01/09 Add for 14045 TP and LCD ESD */ if(is_project(OPPO_14045) && tp_esd_check_fn!=NULL) { tp_ret = tp_esd_check_fn(); }else{ tp_ret = 1; } #endif /*VENDOR_EDIT*/ if ((pstatus_data->mfd->panel_power_on)) { /* VENDOR_EDIT Xiaori.Yuan@Mobile Phone Software Dept.Driver, 2015/01/09 Modified for 14045 TP and LCD ESD */ //if (ret > 0) { if ((ret > 0) && (tp_ret >= 0)) { /*VENDOR_EDIT Modified end*/ schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); } else { char *envp[2] = {"PANEL_ALIVE=0", NULL}; pdata->panel_info.panel_dead = true; ret = kobject_uevent_env( &pstatus_data->mfd->fbi->dev->kobj, KOBJ_CHANGE, envp); pr_err("%s: Panel has gone bad, sending uevent - %s\n", __func__, envp[0]); } } }
static void check_dsi_ctrl_status(struct work_struct *work) { struct dsi_status_data *pdsi_status = NULL; struct mdss_panel_data *pdata = NULL; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; struct mdss_overlay_private *mdp5_data = NULL; struct mdss_mdp_ctl *ctl = NULL; int ret = 0; pdsi_status = container_of(to_delayed_work(work), struct dsi_status_data, check_status); if (!pdsi_status) { pr_err("%s: DSI status data not available\n", __func__); return; } //patch + case1481899 mayu 3.27 if(!pdsi_status->mfd){ pr_err("%s:mfd is NULL \n",__func__); return; } //patch - case1481899 mayu 3.27 pdata = dev_get_platdata(&pdsi_status->mfd->pdev->dev); if (!pdata) { pr_err("%s: Panel data not available\n", __func__); return; } ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); if (!ctrl_pdata || !ctrl_pdata->check_status) { pr_err("%s: DSI ctrl or status_check callback not available\n", __func__); return; } //+++duguowei,crash if no lcd if(!ctrl_pdata->panel_name) return; //---duguowei,crash if no lcd mdp5_data = mfd_to_mdp5_data(pdsi_status->mfd); ctl = mfd_to_ctl(pdsi_status->mfd); if (ctl->shared_lock) mutex_lock(ctl->shared_lock); mutex_lock(&mdp5_data->ov_lock); /* * For the command mode panels, we return pan display * IOCTL on vsync interrupt. So, after vsync interrupt comes * and when DMA_P is in progress, if the panel stops responding * and if we trigger BTA before DMA_P finishes, then the DSI * FIFO will not be cleared since the DSI data bus control * doesn't come back to the host after BTA. This may cause the * display reset not to be proper. Hence, wait for DMA_P done * for command mode panels before triggering BTA. */ if (pdsi_status->mfd->shutdown_pending) { mutex_unlock(&mdp5_data->ov_lock); if (ctl->shared_lock) mutex_unlock(ctl->shared_lock); return; } if (ctl->wait_pingpong) ctl->wait_pingpong(ctl, NULL); pr_debug("%s: DSI ctrl wait for ping pong done\n", __func__); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false); ret = ctrl_pdata->check_status(ctrl_pdata); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false); mutex_unlock(&mdp5_data->ov_lock); if (ctl->shared_lock) mutex_unlock(ctl->shared_lock); if ((pdsi_status->mfd->panel_power_on)) { if (ret > 0) { schedule_delayed_work(&pdsi_status->check_status, msecs_to_jiffies(pdsi_status->check_interval)); } else { #ifdef CONFIG_ZTEMT_NE501_LCD if (mipi_lcd_esd_command(ctrl_pdata)) { char *envp[2] = {"PANEL_ALIVE=0", NULL}; pdata->panel_info.panel_dead = true; ret = kobject_uevent_env( &pdsi_status->mfd->fbi->dev->kobj, KOBJ_CHANGE, envp); pr_err("%s: Panel has gone bad, sending uevent - %s\n", __func__, envp[0]); printk("default reset panel\n"); } #else char *envp[2] = {"PANEL_ALIVE=0", NULL}; pdata->panel_info.panel_dead = true; ret = kobject_uevent_env( &pdsi_status->mfd->fbi->dev->kobj, KOBJ_CHANGE, envp); pr_err("%s: Panel has gone bad, sending uevent - %s\n", __func__, envp[0]); #endif } } }
/* * mdss_check_dsi_ctrl_status() - Check MDP5 DSI controller status periodically. * @work : dsi controller status data * @interval : duration in milliseconds to schedule work queue * * This function calls check_status API on DSI controller to send the BTA * command. If DSI controller fails to acknowledge the BTA command, it sends * the PANEL_ALIVE=0 status to HAL layer. */ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) { struct dsi_status_data *pstatus_data = NULL; struct mdss_panel_data *pdata = NULL; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; struct mdss_overlay_private *mdp5_data = NULL; struct mdss_mdp_ctl *ctl = NULL; int ret = 0; pstatus_data = container_of(to_delayed_work(work), struct dsi_status_data, check_status); if (!pstatus_data || !(pstatus_data->mfd)) { pr_err("%s: mfd not available\n", __func__); return; } pdata = dev_get_platdata(&pstatus_data->mfd->pdev->dev); if (!pdata) { pr_err("%s: Panel data not available\n", __func__); return; } ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); if (!ctrl_pdata || !ctrl_pdata->check_status) { pr_err("%s: DSI ctrl or status_check callback not available\n", __func__); return; } mdp5_data = mfd_to_mdp5_data(pstatus_data->mfd); ctl = mfd_to_ctl(pstatus_data->mfd); if (!ctl) { pr_err("%s: Display is off\n", __func__); return; } if (!ctl->power_on) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); pr_err("%s: ctl not powered on\n", __func__); return; } if (ctl->shared_lock) mutex_lock(ctl->shared_lock); mutex_lock(&mdp5_data->ov_lock); if (pstatus_data->mfd->shutdown_pending || !pstatus_data->mfd->panel_power_on) { mutex_unlock(&mdp5_data->ov_lock); if (ctl->shared_lock) mutex_unlock(ctl->shared_lock); pr_err("%s: DSI turning off, avoiding panel status check\n", __func__); return; } /* * For the command mode panels, we return pan display * IOCTL on vsync interrupt. So, after vsync interrupt comes * and when DMA_P is in progress, if the panel stops responding * and if we trigger BTA before DMA_P finishes, then the DSI * FIFO will not be cleared since the DSI data bus control * doesn't come back to the host after BTA. This may cause the * display reset not to be proper. Hence, wait for DMA_P done * for command mode panels before triggering BTA. */ if (ctl->wait_pingpong) ctl->wait_pingpong(ctl, NULL); pr_debug("%s: DSI ctrl wait for ping pong done\n", __func__); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false); ret = ctrl_pdata->check_status(ctrl_pdata); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false); mutex_unlock(&mdp5_data->ov_lock); if (ctl->shared_lock) mutex_unlock(ctl->shared_lock); if ((pstatus_data->mfd->panel_power_on)) { if (ret > 0) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); } else { char *envp[2] = {"PANEL_ALIVE=0", NULL}; pdata->panel_info.panel_dead = true; ret = kobject_uevent_env( &pstatus_data->mfd->fbi->dev->kobj, KOBJ_CHANGE, envp); pr_err("%s: Panel has gone bad, sending uevent - %s\n", __func__, envp[0]); } } }
/* * mdss_check_dsi_ctrl_status() - Check MDP5 DSI controller status periodically. * @work : dsi controller status data * @interval : duration in milliseconds to schedule work queue * * This function calls check_status API on DSI controller to send the BTA * command. If DSI controller fails to acknowledge the BTA command, it sends * the PANEL_ALIVE=0 status to HAL layer. */ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) { struct dsi_status_data *pstatus_data = NULL; struct mdss_panel_data *pdata = NULL; struct mipi_panel_info *mipi = NULL; struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; struct mdss_overlay_private *mdp5_data = NULL; struct mdss_mdp_ctl *ctl = NULL; int ret = 0; pstatus_data = container_of(to_delayed_work(work), struct dsi_status_data, check_status); if (!pstatus_data || !(pstatus_data->mfd)) { pr_err("%s: mfd not available\n", __func__); return; } pdata = dev_get_platdata(&pstatus_data->mfd->pdev->dev); if (!pdata) { pr_err("%s: Panel data not available\n", __func__); return; } mipi = &pdata->panel_info.mipi; ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, panel_data); if (!ctrl_pdata || (!ctrl_pdata->check_status && (ctrl_pdata->status_mode != ESD_TE))) { pr_err("%s: DSI ctrl or status_check callback not available\n", __func__); return; } mdp5_data = mfd_to_mdp5_data(pstatus_data->mfd); ctl = mfd_to_ctl(pstatus_data->mfd); if (!ctl) { pr_err("%s: Display is off\n", __func__); return; } if (ctl->power_state == MDSS_PANEL_POWER_OFF) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); pr_debug("%s: ctl not powered on\n", __func__); return; } if (ctrl_pdata->status_mode == ESD_TE) { mdss_check_te_status(ctrl_pdata, pstatus_data, interval); return; } mutex_lock(&ctrl_pdata->mutex); /* * TODO: Because mdss_dsi_cmd_mdp_busy has made sure DMA to * be idle in mdss_dsi_cmdlist_commit, it is not necessary * to acquire ov_lock in case of video mode. Removing this * lock to fix issues so that ESD thread would not block other * overlay operations. Need refine this lock for command mode */ if (mipi->mode == DSI_CMD_MODE) mutex_lock(&mdp5_data->ov_lock); if (mdss_panel_is_power_off(pstatus_data->mfd->panel_power_state)) { if (mipi->mode == DSI_CMD_MODE) mutex_unlock(&mdp5_data->ov_lock); mutex_unlock(&ctrl_pdata->mutex); pr_err("%s: DSI turning off, avoiding panel status check\n", __func__); return; } /* * For the command mode panels, we return pan display * IOCTL on vsync interrupt. So, after vsync interrupt comes * and when DMA_P is in progress, if the panel stops responding * and if we trigger BTA before DMA_P finishes, then the DSI * FIFO will not be cleared since the DSI data bus control * doesn't come back to the host after BTA. This may cause the * display reset not to be proper. Hence, wait for DMA_P done * for command mode panels before triggering BTA. */ if (ctl->wait_pingpong) ctl->wait_pingpong(ctl, NULL); pr_debug("%s: DSI ctrl wait for ping pong done\n", __func__); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON); ret = ctrl_pdata->check_status(ctrl_pdata); mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF); if (mipi->mode == DSI_CMD_MODE) mutex_unlock(&mdp5_data->ov_lock); mutex_unlock(&ctrl_pdata->mutex); if ((pstatus_data->mfd->panel_power_state == MDSS_PANEL_POWER_ON)) { if (ret > 0) schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); else mdss_report_panel_dead(pstatus_data); } }