void nvrm_mmap(uint32_t id, uint32_t fd, uint64_t mmap_addr, uint64_t len, uint64_t mmap_offset)
{
struct gpu_object *obj;
struct cpu_mapping *cpu_mapping;
for (obj = gpu_objects; obj != NULL; obj = obj->next)
for (cpu_mapping = obj->cpu_mappings; cpu_mapping != NULL; cpu_mapping = cpu_mapping->next)
//can't validate fd
if (cpu_mapping->mmap_offset == mmap_offset)
{
cpu_mapping->cpu_addr = mmap_addr;
cpu_mapping->id = id;
set_cpu_mapping(id, cpu_mapping);
if (dump_sys_mmap)
{
if (cpu_mapping->fdtype == FDNVIDIA)
{
mmt_log_cont(", cid: 0x%08x, handle: 0x%08x", obj->cid, obj->handle);
describe_nvrm_object(obj->cid, obj->handle, "");
}
mmt_log_cont_nl();
}
return;
}
if (dump_sys_mmap)
mmt_log_cont_nl();
if (demmt_get_fdtype(fd) == FDNVIDIA)
mmt_error("nvrm_mmap: couldn't find object/space offset: 0x%016" PRIx64 "\n", mmap_offset);
buffer_mmap(id, fd, mmap_addr, len, mmap_offset);
}
static void __demmt_ioctl_post(uint32_t fd, uint32_t id, struct mmt_buf *data,
uint64_t ret, uint64_t err, void *state, struct mmt_memory_dump *args, int argc)
{
uint8_t dir, type, nr;
uint16_t size;
decode_ioctl_id(id, &dir, &type, &nr, &size);
int print_raw = 0;
enum mmt_fd_type fdtype = demmt_get_fdtype(fd);
if (fdtype == FDDRM)
print_raw = demmt_drm_ioctl_post(fd, id, dir, nr, size, data, ret, err, state, args, argc);
else if (fdtype == FDNVIDIA)
print_raw = nvrm_ioctl_post(fd, id, dir, nr, size, data, ret, err, state, args, argc);
else if (fdtype == FDFGLRX)
print_raw = fglrx_ioctl_post(fd, id, dir, nr, size, data, ret, err, state, args, argc);
else
mmt_error("ioctl 0x%x called for unknown type of file [%d, %d]\n", id, fd, fdtype);
print_raw = print_raw || dump_raw_ioctl_data;
if (print_raw)
{
mmt_log("ioctl post 0x%02x (0x%08x), fd: %d, dir: %2s, size: %4d",
nr, id, fd, dir_desc[dir], size);
if (ret)
mmt_log_cont(", ret: 0x%" PRIx64 "", ret);
if (err)
mmt_log_cont(", err: 0x%" PRIx64 "", err);
if (size != data->len)
mmt_log_cont(", data.len: %d", data->len);
ioctl_data_print(data);
mmt_log_cont_nl();
}
}
void nvrm_munmap(uint32_t id, uint64_t mmap_addr, uint64_t len, uint64_t mmap_offset)
{
struct gpu_object *obj;
struct cpu_mapping *cpu_mapping;
for (obj = gpu_objects; obj != NULL; obj = obj->next)
for (cpu_mapping = obj->cpu_mappings; cpu_mapping != NULL; cpu_mapping = cpu_mapping->next)
if (cpu_mapping->cpu_addr == mmap_addr)
{
if (dump_sys_munmap)
{
if (cpu_mapping->fdtype == FDNVIDIA)
{
mmt_log_cont(", cid: 0x%08x, handle: 0x%08x", obj->cid, obj->handle);
describe_nvrm_object(obj->cid, obj->handle, "");
}
}
disconnect_cpu_mapping_from_gpu_object(cpu_mapping);
break;
}
if (dump_sys_munmap)
mmt_log_cont_nl();
buffer_munmap(id);
}
static void decode_nvrm_ioctl_card_info3(struct nvrm_ioctl_card_info3 *s)
{
int nl = 0;
int i, j;
for (i = 0; i < 32; ++i)
{
int valid = 0;
for (j = 0; j < sizeof(s->card[i]); ++j)
if (((unsigned char *)&s->card[i])[j] != 0)
{
valid = 1;
break;
}
if (valid)
{
if (!nl)
{
mmt_log_cont_nl();
nl = 1;
}
mmt_log(" %d: ", i);
nvrm_reset_pfx();
nvrm_print_x32(&s->card[i], flags);
nvrm_print_x32(&s->card[i], domain);
nvrm_print_d32_align(&s->card[i], bus, 3);
nvrm_print_d32_align(&s->card[i], slot, 3);
nvrm_print_d32_align(&s->card[i], function, 3);
nvrm_print_pad_x8(&s->card[i], _pad0);
nvrm_print_x16(&s->card[i], vendor_id);
nvrm_print_x16(&s->card[i], device_id);
nvrm_print_pad_x32(&s->card[i], _pad1);
nvrm_print_x32(&s->card[i], gpu_id);
nvrm_print_x32(&s->card[i], interrupt);
nvrm_print_pad_x32(&s->card[i], _pad2);
nvrm_print_x64(&s->card[i], reg_address);
nvrm_print_x64(&s->card[i], reg_size);
nvrm_print_x64(&s->card[i], fb_address);
nvrm_print_x64(&s->card[i], fb_size);
nvrm_print_d32(&s->card[i], index);
nvrm_print_pad_x32(&s->card[i], _pad3);
nvrm_print_pad_x32(&s->card[i], _pad4);
nvrm_print_pad_x32(&s->card[i], _pad5);
mmt_log_cont_nl();
}
}
}
static void demmt_msg(uint8_t *data, unsigned int len, void *state)
{
if (dump_msg)
{
mmt_log("MSG: %s", "");
fwrite(data, 1, len, stdout);
mmt_log_cont_nl();
}
}
static void decode_create_event(struct nvrm_ioctl_create *i, struct nvrm_create_event *s)
{
nvrm_print_cid(s, cid);
nvrm_print_class(s, cls);
nvrm_print_x32(s, unk08);
nvrm_print_x32(s, unk0c);
nvrm_print_handle(s, ehandle, cid);
nvrm_print_x32(s, unk14);
mmt_log_cont_nl();
}
static void decode_create_fifo_ib(struct nvrm_ioctl_create *i, struct nvrm_create_fifo_ib *s)
{
nvrm_print_x32(s, error_notify);
nvrm_print_x32(s, dma);
nvrm_print_x64(s, ib_addr);
nvrm_print_x64(s, ib_entries);
nvrm_print_x32(s, unk18);
nvrm_print_x32(s, unk1c);
mmt_log_cont_nl();
}
void demmt_memory_dump(struct mmt_memory_dump_prefix *d, struct mmt_buf *b, void *state)
{
// dead code, because memory dumps are passed to ioctl_pre / ioctl_post handlers
int i;
mmt_log("memory dump, addr: 0x%016" PRIx64 ", txt: \"%s\", data.len: %d, data:", d->addr, d->str.data, b->len);
for (i = 0; i < b->len / 4; ++i)
mmt_log_cont(" 0x%08x", ((uint32_t *)b->data)[i]);
mmt_log_cont_nl();
}
void nvrm_mmap(uint32_t id, uint32_t fd, uint64_t mmap_addr, uint64_t len, uint64_t mmap_offset)
{
struct gpu_object *obj;
struct cpu_mapping *cpu_mapping;
for (obj = gpu_objects; obj != NULL; obj = obj->next)
for (cpu_mapping = obj->cpu_mappings; cpu_mapping != NULL; cpu_mapping = cpu_mapping->next)
//can't validate fd
if (cpu_mapping->mmap_offset == mmap_offset)
{
cpu_mapping->cpu_addr = mmap_addr;
uint32_t old_id = cpu_mapping->id;
cpu_mapping->id = id;
set_cpu_mapping(id, cpu_mapping);
if (dump_sys_mmap)
{
if (cpu_mapping->fdtype == FDNVIDIA)
{
mmt_log_cont(", cid: 0x%08x, handle: 0x%08x", obj->cid, obj->handle);
describe_nvrm_object(obj->cid, obj->handle, "");
}
mmt_log_cont_nl();
}
if (old_id)
mmt_error("%d -> %d, mapping reuse, expect crash soon\n", old_id, id);
/*
* On newer blob, where mmap_offset is 0 for
* all mappings (WTF?), clobber the value to
* prevent the next nvrm_mmap from finding this
* mapping.
*/
if (cpu_mapping->mmap_offset == 0)
cpu_mapping->mmap_offset = -1;
return;
}
if (dump_sys_mmap)
mmt_log_cont_nl();
if (demmt_get_fdtype(fd) == FDNVIDIA)
mmt_error("nvrm_mmap: couldn't find object/space offset: 0x%016" PRIx64 "\n", mmap_offset);
buffer_mmap(id, fd, mmap_addr, len, mmap_offset);
}
static void decode_create_fifo_dma(struct nvrm_ioctl_create *i, struct nvrm_create_fifo_dma *s)
{
nvrm_print_x32(s, handle1);
nvrm_print_x32(s, handle2);
nvrm_print_x32(s, user_addr);
nvrm_print_x32(s, unk0c);
nvrm_print_x32(s, unk10);
nvrm_print_x32(s, unk14);
nvrm_print_x32(s, unk18);
nvrm_print_x32(s, unk1c);
mmt_log_cont_nl();
}
static void __demmt_ioctl_pre(uint32_t fd, uint32_t id, struct mmt_buf *data, void *state, struct mmt_memory_dump *args, int argc)
{
uint8_t dir, type, nr;
uint16_t size;
decode_ioctl_id(id, &dir, &type, &nr, &size);
int print_raw = 1;
enum mmt_fd_type fdtype = demmt_get_fdtype(fd);
if (fdtype == FDUNK)
{
if (type == 0x64) // DRM
fdtype = undetected_fdtype = FDDRM;
else if (type == 0x46) // nvidia
fdtype = undetected_fdtype = FDNVIDIA;
}
if (fdtype == FDDRM)
print_raw = demmt_drm_ioctl_pre(fd, id, dir, nr, size, data, state, args, argc);
else if (fdtype == FDNVIDIA)
print_raw = nvrm_ioctl_pre(fd, id, dir, nr, size, data, state, args, argc);
else if (fdtype == FDFGLRX)
print_raw = fglrx_ioctl_pre(fd, id, dir, nr, size, data, state, args, argc);
else
mmt_error("ioctl 0x%x called for unknown type of file [%d, %d]\n", id, fd, fdtype);
print_raw = print_raw || dump_raw_ioctl_data;
if (print_raw)
{
mmt_log("ioctl pre 0x%02x (0x%08x), fd: %d, dir: %2s, size: %4d",
nr, id, fd, dir_desc[dir], size);
if (size != data->len)
mmt_log_cont(", data.len: %d", data->len);
ioctl_data_print(data);
mmt_log_cont_nl();
}
}
static void decode_create_context(struct nvrm_ioctl_create *i, struct nvrm_create_context *s)
{
nvrm_print_cid(s, cid);
mmt_log_cont_nl();
}
