auto V30MZ::opExchangeMemReg(Size size) {
wait(2);
modRM();
auto mem = getMem(size);
auto reg = getReg(size);
setMem(size, reg);
setReg(size, mem);
}
//62 bound reg,mem,mem
auto V30MZ::opBound() {
wait(12);
modRM();
auto lo = getMem(Word, 0);
auto hi = getMem(Word, 2);
auto reg = getReg(Word);
if(reg < lo || reg > hi) interrupt(5);
}
auto V30MZ::opLoadSegmentMem(uint16_t& segment) {
wait(5);
modRM();
setReg(Word, getMem(Word));
segment = getMem(Word, 2);
}
auto V30MZ::opLoadEffectiveAddressRegMem() {
modRM();
setReg(Word, modrm.address);
}
auto V30MZ::opMoveRegMem(Size size) {
modRM();
setReg(size, getMem(size));
}
auto V30MZ::opMoveMemImm(Size size) {
modRM();
setMem(size, fetch(size));
}
//8e mov seg,memw
auto V30MZ::opMoveSegMem() {
wait(1);
modRM();
setSeg(getMem(Word));
if((modrm.reg & 3) == 3) state.poll = false;
}
//8c mov memw,seg
auto V30MZ::opMoveMemSeg() {
modRM();
setMem(Word, getSeg());
state.poll = false;
}
