static int sprd6500_force_crash_exit(struct modem_ctl *mc)
{
struct link_device *ld = get_current_link(mc->iod);
pr_info("[MODEM_IF:SPRD] <%s> Called!!\n", __func__);
/* Make DUMP start */
ld->force_dump(ld, mc->iod);
msleep_interruptible(1000);
mc->iod->modem_state_changed(mc->iod, STATE_CRASH_EXIT);
return 0;
}
/*
* This is the ioctl implementation.
*/
static long kern_unlocked_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg)
{
PR_DEBUG("start");
switch (cmd) {
case IOCTL_RACE_EMPTY:
/* empty ioctl to 'just work'; */
/* PR_INFO("end"); */
return 0;
case IOCTL_RACE_SLEEP_SHORT:
/* long ioctl to stall for time */
msleep_interruptible(10000);
PR_INFO("end");
return 0;
case IOCTL_RACE_SLEEP_LONG:
/* long ioctl to stall for time */
/* ssleep(10000); */
msleep_interruptible(20000);
PR_INFO("end");
return 0;
}
PR_DEBUG("end");
return -EINVAL;
}
static int felica_cen_write(u8 arg, void *user)
{
struct cxd2235agg_data *my_data = user;
int i;
u8 state;
if (!my_data)
return -EINVAL;
dev_dbg(&my_data->pdev->dev, ": %s: %x\n", __func__, arg);
if (arg > 0x1) {
dev_err(&my_data->pdev->dev,
"%s: Error. Invalid val @CEN write.\n", __func__);
return -EINVAL;
}
for (i = 0; i < CEN_RETRY_MAX; i++) {
felica_cen_read(&state, my_data);
if (arg == state)
goto end;
gpio_set_value_cansleep(my_data->gpios[FF_PIN], 0);
msleep_interruptible(1);
gpio_set_value_cansleep(my_data->gpios[FF_PIN], 1);
msleep_interruptible(1);
gpio_set_value_cansleep(my_data->gpios[FF_PIN], 0);
}
dev_err(&my_data->pdev->dev, "%s: Error. Cannot write CEN.\n",
__func__);
return -EIO;
end:
return 0;
}
/* Load and boot reset code. */
static void cycx_reset_boot(void __iomem *addr, u8 *code, u32 len)
{
void __iomem *pt_start = addr + START_OFFSET;
writeb(0xea, pt_start++); /* jmp to f000:3f00 */
writeb(0x00, pt_start++);
writeb(0xfc, pt_start++);
writeb(0x00, pt_start++);
writeb(0xf0, pt_start);
reset_load(addr, code, len);
/* 80186 was in hold, go */
writeb(0, addr + START_CPU);
msleep_interruptible(1 * 1000);
}
static void srp_wait_for_pending(void)
{
unsigned long deadline = jiffies + HZ / 10;
do {
/* Wait for SRP Pending */
if (readl(srp.commbox + SRP_PENDING))
break;
msleep_interruptible(5);
} while (time_before(jiffies, deadline));
srp_info("Pending status[%s]\n",
readl(srp.commbox + SRP_PENDING) ? "STALL" : "RUN");
}
IMG_VOID HostWaitForEvent(DBG_EVENT eEvent)
{
switch(eEvent)
{
case DBG_EVENT_STREAM_DATA:
wait_event_interruptible_timeout(sStreamDataEvent, iStreamData != 0, EVENT_WAIT_TIMEOUT_JIFFIES);
iStreamData = 0;
break;
default:
msleep_interruptible(EVENT_WAIT_TIMEOUT_MS);
break;
}
}
static int dummy_delay_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
int delay = ucontrol->value.integer.value[0];
if (delay > 1000)
delay = 1000;
else if (delay < 0)
delay = 0;
pr_info("Delay for %d msec\n", delay);
msleep_interruptible(delay);
return 1;
}
static int cbp72_force_crash_exit(struct modem_ctl *mc)
{
struct link_device *ld = get_current_link(mc->bootd);
mif_err("device = %s\n", mc->bootd->name);
/* Make DUMP start */
ld->force_dump(ld, mc->bootd);
msleep_interruptible(1000);
mc->bootd->modem_state_changed(mc->bootd, STATE_CRASH_EXIT);
return 0;
}
/* Thread to poll for touchscreen events
*
*/
static int pimhyp3_thread(void *arg)
{
while (!kthread_should_stop())
{
struct pimhyp3_ts_data *ts = (struct pimhyp3_ts_data *) arg;
/* 60fps polling */
msleep_interruptible(ts->requestedRefreshRate); //17
pimhyp3_process_events(ts);
}
return 0;
}
static int ps3_probe_thread(void *data)
{
struct ps3_repository_device *repo = data;
int result;
unsigned int ms = 250;
pr_debug(" -> %s:%u: kthread started\n", __func__, __LINE__);
do {
try_to_freeze();
pr_debug("%s:%u: probing...\n", __func__, __LINE__);
do {
result = ps3_repository_find_device(repo);
if (result == -ENODEV)
pr_debug("%s:%u: nothing new\n", __func__,
__LINE__);
else if (result)
pr_debug("%s:%u: find device error.\n",
__func__, __LINE__);
else {
pr_debug("%s:%u: found device (%u:%u:%u)\n",
__func__, __LINE__, repo->bus_index,
repo->dev_index, repo->dev_type);
ps3_register_repository_device(repo);
ps3_repository_bump_device(repo);
ms = 250;
}
} while (!result);
pr_debug("%s:%u: ms %u\n", __func__, __LINE__, ms);
if ( ms > 60000)
break;
msleep_interruptible(ms);
/* An exponential backoff. */
ms <<= 1;
} while (!kthread_should_stop());
pr_debug(" <- %s:%u: kthread finished\n", __func__, __LINE__);
return 0;
}
static void mdm_fatal_fn(struct work_struct *work)
{
//HTC_Kris+++
unsigned long flags;
extern bool is_mdm_hsic_phy_suspended;
extern bool is_mdm_hsic_wakeup_in_progress;
extern void mdm_hsic_disable_auto_suspend(void);
int i;
//HTC_Kris---
pr_info("%s: Reseting the mdm due to an errfatal\n", __func__);
//HTC_Kris+++
pr_info("%s: mdm_hsic_disable_auto_suspend+\n", __func__);
mdm_hsic_disable_auto_suspend();
pr_info("%s: mdm_hsic_disable_auto_suspend-\n", __func__);
//HTC_Kris---
/* HTC added start */
dump_mdm_related_gpio();
//++SSD_RIL:20120724:delay 3 secs before call subsystem restart
if ( get_radio_flag() & 0x0008 ) {
mdelay(3000);
}
//--SSD_RIL
/* HTC added end */
//HTC_Kris+++
//Before do radio restart, make sure mdm_hsic_phy is not suspended, otherwise, PORTSC will be kept at 1800
if (is_mdm_hsic_phy_suspended) {
pr_info("%s(%d): is_mdm_hsic_phy_suspended:%d\n", __func__, __LINE__, is_mdm_hsic_phy_suspended);
pr_info("%s(%d): wakeup hsic\n", __func__, __LINE__);
spin_lock_irqsave(&mdm_hsic_wakeup_lock, flags);
mdm_hsic_wakeup();
spin_unlock_irqrestore(&mdm_hsic_wakeup_lock, flags);
//wait until mdm_hsic_phy is not suspended, at most 10 seconds
for (i = 0; i < 100; i++) {
msleep_interruptible(1000);
if (!is_mdm_hsic_phy_suspended && !is_mdm_hsic_wakeup_in_progress)
break;
}
pr_info("%s(%d): is_mdm_hsic_phy_suspended:%d\n", __func__, __LINE__, is_mdm_hsic_phy_suspended);
}
//HTC_Kris---
subsystem_restart(EXTERNAL_MODEM);
}
static void igbvf_diag_test(struct net_device *netdev,
struct ethtool_test *eth_test, u64 *data)
{
struct igbvf_adapter *adapter = netdev_priv(netdev);
set_bit(__IGBVF_TESTING, &adapter->state);
/* Link test performed before hardware reset so autoneg doesn't
* interfere with test result
*/
if (igbvf_link_test(adapter, &data[0]))
eth_test->flags |= ETH_TEST_FL_FAILED;
clear_bit(__IGBVF_TESTING, &adapter->state);
msleep_interruptible(4 * 1000);
}
static int aw_leds_i2c_write_reg(struct i2c_client *client,
u8 regnum, u8 value)
{
int32_t ret = -1;
uint8_t tries = 0;
do{
ret = i2c_smbus_write_byte_data(client, regnum, value);
if (ret) {
msleep_interruptible(I2C_RETRY_DELAY);
}
} while((ret != 0) && (++tries < I2C_RETRIES));
return ret;
}
/* Reset board hardware.
return 1 if memory exists at addr and 0 if not. */
static int memory_exists(void __iomem *addr)
{
int tries = 0;
for (; tries < 3 ; tries++) {
writew(TEST_PATTERN, addr + 0x10);
if (readw(addr + 0x10) == TEST_PATTERN)
if (readw(addr + 0x10) == TEST_PATTERN)
return 1;
msleep_interruptible(1 * 1000);
}
return 0;
}
/**
* @brief This function handles disconnect event. it
* reports disconnect to upper layer, clean tx/rx packets,
* reset link state etc.
*
* @param priv A pointer to struct lbs_private structure
* @return n/a
*/
void lbs_mac_event_disconnected(struct lbs_private *priv)
{
if (priv->connect_status != LBS_CONNECTED)
return;
lbs_deb_enter(LBS_DEB_ASSOC);
/*
* Cisco AP sends EAP failure and de-auth in less than 0.5 ms.
* It causes problem in the Supplicant
*/
msleep_interruptible(1000);
lbs_send_disconnect_notification(priv);
/* report disconnect to upper layer */
netif_stop_queue(priv->dev);
netif_carrier_off(priv->dev);
/* Free Tx and Rx packets */
kfree_skb(priv->currenttxskb);
priv->currenttxskb = NULL;
priv->tx_pending_len = 0;
/* reset SNR/NF/RSSI values */
memset(priv->SNR, 0x00, sizeof(priv->SNR));
memset(priv->NF, 0x00, sizeof(priv->NF));
memset(priv->RSSI, 0x00, sizeof(priv->RSSI));
memset(priv->rawSNR, 0x00, sizeof(priv->rawSNR));
memset(priv->rawNF, 0x00, sizeof(priv->rawNF));
priv->nextSNRNF = 0;
priv->numSNRNF = 0;
priv->connect_status = LBS_DISCONNECTED;
/* Clear out associated SSID and BSSID since connection is
* no longer valid.
*/
memset(&priv->curbssparams.bssid, 0, ETH_ALEN);
memset(&priv->curbssparams.ssid, 0, IEEE80211_MAX_SSID_LEN);
priv->curbssparams.ssid_len = 0;
if (priv->psstate != PS_STATE_FULL_POWER) {
/* make firmware to exit PS mode */
lbs_deb_cmd("disconnected, so exit PS mode\n");
lbs_ps_wakeup(priv, 0);
}
lbs_deb_leave(LBS_DEB_ASSOC);
}
/*
* msm_rpm_log_file_read() - Reads in log buffer messages then outputs them to a
* user buffer
*
* Return value:
* 0: success
* -ENOMEM: no memory available
* -EINVAL: user buffer null or requested bytes 0
* -EFAULT: user buffer not writeable
* -EAGAIN: no bytes available at the moment
*/
static ssize_t msm_rpm_log_file_read(struct file *file, char __user *bufu,
size_t count, loff_t *ppos)
{
u32 out_len, remaining;
struct msm_rpm_log_platform_data *pdata;
struct msm_rpm_log_buffer *buf;
buf = file->private_data;
if (!buf)
return -ENOMEM;
pdata = buf->pdata;
if (!pdata)
return -EINVAL;
if (!buf->data)
return -ENOMEM;
if (!bufu)
return -EINVAL;
if (!access_ok(VERIFY_WRITE, bufu, count))
return -EFAULT;
/* check for more messages if local buffer empty */
if (buf->pos == buf->len) {
buf->pos = 0;
buf->len = msm_rpm_log_copy(pdata, buf->data, buf->max_len,
&(buf->read_idx));
}
if ((file->f_flags & O_NONBLOCK) && buf->len == 0)
return -EAGAIN;
/* loop until new messages arrive */
while (buf->len == 0) {
cond_resched();
if (msleep_interruptible(RECHECK_TIME))
break;
buf->len = msm_rpm_log_copy(pdata, buf->data, buf->max_len,
&(buf->read_idx));
}
out_len = ((buf->len - buf->pos) < count ? buf->len - buf->pos : count);
remaining = __copy_to_user(bufu, &(buf->data[buf->pos]), out_len);
buf->pos += out_len - remaining;
return out_len - remaining;
}
static long ehca_plpar_hcall_norets(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long arg5,
unsigned long arg6,
unsigned long arg7)
{
long ret;
int i, sleep_msecs;
unsigned long flags = 0;
if (unlikely(ehca_debug_level >= 2))
ehca_gen_dbg("opcode=%lx " HCALL7_REGS_FORMAT,
opcode, arg1, arg2, arg3, arg4, arg5, arg6, arg7);
for (i = 0; i < 5; i++) {
if (ehca_lock_hcalls)
spin_lock_irqsave(&hcall_lock, flags);
ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4,
arg5, arg6, arg7);
if (ehca_lock_hcalls)
spin_unlock_irqrestore(&hcall_lock, flags);
if (H_IS_LONG_BUSY(ret)) {
sleep_msecs = get_longbusy_msecs(ret);
msleep_interruptible(sleep_msecs);
continue;
}
if (ret < H_SUCCESS)
ehca_gen_err("opcode=%lx ret=%li " HCALL7_REGS_FORMAT,
opcode, ret, arg1, arg2, arg3,
arg4, arg5, arg6, arg7);
else
if (unlikely(ehca_debug_level >= 2))
ehca_gen_dbg("opcode=%lx ret=%li", opcode, ret);
return ret;
}
return H_BUSY;
}
int s5p_g2d_check_fifo_stat_wait(void)
{
int cnt = 50;
// 1 = The graphics engine finishes the execution of command.
// 0 = in the middle of rendering process.
while((!(__raw_readl(s5p_g2d_base + S5P_G2D_FIFO_STAT_REG) & 0x1)) && (cnt > 0)){
cnt--;
msleep_interruptible(2);
}
if(cnt <= 0){
__raw_writel(1, s5p_g2d_base +S5P_G2D_FIFO_STAT_REG);
return -1;
}
return 0;
}
void DeInitDataChannel(void)
{
#if 0
mclose(cidatastubsockfd);
cidatastubsockfd = -1;
if (ciDataRcvTaskRef) {
send_sig(SIGSTOP, ciDataRcvTaskRef, 1);
ciDataRcvTaskRef = NULL;
}
//kthread_stop(ciDataRcvTaskRef);
if (ciDataInitTaskRef) {
kthread_stop(ciDataInitTaskRef);
while (ciDataInitTaskRef)
msleep_interruptible(20);
}
#endif
}
void warn_if_big_fd(unsigned int fd, struct task_struct *dst_tsk)
{
int sleep_ms;
pid_t cur_tid;
pid_t dst_pid;
if ((fd < fdleak_dbg_bigfd) || (current->flags & PF_KTHREAD)) {
/* Do nothing if fd is small or not in user-space process */
return;
}
sleep_ms = 0;
cur_tid = task_pid_nr(current);
dst_pid = task_tgid_nr(dst_tsk);
if (is_android_exe(current)) {
struct siginfo info;
info.si_signo = SIGUSR1;
/*
* The following 4 fields are severely hacked
*/
info.si_errno = fd;
info.si_code = SI_KERNEL;
info.si_uid = (uid_t)dst_pid;
info.si_pid = cur_tid;
/*
* Assume there's at least one thread waiting for
* SIGUSR1 with SI_KERNEL si_code, that may dump
* the backtrace of "current" task and then send
* SIGCONT back as soon as possible.
*/
if (!group_send_sig_info(SIGUSR1, &info, current)) {
/* Wait at most 100 milli-seconds */
sleep_ms = 100;
}
} else if (!notify_helsmond_of_big_fd(fd, cur_tid, dst_pid)) {
/* Slower because of added IPC. Use a longer timeout */
sleep_ms = 200;
}
if (sleep_ms > 0) {
/* Wait for dumping current thread's stack */
msleep_interruptible(sleep_ms);
}
}
int bcm_hsotgctrl_bc_reset(void)
{
int val;
struct bcm_hsotgctrl_drv_data *bcm_hsotgctrl_handle =
local_hsotgctrl_handle;
if (NULL == local_hsotgctrl_handle)
return -ENODEV;
if ((!bcm_hsotgctrl_handle->otg_clk) ||
(!bcm_hsotgctrl_handle->dev))
return -EIO;
val = readl(bcm_hsotgctrl_handle->hsotg_ctrl_base +
HSOTG_CTRL_BC_CFG_OFFSET);
/* Clear overwrite key */
val &= ~(HSOTG_CTRL_BC_CFG_BC_OVWR_KEY_MASK |
HSOTG_CTRL_BC_CFG_SW_OVWR_EN_MASK);
/*We need this key written for this register access*/
val |= (BCCFG_SW_OVERWRITE_KEY |
HSOTG_CTRL_BC_CFG_SW_OVWR_EN_MASK);
val |= HSOTG_CTRL_BC_CFG_SW_RST_MASK;
/*Reset BC1.1 state machine */
writel(val, bcm_hsotgctrl_handle->hsotg_ctrl_base +
HSOTG_CTRL_BC_CFG_OFFSET);
msleep_interruptible(BC_CONFIG_DELAY_MS);
val &= ~HSOTG_CTRL_BC_CFG_SW_RST_MASK;
writel(val, bcm_hsotgctrl_handle->hsotg_ctrl_base +
HSOTG_CTRL_BC_CFG_OFFSET); /*Clear reset*/
val = readl(bcm_hsotgctrl_handle->hsotg_ctrl_base +
HSOTG_CTRL_BC_CFG_OFFSET);
/* Clear overwrite key so we don't accidently write to these bits */
val &= ~(HSOTG_CTRL_BC_CFG_BC_OVWR_KEY_MASK |
HSOTG_CTRL_BC_CFG_SW_OVWR_EN_MASK);
writel(val, bcm_hsotgctrl_handle->hsotg_ctrl_base +
HSOTG_CTRL_BC_CFG_OFFSET);
return 0;
}
/* Executed by primary CPU, brings other CPUs out of reset. Called at boot
as well as when a CPU is coming out of shutdown induced by echo 0 >
/sys/devices/.../cpuX.
*/
int boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int cnt = 0;
printk(KERN_DEBUG "Starting secondary CPU %d\n", cpu);
/* Tell other CPUs to come out or reset. Note that secondary CPUs
* are probably running with caches off, so we'll need to clean to
* memory. Normal cache ops will only clean to L2.
*/
pen_release = cpu;
dmac_clean_range((void *)&pen_release,
(void *)(&pen_release + sizeof(pen_release)));
dmac_clean_range((void *)&secondary_data,
(void *)(&secondary_data + sizeof(secondary_data)));
sev();
dsb();
/* Use smp_cross_call() to send a soft interrupt to wake up
* the other core.
*/
smp_cross_call(cpumask_of(cpu));
/* Wait for done signal. The cpu receiving the signal does not
* have the MMU or caching turned on, so all of its reads and
* writes are to/from memory. Need to ensure that when
* reading the value we invalidate the cache line so we see the
* fresh data from memory as the normal routines may only
* invalidate to POU or L1.
*/
while (pen_release != 0xFFFFFFFF) {
dmac_inv_range((void *)&pen_release,
(void *)(&pen_release+sizeof(pen_release)));
msleep_interruptible(1);
if (cnt++ >= SECONDARY_CPU_WAIT_MS)
break;
}
if (pen_release == 0xFFFFFFFF)
printk(KERN_DEBUG "Secondary CPU start acked %d\n", cpu);
else
printk(KERN_ERR "Secondary CPU failed to start..." \
"continuing\n");
return 0;
}
static void ixgbevf_diag_test(struct net_device *netdev,
struct ethtool_test *eth_test, u64 *data)
{
struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bool if_running = netif_running(netdev);
set_bit(__IXGBEVF_TESTING, &adapter->state);
if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
/* Offline tests */
hw_dbg(&adapter->hw, "offline testing starting\n");
/* Link test performed before hardware reset so autoneg doesn't
* interfere with test result */
if (ixgbevf_link_test(adapter, &data[1]))
eth_test->flags |= ETH_TEST_FL_FAILED;
if (if_running)
/* indicate we're in test mode */
dev_close(netdev);
else
ixgbevf_reset(adapter);
hw_dbg(&adapter->hw, "register testing starting\n");
if (ixgbevf_reg_test(adapter, &data[0]))
eth_test->flags |= ETH_TEST_FL_FAILED;
ixgbevf_reset(adapter);
clear_bit(__IXGBEVF_TESTING, &adapter->state);
if (if_running)
dev_open(netdev);
} else {
hw_dbg(&adapter->hw, "online testing starting\n");
/* Online tests */
if (ixgbevf_link_test(adapter, &data[1]))
eth_test->flags |= ETH_TEST_FL_FAILED;
/* Online tests aren't run; pass by default */
data[0] = 0;
clear_bit(__IXGBEVF_TESTING, &adapter->state);
}
msleep_interruptible(4 * 1000);
}
static void ixgbevf_diag_test(struct net_device *netdev,
struct ethtool_test *eth_test, u64 *data)
{
struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bool if_running = netif_running(netdev);
set_bit(__IXGBEVF_TESTING, &adapter->state);
if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
/* */
hw_dbg(&adapter->hw, "offline testing starting\n");
/*
*/
if (ixgbevf_link_test(adapter, &data[1]))
eth_test->flags |= ETH_TEST_FL_FAILED;
if (if_running)
/* */
dev_close(netdev);
else
ixgbevf_reset(adapter);
hw_dbg(&adapter->hw, "register testing starting\n");
if (ixgbevf_reg_test(adapter, &data[0]))
eth_test->flags |= ETH_TEST_FL_FAILED;
ixgbevf_reset(adapter);
clear_bit(__IXGBEVF_TESTING, &adapter->state);
if (if_running)
dev_open(netdev);
} else {
hw_dbg(&adapter->hw, "online testing starting\n");
/* */
if (ixgbevf_link_test(adapter, &data[1]))
eth_test->flags |= ETH_TEST_FL_FAILED;
/* */
data[0] = 0;
clear_bit(__IXGBEVF_TESTING, &adapter->state);
}
msleep_interruptible(4 * 1000);
}
static void wait_for_pll_locked(unsigned reg)
{
unsigned int st = 0, cnt = 10;
while (cnt--) {
msleep_interruptible(10);
st = !!(vout_cbus_read(reg) & (1 << 31));
if (st)
break;
else {
/* reset pll */
vout_cbus_set_bits(reg, 0x3, 29, 2);
vout_cbus_set_bits(reg, 0x2, 29, 2);
}
}
if (cnt < 9)
vout_log_info("pll[0x%x] reset %d times\n", reg, 9 - cnt);
}
static int lcd_reset(struct lcd_device *ld)
{
int timeout = 10;
pr_debug(" Chagall %s\n", __func__);
msleep_interruptible(150);
do {
if (gpio_get_value(GPIO_TCON_RDY))
break;
msleep(30);
} while (timeout--);
if (timeout < 0)
pr_err(" %s timeout...\n", __func__);
else
pr_info("%s duration: %d\n", __func__, 150+(10-timeout)*30);
return 0;
}
/******************************************************************************
* mv_eth_tool_get_link
* Description:
* ethtool physically identify port by LED blinking
* INPUT:
* netdev Network device structure pointer
* data Number of secunds to blink the LED
* OUTPUT
* None
* RETURN:
* 0 on success
*
*******************************************************************************/
int mv_eth_tool_phys_id(struct net_device *netdev, u32 data)
{
mv_eth_priv *priv = MV_ETH_PRIV(netdev);
u16 old_led_state;
if(!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
mv_eth_tool_read_phy_reg(priv->phy_id, ETH_TOOL_PHY_LED_CTRL_PAGE,
ETH_TOOL_PHY_LED_CTRL_REG, &old_led_state);
/* Forse LED blinking (all LED pins) */
mv_eth_tool_write_phy_reg(priv->phy_id, ETH_TOOL_PHY_LED_CTRL_PAGE,
ETH_TOOL_PHY_LED_CTRL_REG, 0x0BBB);
msleep_interruptible(data * 1000);
mv_eth_tool_write_phy_reg(priv->phy_id, ETH_TOOL_PHY_LED_CTRL_PAGE,
ETH_TOOL_PHY_LED_CTRL_REG, old_led_state);
return 0;
}
static int nodemgr_bus_read(struct csr1212_csr *csr, u64 addr, u16 length,
void *buffer, void *__ci)
{
struct nodemgr_csr_info *ci = (struct nodemgr_csr_info*)__ci;
int i, ret = 0;
for (i = 0; i < 3; i++) {
ret = hpsb_read(ci->host, ci->nodeid, ci->generation, addr,
buffer, length);
if (!ret)
break;
if (msleep_interruptible(334))
return -EINTR;
}
return ret;
}
static int lm3532_read_reg (struct i2c_client *client,
unsigned reg, uint8_t *value)
{
uint8_t buf[1];
int ret = 0;
if (!value)
return -EINVAL;
buf[0] = reg;
ret = i2c_master_send (client, buf, 1);
if (ret > 0) {
msleep_interruptible (1);
ret = i2c_master_recv (client, buf, 1);
if (ret > 0)
*value = buf[0];
}
return ret;
}
int ciCsdDataInitTask(void *data)
{
ShmApiMsg datastartmsg;
while (!kthread_should_stop()) {
if (!csdChannelInited) {
ciCsdSendMsgToServer(CiDataStubRequestStartProcId,
(unsigned char *)&datastartmsg, 0);
msleep_interruptible(3000);
} else {
break;
}
}
ciCsdInitTaskRef = NULL;
DBGMSG("csd channel csdChannelInited:%d!\n", csdChannelInited);
return 0;
}
