static inline void dpidle_pre_handler(void)
{
#ifndef CONFIG_MTK_FPGA
#ifdef CONFIG_THERMAL
    //cancel thermal hrtimer for power saving
    tscpu_cancel_thermal_timer();

	mtkts_bts_cancel_thermal_timer();
    mtkts_btsmdpa_cancel_thermal_timer();
    mtkts_pmic_cancel_thermal_timer();
    mtkts_battery_cancel_thermal_timer();
    mtkts_pa_cancel_thermal_timer();
	mtkts_allts_cancel_thermal_timer();
    mtkts_wmt_cancel_thermal_timer();
#endif
#endif
#if 0//FIXME: K2 early porting
    // disable gpu dvfs timer
    mtk_enable_gpu_dvfs_timer(false);

    // disable cpu dvfs timer
    hp_enable_timer(0);
#endif

}
/************************************************
 * idle task flow part
 ************************************************/
static inline void soidle_pre_handler(void)
{
#ifndef CONFIG_MTK_FPGA
#ifdef CONFIG_THERMAL
    //cancel thermal hrtimer for power saving
//    tscpu_cancel_thermal_timer();
	mtkts_bts_cancel_thermal_timer();
    mtkts_btsmdpa_cancel_thermal_timer();
    mtkts_pmic_cancel_thermal_timer();
    mtkts_battery_cancel_thermal_timer();
    mtkts_pa_cancel_thermal_timer();
	mtkts_allts_cancel_thermal_timer();
#endif
#endif
}
static inline void soidle_pre_handler(void)
{
    //stop Mali dvfs_callback timer
    if (!mtk_gpu_sodi_entry())
    {
        idle_ver("not stop GPU timer in SODI\n");
    }
    
#ifndef CONFIG_MTK_FPGA
#ifdef CONFIG_THERMAL
    //cancel thermal hrtimer for power saving
    //tscpu_cancel_thermal_timer();
	mtkts_bts_cancel_thermal_timer();
    mtkts_btsmdpa_cancel_thermal_timer();
    mtkts_pmic_cancel_thermal_timer();
    mtkts_battery_cancel_thermal_timer();
    mtkts_pa_cancel_thermal_timer();
	mtkts_allts_cancel_thermal_timer();
#endif
#endif
}