static int mv88e6xxx_g2_clear_irl(struct mv88e6xxx_chip *chip)
{
int port, err;
/* Init all Ingress Rate Limit resources of all ports */
for (port = 0; port < mv88e6xxx_num_ports(chip); ++port) {
/* XXX newer chips (like 88E6390) have different 2-bit ops */
err = mv88e6xxx_g2_write(chip, GLOBAL2_IRL_CMD,
GLOBAL2_IRL_CMD_OP_INIT_ALL |
(port << 8));
if (err)
break;
/* Wait for the operation to complete */
err = mv88e6xxx_g2_wait(chip, GLOBAL2_IRL_CMD,
GLOBAL2_IRL_CMD_BUSY);
if (err)
break;
}
return err;
}
static int mv88e6xxx_g2_eeprom_wait(struct mv88e6xxx_chip *chip)
{
return mv88e6xxx_g2_wait(chip, GLOBAL2_EEPROM_CMD,
GLOBAL2_EEPROM_CMD_BUSY |
GLOBAL2_EEPROM_CMD_RUNNING);
}
static int mv88e6xxx_g2_pvt_op_wait(struct mv88e6xxx_chip *chip)
{
return mv88e6xxx_g2_wait(chip, MV88E6XXX_G2_PVT_ADDR,
MV88E6XXX_G2_PVT_ADDR_BUSY);
}
static int mv88e6xxx_g2_eeprom_wait(struct mv88e6xxx_chip *chip)
{
return mv88e6xxx_g2_wait(chip, MV88E6XXX_G2_EEPROM_CMD,
MV88E6XXX_G2_EEPROM_CMD_BUSY |
MV88E6XXX_G2_EEPROM_CMD_RUNNING);
}
static int mv88e6xxx_g2_irl_wait(struct mv88e6xxx_chip *chip)
{
return mv88e6xxx_g2_wait(chip, MV88E6XXX_G2_IRL_CMD,
MV88E6XXX_G2_IRL_CMD_BUSY);
}
