/*******************************************************************************
* mvXorAllStop - Stop any XOR activity.
*
* DESCRIPTION:
* This function stops any XOR activity.
*
* INPUT:
* None.
*
* OUTPUT:
* None.
*
* RETURN:
* None.
*
*******************************************************************************/
MV_VOID mvXorAllStop(MV_VOID)
{
MV_U32 xorChanNum;
/* Abort any XOR activity */
for(xorChanNum = 0; xorChanNum < MV_XOR_MAX_CHAN; xorChanNum++)
{
mvXorCommandSet(xorChanNum, MV_STOP);
}
return;
}
/*******************************************************************************
* mvXorHalInit - Initialize XOR engine
*
* DESCRIPTION:
* This function initialize XOR unit.
* INPUT:
* None.
*
* OUTPUT:
* None.
*
* RETURN:
* GT_BAD_PARAM if parameters to function invalid, GT_OK otherwise.
*******************************************************************************/
GT_VOID mvXorHalInit(GT_U32 xorChanNum)
{
GT_U32 i;
/* Abort any XOR activity & set default configuration */
for (i = 0; i < xorChanNum; i++) {
mvXorCommandSet(i, MV_STOP);
mvXorCtrlSet(i, (1 << XEXCR_REG_ACC_PROTECT_OFFS) |
(4 << XEXCR_DST_BURST_LIMIT_OFFS) | (4 << XEXCR_SRC_BURST_LIMIT_OFFS)
#if defined(MV_CPU_BE)
/* | (1 << XEXCR_DRD_RES_SWP_OFFS)
| (1 << XEXCR_DWR_REQ_SWP_OFFS)
*/
| (1 << XEXCR_DES_SWP_OFFS)
#endif
);
}
}
/*******************************************************************************
* mvXorHalInit - Initialize XOR engine
*
* DESCRIPTION:
* This function initialize XOR unit.
* INPUT:
* None.
*
* OUTPUT:
* None.
*
* RETURN:
* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
*******************************************************************************/
MV_VOID mvXorHalInit(MV_U32 unit)
{
MV_U32 i;
MV_U32 maxChan;
/* Abort any XOR activity & set default configuration */
/* loop over unit channels */
maxChan = (MV_XOR_MAX_CHAN_PER_UNIT * unit) + MV_XOR_MAX_CHAN_PER_UNIT;
for (i = (MV_XOR_MAX_CHAN_PER_UNIT * unit); i < maxChan; i++) {
mvXorCommandSet(i, MV_STOP);
mvXorCtrlSet(i, (1 << XEXCR_REG_ACC_PROTECT_OFFS) |
(4 << XEXCR_DST_BURST_LIMIT_OFFS) | (4 << XEXCR_SRC_BURST_LIMIT_OFFS)
#if defined(MV_CPU_BE)
/* | (1 << XEXCR_DRD_RES_SWP_OFFS)
| (1 << XEXCR_DWR_REQ_SWP_OFFS)
*/
| (1 << XEXCR_DES_SWP_OFFS)
#endif
);
}
}
