static void mx6_set_cpu_type(void)
{
u32 cpu_type = readl(IO_ADDRESS(ANATOP_BASE_ADDR + 0x260));
cpu_type >>= 16;
if (cpu_type == 0x63)
mxc_set_cpu_type(MXC_CPU_MX6Q);
else if (cpu_type == 0x61)
mxc_set_cpu_type(MXC_CPU_MX6DL);
else
pr_err("Unknown CPU type: %x\n", cpu_type);
}
void __init imx51_init_early(void)
{
imx51_ipu_mipi_setup();
mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
imx_src_init();
}
void __init imx21_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX21);
mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR));
imx_iomuxv1_init(MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR),
MX21_NUM_GPIO_PORT);
}
void __init mx53_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX53);
mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG_BASE_ADDR));
iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
}
void __init imx51_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
arm_pm_idle = imx5_idle;
}
static void __init mx51_efikamx_fixup(struct machine_desc *desc, struct tag *tags,
char **cmdline, struct meminfo *mi)
{
struct tag *mem_tag = 0;
int total_mem = SZ_512M;
int fb_mem = SZ_16M;
int gpu_mem = SZ_32M;
int sys_mem;
mxc_set_cpu_type(MXC_CPU_MX51);
get_cpu_wp = mx51_efikamx_get_cpu_wp;
set_num_cpu_wp = mx51_efikamx_set_num_cpu_wp;
for_each_tag(mem_tag, tags) {
if (mem_tag->hdr.tag == ATAG_MEM) {
total_mem = mem_tag->u.mem.size;
break;
}
}
sys_mem = total_mem - gpu_mem - fb_mem;
if (mem_tag) {
unsigned int fb_start = mem_tag->u.mem.start + sys_mem;
unsigned int gpu_start = fb_start + fb_mem;
mem_tag->u.mem.size = sys_mem;
mx51_efikamx_display_adjust_mem(fb_start, fb_mem);
mx51_efikamx_gpu_adjust_mem(gpu_start, gpu_mem);
}
}
/*!
* This function initializes the memory map. It is called during the
* system startup to create static physical to virtual memory mappings
* for the IO modules.
*/
void __init mx31_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
void __init mx1_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX1);
mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR));
iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
}
/*!
* Board specific fixup function. It is called by \b setup_arch() in
* setup.c file very early on during kernel starts. It allows the user to
* statically fill in the proper values for the passed-in parameters. None of
* the parameters is used currently.
*
* @param desc pointer to \b struct \b machine_desc
* @param tags pointer to \b struct \b tag
* @param cmdline pointer to the command line
* @param mi pointer to \b struct \b meminfo
*/
static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
char **cmdline, struct meminfo *mi)
{
mxc_set_cpu_type(MXC_CPU_MX51);
get_cpu_wp = mx51_3stack_get_cpu_wp;
set_num_cpu_wp = mx51_3stack_set_num_cpu_wp;
}
/*!
* Board specific fixup function. It is called by \b setup_arch() in
* setup.c file very early on during kernel starts. It allows the user to
* statically fill in the proper values for the passed-in parameters. None of
* the parameters is used currently.
*
* @param desc pointer to \b struct \b machine_desc
* @param tags pointer to \b struct \b tag
* @param cmdline pointer to the command line
* @param mi pointer to \b struct \b meminfo
*/
static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
char **cmdline, struct meminfo *mi)
{
mxc_set_cpu_type(MXC_CPU_MX51);
get_cpu_wp = mx51_3stack_get_cpu_wp;
set_num_cpu_wp = mx51_3stack_set_num_cpu_wp;
get_dvfs_core_wp = mx51_3stack_get_dvfs_core_table;
num_cpu_wp = ARRAY_SIZE(cpu_wp_auto);
}
static void mx6_set_cpu_type(void)
{
u32 cpu_type = readl(IO_ADDRESS(ANATOP_BASE_ADDR + 0x280));
cpu_type >>= 16;
if (cpu_type == 0x60) {
mxc_set_cpu_type(MXC_CPU_MX6SL);
imx_print_silicon_rev("i.MX6SoloLite", mx6sl_revision());
return;
}
cpu_type = readl(IO_ADDRESS(ANATOP_BASE_ADDR + 0x260));
cpu_type >>= 16;
if (cpu_type == 0x63) {
mxc_set_cpu_type(MXC_CPU_MX6Q);
imx_print_silicon_rev("i.MX6Q", mx6q_revision());
} else if (cpu_type == 0x61) {
mxc_set_cpu_type(MXC_CPU_MX6DL);
imx_print_silicon_rev("i.MX6DL/SOLO", mx6dl_revision());
} else
pr_err("Unknown CPU type: %x\n", cpu_type);
}
int __init mx31_clocks_init(unsigned long fref)
{
u32 reg;
int i;
mxc_set_cpu_type(MXC_CPU_MX31);
ckih_rate = fref;
for (i = 0; i < ARRAY_SIZE(lookups); i++)
clkdev_add(&lookups[i]);
/* Turn off all possible clocks */
__raw_writel((3 << 4), MXC_CCM_CGR0);
__raw_writel(0, MXC_CCM_CGR1);
__raw_writel((3 << 8) | (3 << 14) | (3 << 16)|
1 << 27 | 1 << 28, /* Bit 27 and 28 are not defined for
MX32, but still required to be set */
MXC_CCM_CGR2);
usb_pll_disable(&usb_pll_clk);
pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk));
clk_enable(&gpt_clk);
clk_enable(&emi_clk);
clk_enable(&iim_clk);
clk_enable(&serial_pll_clk);
if (mx31_revision() >= CHIP_REV_2_0) {
reg = __raw_readl(MXC_CCM_PMCR1);
/* No PLL restart on DVFS switch; enable auto EMI handshake */
reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
__raw_writel(reg, MXC_CCM_PMCR1);
}
mxc_timer_init(&ipg_clk);
return 0;
}
static void __init imx25_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX25);
}
/*
* This function initializes the memory map. It is called during the
* system startup to create static physical to virtual memory map for
* the IO modules.
*/
void __init mxc91231_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MXC91231);
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
void __init imx53_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX53);
imx_src_init();
}
static void __init imx51_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX51);
}
void __init imx27_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX27);
imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR),
MX27_NUM_GPIO_PORT);
}
void __init imx53_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX53);
mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
}
static void __init fixup_android_board(struct machine_desc *desc, struct tag *tags,
char **cmdline, struct meminfo *mi)
{
char *str;
struct tag *t;
struct tag *mem_tag = 0;
int total_mem = SZ_1G;
int left_mem = 0, avali_mem = 0;
int gpu_mem = SZ_64M;
int pmem_gpu_size = android_pmem_gpu_data.size;
int pmem_adsp_size = android_pmem_data.size;
mxc_set_cpu_type(MXC_CPU_MX53);
/* get mem= and gpu_memory= from cmdline */
for_each_tag(t, tags) {
if (t->hdr.tag == ATAG_CMDLINE) {
str = t->u.cmdline.cmdline;
str = strstr(str, "mem=");
if (str != NULL) {
str += 4;
avali_mem = memparse(str, &str);
}
str = t->u.cmdline.cmdline;
str = strstr(str, "gpu_nommu");
if (str != NULL)
gpu_data.enable_mmu = 0;
str = t->u.cmdline.cmdline;
str = strstr(str, "gpu_memory=");
if (str != NULL) {
str += 11;
gpu_mem = memparse(str, &str);
}
break;
}
}
if (gpu_data.enable_mmu)
gpu_mem = 0;
/* get total memory from TAGS */
for_each_tag(mem_tag, tags) {
if (mem_tag->hdr.tag == ATAG_MEM) {
total_mem = mem_tag->u.mem.size;
left_mem = total_mem - gpu_mem
- pmem_gpu_size - pmem_adsp_size;
break;
}
}
if (avali_mem > 0 && avali_mem < left_mem)
left_mem = avali_mem;
if (mem_tag) {
android_pmem_data.start = mem_tag->u.mem.start
+ left_mem + gpu_mem + pmem_gpu_size;
android_pmem_gpu_data.start = mem_tag->u.mem.start
+ left_mem + gpu_mem;
mem_tag->u.mem.size = left_mem;
/*reserve memory for gpu*/
if (!gpu_data.enable_mmu) {
gpu_device.resource[5].start =
mem_tag->u.mem.start + left_mem;
gpu_device.resource[5].end =
gpu_device.resource[5].start + gpu_mem - 1;
}
}
}
void __init imx31_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
}
/*!
* Board specific fixup function. It is called by \b setup_arch() in
* setup.c file very early on during kernel starts. It allows the user to
* statically fill in the proper values for the passed-in parameters. None of
* the parameters is used currently.
*
* @param desc pointer to \b struct \b machine_desc
* @param tags pointer to \b struct \b tag
* @param cmdline pointer to the command line
* @param mi pointer to \b struct \b meminfo
*/
static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
char **cmdline, struct meminfo *mi)
{
char *str;
struct tag *t;
struct tag *mem_tag = 0;
int total_mem = SZ_512M;
int left_mem = 0;
int gpu_mem = SZ_64M;
int fb_mem = SZ_32M;
mxc_set_cpu_type(MXC_CPU_MX51);
get_cpu_wp = mx51_babbage_get_cpu_wp;
set_num_cpu_wp = mx51_babbage_set_num_cpu_wp;
for_each_tag(mem_tag, tags) {
if (mem_tag->hdr.tag == ATAG_MEM) {
total_mem = mem_tag->u.mem.size;
left_mem = total_mem - gpu_mem - fb_mem;
break;
}
}
for_each_tag(t, tags) {
if (t->hdr.tag == ATAG_CMDLINE) {
str = t->u.cmdline.cmdline;
str = strstr(str, "mem=");
if (str != NULL) {
str += 4;
left_mem = memparse(str, &str);
if (left_mem == 0 || left_mem > total_mem)
left_mem = total_mem - gpu_mem - fb_mem;
}
str = t->u.cmdline.cmdline;
str = strstr(str, "gpu_memory=");
if (str != NULL) {
str += 11;
gpu_mem = memparse(str, &str);
}
break;
}
}
if (mem_tag) {
fb_mem = total_mem - left_mem - gpu_mem;
if (fb_mem < 0) {
gpu_mem = total_mem - left_mem;
fb_mem = 0;
}
mem_tag->u.mem.size = left_mem;
/*reserve memory for gpu*/
gpu_device.resource[5].start =
mem_tag->u.mem.start + left_mem;
gpu_device.resource[5].end =
gpu_device.resource[5].start + gpu_mem - 1;
#if defined(CONFIG_FB_MXC_SYNC_PANEL) || \
defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE)
if (fb_mem) {
mxcfb_resources[0].start =
gpu_device.resource[5].end + 1;
mxcfb_resources[0].end =
mxcfb_resources[0].start + fb_mem - 1;
} else {
mxcfb_resources[0].start = 0;
mxcfb_resources[0].end = 0;
}
#endif
}
}
void __init imx53_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX53);
mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
imx_src_init();
}
