void nRFCMD_Execute(void) { nRFCMD_Macro(g_MacroStart); sleep_2ms(); CONFIG_PIN_CE = 1; sleep_2ms(); CONFIG_PIN_CE = 0; nRFCMD_Stop(); }
void nRFCMD_Execute (void) { nRFCMD_Macro (g_MacroStart); msleep (1); CONFIG_PIN_CE = 1; usleep (12); CONFIG_PIN_CE = 0; nRFCMD_Stop (); }
void nRFCMD_Execute (void) { nRFCMD_Macro (g_MacroStart); sleep_jiffies (TIMER1_JIFFIES_PER_MS); CONFIG_PIN_CE_HIGH; usleep (12); CONFIG_PIN_CE_LOW; nRFCMD_Stop (); }
void nRFCMD_Init(void) { /* update CPU default pin settings */ CONFIG_PIN_CSN = 1; CONFIG_PIN_CE = 0; CONFIG_PIN_MOSI = 0; CONFIG_PIN_SCK = 0; sleep_2ms(); /* send initialization macro to RF chip */ nRFCMD_Macro(g_MacroInitialization); }
void nRFCMD_Init (void) { /* update CPU default pin settings */ CONFIG_PIN_CSN_LOW; //Travis code = LOW, Openbeacon code = HIGH ???? CONFIG_PIN_CE_LOW; CONFIG_PIN_MOSI_LOW; CONFIG_PIN_SCK_LOW; sleep_2ms (); /* send initialization macro to RF chip */ nRFCMD_Macro (g_MacroInitialization); }
void nRFCMD_InitSniff (void) { /* update CPU default pin settings */ CONFIG_PIN_CSN_LOW; CONFIG_PIN_CE_LOW; CONFIG_PIN_MOSI_LOW; CONFIG_PIN_SCK_LOW; sleep_2ms (); /* send initialization macro to RF chip */ nRFCMD_Macro (g_MacroSniff); }
void nRFCMD_Init (void) { /* configure CPU peripherals */ OPTION = CONFIG_CPU_OPTION; TRISA = CONFIG_CPU_TRISA; TRISC = CONFIG_CPU_TRISC; WPUA = CONFIG_CPU_WPUA; ANSEL = CONFIG_CPU_ANSEL; CMCON0 = CONFIG_CPU_CMCON0; OSCCON = CONFIG_CPU_OSCCON; /* update CPU default pin settings */ CONFIG_PIN_CSN = 1; CONFIG_PIN_CE = 0; CONFIG_PIN_MOSI = 0; CONFIG_PIN_SCK = 0; sleep2ms (); /* send initialization macro to RF chip */ nRFCMD_Macro (g_MacroInitialization); }
void nRFCMD_Stop(void) { nRFCMD_Macro(g_MacroStop); }
void nRFCMD_StartRX (void) { nRFCMD_Macro (g_MacroStartRX); sleep_jiffies (TIMER1_JIFFIES_PER_MS); }
void nRFCMD_Start (void) { nRFCMD_Macro (g_MacroStart); }
void nRFCMD_ResetStop (void) { nRFCMD_Macro (g_MacroResetStop); }
void nRFCMD_StartRX (void) { nRFCMD_Macro (g_MacroStartRX); sleep_jiffies ( JIFFIES_PER_MS(1) ); }