static irqreturn_t cpmac_irq(int irq, void *dev_id)
{
struct net_device *dev = dev_id;
struct cpmac_priv *priv;
int queue;
u32 status;
priv = netdev_priv(dev);
status = cpmac_read(priv->regs, CPMAC_MAC_INT_VECTOR);
if (unlikely(netif_msg_intr(priv)))
printk(KERN_DEBUG "%s: interrupt status: 0x%08x\n", dev->name,
status);
if (status & MAC_INT_TX)
cpmac_end_xmit(dev, (status & 7));
if (status & MAC_INT_RX) {
queue = (status >> 8) & 7;
if (netif_rx_schedule_prep(dev, &priv->napi)) {
cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 1 << queue);
__netif_rx_schedule(dev, &priv->napi);
}
}
static irqreturn_t
cp_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
{
struct net_device *dev = dev_instance;
struct cp_private *cp;
u16 status;
if (unlikely(dev == NULL))
return IRQ_NONE;
cp = netdev_priv(dev);
status = cpr16(IntrStatus);
if (!status || (status == 0xFFFF))
return IRQ_NONE;
if (netif_msg_intr(cp))
printk(KERN_DEBUG "%s: intr, status %04x cmd %02x cpcmd %04x\n",
dev->name, status, cpr8(Cmd), cpr16(CpCmd));
cpw16(IntrStatus, status & ~cp_rx_intr_mask);
spin_lock(&cp->lock);
/* close possible race's with dev_close */
if (unlikely(!netif_running(dev))) {
cpw16(IntrMask, 0);
spin_unlock(&cp->lock);
return IRQ_HANDLED;
}
if (status & (RxOK | RxErr | RxEmpty | RxFIFOOvr))
if (netif_rx_schedule_prep(dev)) {
cpw16_f(IntrMask, cp_norx_intr_mask);
__netif_rx_schedule(dev);
}
if (status & (TxOK | TxErr | TxEmpty | SWInt))
cp_tx(cp);
if (status & LinkChg)
mii_check_media(&cp->mii_if, netif_msg_link(cp), FALSE);
spin_unlock(&cp->lock);
if (status & PciErr) {
u16 pci_status;
pci_read_config_word(cp->pdev, PCI_STATUS, &pci_status);
pci_write_config_word(cp->pdev, PCI_STATUS, pci_status);
printk(KERN_ERR "%s: PCI bus error, status=%04x, PCI status=%04x\n",
dev->name, status, pci_status);
/* TODO: reset hardware */
}
return IRQ_HANDLED;
}
static irqreturn_t emac_interrupt(int irq, void *dev_id)
{
struct net_device *dev = dev_id;
struct emac_board_info *db = netdev_priv(dev);
int int_status;
unsigned long flags;
unsigned int reg_val;
/* A real interrupt coming */
/* holders of db->lock must always block IRQs */
spin_lock_irqsave(&db->lock, flags);
/* Disable all interrupts */
writel(0, db->membase + EMAC_INT_CTL_REG);
/* Got EMAC interrupt status */
/* Got ISR */
int_status = readl(db->membase + EMAC_INT_STA_REG);
/* Clear ISR status */
writel(int_status, db->membase + EMAC_INT_STA_REG);
if (netif_msg_intr(db))
dev_dbg(db->dev, "emac interrupt %02x\n", int_status);
/* Received the coming packet */
if ((int_status & 0x100) && (db->emacrx_completed_flag == 1)) {
/* carrier lost */
db->emacrx_completed_flag = 0;
emac_rx(dev);
}
/* Transmit Interrupt check */
if (int_status & (0x01 | 0x02))
emac_tx_done(dev, db, int_status);
if (int_status & (0x04 | 0x08))
//netdev_info(dev, " ab : %x\n", int_status);
vmm_printf(" ab : %x\n", int_status);
/* Re-enable interrupt mask */
if (db->emacrx_completed_flag == 1) {
reg_val = readl(db->membase + EMAC_INT_CTL_REG);
reg_val |= (0xf << 0) | (0x01 << 8);
writel(reg_val, db->membase + EMAC_INT_CTL_REG);
}
spin_unlock_irqrestore(&db->lock, flags);
return IRQ_HANDLED;
}
/* Interrupt handler */
static int pm3393_interrupt_handler(struct cmac *cmac)
{
u32 master_intr_status;
/* Read the master interrupt status register. */
pmread(cmac, SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS,
&master_intr_status);
if (netif_msg_intr(cmac->adapter))
dev_dbg(&cmac->adapter->pdev->dev, "PM3393 intr cause 0x%x\n",
master_intr_status);
/* TBD XXX Lets just clear everything for now */
pm3393_interrupt_clear(cmac);
return 0;
}
static int pm3393_interrupt_handler(struct cmac *cmac)
{
u32 master_intr_status;
pmread(cmac, SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS,
&master_intr_status);
if (netif_msg_intr(cmac->adapter))
dev_dbg(&cmac->adapter->pdev->dev, "PM3393 intr cause 0x%x\n",
master_intr_status);
pm3393_interrupt_clear(cmac);
return 0;
}
static int gem_pcs_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status)
{
u32 pcs_istat = readl(gp->regs + PCS_ISTAT);
u32 pcs_miistat;
if (netif_msg_intr(gp))
printk(KERN_DEBUG "%s: pcs interrupt, pcs_istat: 0x%x\n",
gp->dev->name, pcs_istat);
if (!(pcs_istat & PCS_ISTAT_LSC)) {
printk(KERN_ERR "%s: PCS irq but no link status change???\n",
dev->name);
return 0;
}
/* The link status bit latches on zero, so you must
* read it twice in such a case to see a transition
* to the link being up.
*/
pcs_miistat = readl(gp->regs + PCS_MIISTAT);
if (!(pcs_miistat & PCS_MIISTAT_LS))
pcs_miistat |=
(readl(gp->regs + PCS_MIISTAT) &
PCS_MIISTAT_LS);
if (pcs_miistat & PCS_MIISTAT_ANC) {
/* The remote-fault indication is only valid
* when autoneg has completed.
*/
if (pcs_miistat & PCS_MIISTAT_RF)
printk(KERN_INFO "%s: PCS AutoNEG complete, "
"RemoteFault\n", dev->name);
else
printk(KERN_INFO "%s: PCS AutoNEG complete.\n",
dev->name);
}
if (pcs_miistat & PCS_MIISTAT_LS) {
printk(KERN_INFO "%s: PCS link is now up.\n",
dev->name);
netif_carrie
static void gem_handle_mif_event(struct gem *gp, u32 reg_val, u32 changed_bits)
{
if (netif_msg_intr(gp))
printk(KERN_DEBUG "%s: mif interrupt\n", gp->dev->name);
}
