static int
netxen_api_lock(struct netxen_adapter *adapter)
{
u32 done = 0, timeout = 0;
for (;;) {
/* Acquire PCIE HW semaphore5 */
netxen_nic_read_w0(adapter,
NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);
if (done == 1)
break;
if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
printk(KERN_ERR "%s: lock timeout.\n", __func__);
return -1;
}
msleep(1);
}
#if 0
netxen_nic_write_w1(adapter,
NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
#endif
return 0;
}
static void
netxen_nic_get_pauseparam(struct net_device *dev,
struct ethtool_pauseparam *pause)
{
struct netxen_adapter *adapter = netdev_priv(dev);
__u32 val;
int port = adapter->physical_port;
if (adapter->ahw.board_type == NETXEN_NIC_GBE) {
if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
return;
/* get flow control settings */
netxen_nic_read_w0(adapter,NETXEN_NIU_GB_MAC_CONFIG_0(port),
&val);
pause->rx_pause = netxen_gb_get_rx_flowctl(val);
netxen_nic_read_w0(adapter, NETXEN_NIU_GB_PAUSE_CTL, &val);
switch (port) {
case 0:
pause->tx_pause = !(netxen_gb_get_gb0_mask(val));
break;
case 1:
pause->tx_pause = !(netxen_gb_get_gb1_mask(val));
break;
case 2:
pause->tx_pause = !(netxen_gb_get_gb2_mask(val));
break;
case 3:
default:
pause->tx_pause = !(netxen_gb_get_gb3_mask(val));
break;
}
} else if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
if ((port < 0) || (port > NETXEN_NIU_MAX_XG_PORTS))
return;
pause->rx_pause = 1;
netxen_nic_read_w0(adapter, NETXEN_NIU_XG_PAUSE_CTL, &val);
if (port == 0)
pause->tx_pause = !(netxen_xg_get_xg0_mask(val));
else
pause->tx_pause = !(netxen_xg_get_xg1_mask(val));
} else {
printk(KERN_ERR"%s: Unknown board type: %x\n",
netxen_nic_driver_name, adapter->ahw.board_type);
}
}
static int
netxen_api_unlock(struct netxen_adapter *adapter)
{
u32 val;
/* Release PCIE HW semaphore5 */
netxen_nic_read_w0(adapter,
NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
return 0;
}
static int netxen_nic_reg_test(struct net_device *dev)
{
struct netxen_adapter *adapter = netdev_priv(dev);
u32 data_read, data_written;
netxen_nic_read_w0(adapter, NETXEN_PCIX_PH_REG(0), &data_read);
if ((data_read & 0xffff) != PHAN_VENDOR_ID)
return 1;
data_written = (u32)0xa5a5a5a5;
netxen_nic_reg_write(adapter, CRB_SCRATCHPAD_TEST, data_written);
data_read = adapter->pci_read_normalize(adapter, CRB_SCRATCHPAD_TEST);
if (data_written != data_read)
return 1;
return 0;
}
static void
netxen_nic_get_pauseparam(struct net_device *dev,
struct ethtool_pauseparam *pause)
{
struct netxen_port *port = netdev_priv(dev);
struct netxen_adapter *adapter = port->adapter;
__u32 val;
if (adapter->ahw.board_type == NETXEN_NIC_GBE) {
/* get flow control settings */
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(port->portnum),
&val);
pause->rx_pause = netxen_gb_get_rx_flowctl(val);
pause->tx_pause = netxen_gb_get_tx_flowctl(val);
/* get autoneg settings */
pause->autoneg = port->link_autoneg;
}
}
static int
netxen_nic_set_pauseparam(struct net_device *dev,
struct ethtool_pauseparam *pause)
{
struct netxen_port *port = netdev_priv(dev);
struct netxen_adapter *adapter = port->adapter;
__u32 val;
unsigned int autoneg;
/* read mode */
if (adapter->ahw.board_type == NETXEN_NIC_GBE) {
/* set flow control */
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(port->portnum),
(u32 *) & val);
if (pause->tx_pause)
netxen_gb_tx_flowctl(val);
else
netxen_gb_unset_tx_flowctl(val);
if (pause->rx_pause)
netxen_gb_rx_flowctl(val);
else
netxen_gb_unset_rx_flowctl(val);
netxen_nic_write_w0(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(port->portnum),
*&val);
/* set autoneg */
autoneg = pause->autoneg;
if (adapter->phy_write
&& adapter->phy_write(adapter, port->portnum,
NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG,
autoneg) != 0)
return -EIO;
else {
port->link_autoneg = pause->autoneg;
return 0;
}
} else
return -EOPNOTSUPP;
}
static int
netxen_nic_set_pauseparam(struct net_device *dev,
struct ethtool_pauseparam *pause)
{
struct netxen_adapter *adapter = netdev_priv(dev);
__u32 val;
int port = adapter->physical_port;
/* read mode */
if (adapter->ahw.board_type == NETXEN_NIC_GBE) {
if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
return -EIO;
/* set flow control */
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_MAC_CONFIG_0(port), &val);
if (pause->rx_pause)
netxen_gb_rx_flowctl(val);
else
netxen_gb_unset_rx_flowctl(val);
netxen_nic_write_w0(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
val);
/* set autoneg */
netxen_nic_read_w0(adapter, NETXEN_NIU_GB_PAUSE_CTL, &val);
switch (port) {
case 0:
if (pause->tx_pause)
netxen_gb_unset_gb0_mask(val);
else
netxen_gb_set_gb0_mask(val);
break;
case 1:
if (pause->tx_pause)
netxen_gb_unset_gb1_mask(val);
else
netxen_gb_set_gb1_mask(val);
break;
case 2:
if (pause->tx_pause)
netxen_gb_unset_gb2_mask(val);
else
netxen_gb_set_gb2_mask(val);
break;
case 3:
default:
if (pause->tx_pause)
netxen_gb_unset_gb3_mask(val);
else
netxen_gb_set_gb3_mask(val);
break;
}
netxen_nic_write_w0(adapter, NETXEN_NIU_GB_PAUSE_CTL, val);
} else if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
if ((port < 0) || (port > NETXEN_NIU_MAX_XG_PORTS))
return -EIO;
netxen_nic_read_w0(adapter, NETXEN_NIU_XG_PAUSE_CTL, &val);
if (port == 0) {
if (pause->tx_pause)
netxen_xg_unset_xg0_mask(val);
else
netxen_xg_set_xg0_mask(val);
} else {
if (pause->tx_pause)
netxen_xg_unset_xg1_mask(val);
else
netxen_xg_set_xg1_mask(val);
}
netxen_nic_write_w0(adapter, NETXEN_NIU_XG_PAUSE_CTL, val);
} else {
printk(KERN_ERR "%s: Unknown board type: %x\n",
netxen_nic_driver_name,
adapter->ahw.board_type);
}
return 0;
}
static int netxen_nic_reg_test(struct net_device *dev)
{
struct netxen_port *port = netdev_priv(dev);
struct netxen_adapter *adapter = port->adapter;
u32 data_read, data_written, save;
__u32 mode;
/*
* first test the "Read Only" registers by writing which mode
*/
netxen_nic_read_w0(adapter, NETXEN_NIU_MODE, &mode);
if (netxen_get_niu_enable_ge(mode)) { /* GB Mode */
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_STATUS(port->portnum),
&data_read);
save = data_read;
if (data_read)
data_written = data_read & NETXEN_NIC_INVALID_DATA;
else
data_written = NETXEN_NIC_INVALID_DATA;
netxen_nic_write_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_STATUS(port->
portnum),
data_written);
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_STATUS(port->portnum),
&data_read);
if (data_written == data_read) {
netxen_nic_write_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_STATUS(port->
portnum),
save);
return 0;
}
/* netxen_niu_gb_mii_mgmt_indicators is read only */
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_INDICATE(port->
portnum),
&data_read);
save = data_read;
if (data_read)
data_written = data_read & NETXEN_NIC_INVALID_DATA;
else
data_written = NETXEN_NIC_INVALID_DATA;
netxen_nic_write_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_INDICATE(port->
portnum),
data_written);
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_INDICATE(port->
portnum),
&data_read);
if (data_written == data_read) {
netxen_nic_write_w0(adapter,
NETXEN_NIU_GB_MII_MGMT_INDICATE
(port->portnum), save);
return 0;
}
/* netxen_niu_gb_interface_status is read only */
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_INTERFACE_STATUS(port->
portnum),
&data_read);
save = data_read;
if (data_read)
data_written = data_read & NETXEN_NIC_INVALID_DATA;
else
data_written = NETXEN_NIC_INVALID_DATA;
netxen_nic_write_w0(adapter,
NETXEN_NIU_GB_INTERFACE_STATUS(port->
portnum),
data_written);
netxen_nic_read_w0(adapter,
NETXEN_NIU_GB_INTERFACE_STATUS(port->
portnum),
&data_read);
if (data_written == data_read) {
netxen_nic_write_w0(adapter,
NETXEN_NIU_GB_INTERFACE_STATUS
(port->portnum), save);
return 0;
}
} /* GB Mode */
return 1;
}
