ir_node *be_duplicate_node(ir_node *node) { ir_node *block = be_transform_node(get_nodes_block(node)); ir_graph *irg = env.irg; dbg_info *dbgi = get_irn_dbg_info(node); ir_mode *mode = get_irn_mode(node); ir_op *op = get_irn_op(node); ir_node *new_node; int arity = get_irn_arity(node); if (op->opar == oparity_dynamic) { new_node = new_ir_node(dbgi, irg, block, op, mode, -1, NULL); for (int i = 0; i < arity; ++i) { ir_node *in = get_irn_n(node, i); in = be_transform_node(in); add_irn_n(new_node, in); } } else { ir_node **ins = ALLOCAN(ir_node*, arity); for (int i = 0; i < arity; ++i) { ir_node *in = get_irn_n(node, i); ins[i] = be_transform_node(in); } new_node = new_ir_node(dbgi, irg, block, op, mode, arity, ins); } copy_node_attr(irg, node, new_node); be_duplicate_deps(node, new_node); new_node->node_nr = node->node_nr; return new_node; }
ir_node *be_new_Start(ir_graph *const irg, be_start_out const *const outs) { ir_node *const block = get_irg_start_block(irg); ir_node *const start = new_ir_node(NULL, irg, block, op_be_Start, mode_T, 0, NULL); unsigned const n_regs = isa_if->n_registers; /* Count the number of outsputs. */ unsigned k = 1; /* +1 for memory */ for (unsigned i = 0; i != n_regs; ++i) { if (outs[i] != BE_START_NO) ++k; } be_info_init_irn(start, arch_irn_flag_schedule_first, NULL, k); /* Set out requirements and registers. */ unsigned l = 0; arch_set_irn_register_req_out(start, l++, arch_memory_req); arch_register_t const *const regs = isa_if->registers; for (unsigned i = 0; i != n_regs; ++i) { if (outs[i] != BE_START_NO) { arch_register_t const *const reg = ®s[i]; bool const ignore = outs[i] == BE_START_IGNORE; arch_register_req_t const *const req = be_create_reg_req(irg, reg, ignore); arch_set_irn_register_req_out(start, l, req); arch_set_irn_register_out( start, l, reg); ++l; } } assert(l == k); return start; }
ir_node *be_transform_phi(ir_node *node, const arch_register_req_t *req) { ir_node *block = be_transform_nodes_block(node); ir_graph *irg = get_irn_irg(block); dbg_info *dbgi = get_irn_dbg_info(node); /* phi nodes allow loops, so we use the old arguments for now * and fix this later */ ir_node **ins = get_irn_in(node)+1; int arity = get_irn_arity(node); ir_mode *mode = req->cls != NULL ? req->cls->mode : get_irn_mode(node); ir_node *phi = new_ir_node(dbgi, irg, block, op_Phi, mode, arity, ins); copy_node_attr(irg, node, phi); backend_info_t *info = be_get_info(phi); info->in_reqs = be_allocate_in_reqs(irg, arity); for (int i = 0; i < arity; ++i) { info->in_reqs[i] = req; } arch_set_irn_register_req_out(phi, 0, req); be_enqueue_preds(node); return phi; }
ir_node *new_rd_ASM(dbg_info *db, ir_node *block, ir_node *mem, int arity, ir_node *in[], ir_asm_constraint *inputs, size_t n_outs, ir_asm_constraint *outputs, size_t n_clobber, ident *clobber[], ident *text) { ir_graph *const irg = get_irn_irg(block); int const r_arity = arity + 1; ir_node **const r_in = ALLOCAN(ir_node*, r_arity); r_in[0] = mem; MEMCPY(&r_in[1], in, arity); ir_node *res = new_ir_node(db, irg, block, op_ASM, mode_T, r_arity, r_in); struct obstack *const obst = get_irg_obstack(irg); asm_attr *const a = &res->attr.assem; a->exc.pinned = true; a->input_constraints = NEW_ARR_D(ir_asm_constraint, obst, arity); a->output_constraints = NEW_ARR_D(ir_asm_constraint, obst, n_outs); a->clobbers = NEW_ARR_D(ident*, obst, n_clobber); a->text = text; MEMCPY(a->input_constraints, inputs, arity); MEMCPY(a->output_constraints, outputs, n_outs); MEMCPY(a->clobbers, clobber, n_clobber); verify_new_node(res); res = optimize_node(res); return res; }
ir_node *be_new_Perm(arch_register_class_t const *const cls, ir_node *const block, int const n, ir_node *const *const in) { ir_graph *irg = get_irn_irg(block); ir_node *irn = new_ir_node(NULL, irg, block, op_be_Perm, mode_T, n, in); init_node_attr(irn, n, arch_irn_flags_none); be_node_attr_t *attr = (be_node_attr_t*)get_irn_generic_attr(irn); attr->exc.pin_state = op_pin_state_pinned; for (int i = 0; i < n; ++i) { const ir_node *input = in[i]; const arch_register_req_t *req = arch_get_irn_register_req(input); if (req->width == 1) { be_node_set_register_req_in(irn, i, cls->class_req); arch_set_irn_register_req_out(irn, i, cls->class_req); } else { arch_register_req_t *const new_req = allocate_reg_req(irg); new_req->cls = cls; new_req->width = req->width; new_req->aligned = req->aligned; be_node_set_register_req_in(irn, i, new_req); arch_set_irn_register_req_out(irn, i, new_req); } } return irn; }
ir_node *be_new_d_Copy(dbg_info *const dbgi, ir_node *const block, ir_node *const op) { ir_graph *const irg = get_irn_irg(block); ir_node *const in[] = { op }; ir_node *const res = new_ir_node(dbgi, irg, block, op_be_Copy, get_irn_mode(op), ARRAY_SIZE(in), in); set_copy_info(res, irg, op, arch_irn_flags_none); return res; }
/** * Copies a node to a new irg. The Ins of the new node point to * the predecessors on the old irg. n->link points to the new node. * * @param n The node to be copied * @param irg the new irg * * Does NOT copy standard nodes like Start, End etc that are fixed * in an irg. Instead, the corresponding nodes of the new irg are returned. * Note further, that the new nodes have no block. */ static void copy_irn_to_irg(ir_node *n, ir_graph *irg) { /* do not copy standard nodes */ ir_node *nn = NULL; switch (get_irn_opcode(n)) { case iro_NoMem: nn = get_irg_no_mem(irg); break; case iro_Block: { ir_graph *old_irg = get_irn_irg(n); if (n == get_irg_start_block(old_irg)) nn = get_irg_start_block(irg); else if (n == get_irg_end_block(old_irg)) nn = get_irg_end_block(irg); break; } case iro_Start: nn = get_irg_start(irg); break; case iro_End: nn = get_irg_end(irg); break; case iro_Proj: { ir_graph *old_irg = get_irn_irg(n); if (n == get_irg_frame(old_irg)) nn = get_irg_frame(irg); else if (n == get_irg_initial_mem(old_irg)) nn = get_irg_initial_mem(irg); else if (n == get_irg_args(old_irg)) nn = get_irg_args(irg); break; } } if (nn) { set_irn_link(n, nn); return; } nn = new_ir_node(get_irn_dbg_info(n), irg, NULL, /* no block yet, will be set later */ get_irn_op(n), get_irn_mode(n), get_irn_arity(n), get_irn_in(n)); /* Copy the attributes. These might point to additional data. If this was allocated on the old obstack the pointers now are dangling. This frees e.g. the memory of the graph_arr allocated in new_immBlock. */ copy_node_attr(irg, n, nn); set_irn_link(n, nn); }
/** Creates a Phi node with 0 predecessors. */ static inline ir_node *new_rd_Phi0(dbg_info *dbgi, ir_node *block, ir_mode *mode, int pos) { ir_graph *irg = get_irn_irg(block); ir_node *res = new_ir_node(dbgi, irg, block, op_Phi, mode, 0, NULL); res->attr.phi.u.pos = pos; verify_new_node(res); return res; }
ir_node *be_new_Copy(ir_node *bl, ir_node *op) { ir_graph *irg = get_irn_irg(bl); ir_node *in[] = { op }; ir_node *res = new_ir_node(NULL, irg, bl, op_be_Copy, get_irn_mode(op), ARRAY_SIZE(in), in); set_copy_info(res, irg, op, arch_irn_flags_none); return res; }
ir_node *be_new_Phi0(ir_node *const block, ir_mode *const mode, arch_register_req_t const *const req) { ir_graph *const irg = get_irn_irg(block); ir_node *const phi = new_ir_node(NULL, irg, block, op_Phi, mode, 0, NULL); struct obstack *const obst = be_get_be_obst(irg); backend_info_t *const info = be_get_info(phi); info->out_infos = NEW_ARR_DZ(reg_out_info_t, obst, 1); info->out_infos[0].req = req; return phi; }
ir_node *be_new_AnyVal(ir_node *block, const arch_register_class_t *cls) { ir_graph *irg = get_irn_irg(block); ir_mode *mode = cls->mode; ir_node *res = new_ir_node(NULL, irg, block, op_be_AnyVal, mode, 0, NULL); init_node_attr(res, 1, arch_irn_flags_none); arch_set_irn_register_req_out(res, 0, cls->class_req); be_node_attr_t *attr = (be_node_attr_t*)get_irn_generic_attr(res); attr->exc.pin_state = op_pin_state_floats; return res; }
ir_node *be_new_Asm(dbg_info *const dbgi, ir_node *const block, int const n_ins, ir_node **const ins, arch_register_req_t const **const in_reqs, int const n_outs, ident *const text, void *const operands) { ir_graph *const irg = get_irn_irg(block); ir_node *const asmn = new_ir_node(dbgi, irg, block, op_be_Asm, mode_T, n_ins, ins); be_info_init_irn(asmn, arch_irn_flags_none, in_reqs, n_outs); be_asm_attr_t *const attr = (be_asm_attr_t*)get_irn_generic_attr(asmn); attr->text = text; attr->operands = operands; return asmn; }
ir_node *be_new_Relocation(dbg_info *const dbgi, ir_graph *const irg, unsigned const kind, ir_entity *const entity, ir_mode *const mode) { ir_node *const block = get_irg_start_block(irg); ir_node *const node = new_ir_node(dbgi, irg, block, op_be_Relocation, mode, 0, NULL); be_relocation_attr_t *const attr = (be_relocation_attr_t*)get_irn_generic_attr(node); attr->entity = entity; attr->kind = kind; ir_node *const optimized = optimize_node(node); return optimized; }
ir_node *be_new_MemPerm(ir_node *const block, int n, ir_node *const *const in) { ir_graph *const irg = get_irn_irg(block); ir_node *const irn = new_ir_node(NULL, irg, block, op_be_MemPerm, mode_T, n, in); init_node_attr(irn, n, arch_irn_flags_none); be_memperm_attr_t *attr = (be_memperm_attr_t*)get_irn_generic_attr(irn); attr->in_entities = OALLOCNZ(get_irg_obstack(irg), ir_entity*, n); attr->out_entities = OALLOCNZ(get_irg_obstack(irg), ir_entity*, n); attr->offset = 0; return irn; }
ir_node *be_new_Keep(ir_node *const block, int const n, ir_node *const *const in) { ir_graph *irg = get_irn_irg(block); ir_node *res = new_ir_node(NULL, irg, block, op_be_Keep, mode_ANY, n, in); init_node_attr(res, 1, arch_irn_flag_schedule_first); for (int i = 0; i < n; ++i) { arch_register_req_t const *const req = arch_get_irn_register_req(in[i]); be_node_set_register_req_in(res, i, req->cls->class_req); } keep_alive(res); return res; }
ir_node *be_new_Perm(ir_node *const block, int const n, ir_node *const *const in) { ir_graph *const irg = get_irn_irg(block); ir_node *const irn = new_ir_node(NULL, irg, block, op_be_Perm, mode_T, n, in); init_node_attr(irn, n, arch_irn_flags_none); for (int i = 0; i < n; ++i) { arch_register_req_t const *const in_req = arch_get_irn_register_req(in[i]); arch_register_req_t const *const slot_req = in_req->width == 1 ? in_req->cls->class_req : be_create_cls_req(irg, in_req->cls, in_req->width); be_node_set_register_req_in( irn, i, slot_req); arch_set_irn_register_req_out(irn, i, slot_req); } return irn; }
ir_node *be_new_CopyKeep(ir_node *const bl, ir_node *const src, int const n, ir_node *const *const in_keep) { ir_mode *mode = get_irn_mode(src); ir_graph *irg = get_irn_irg(bl); int arity = n+1; ir_node **in = ALLOCAN(ir_node*, arity); in[0] = src; MEMCPY(&in[1], in_keep, n); ir_node *irn = new_ir_node(NULL, irg, bl, op_be_CopyKeep, mode, arity, in); set_copy_info(irn, irg, src, arch_irn_flag_schedule_first); for (int i = 0; i < n; ++i) { ir_node *pred = in_keep[i]; arch_register_req_t const *const req = arch_get_irn_register_req(pred); be_node_set_register_req_in(irn, i + 1, req->cls->class_req); } return irn; }
ir_node *be_new_Keep(ir_node *const block, int const n, ir_node *const *const in) { ir_graph *irg = get_irn_irg(block); ir_node *res = new_ir_node(NULL, irg, block, op_be_Keep, mode_ANY, n, in); init_node_attr(res, 1, arch_irn_flag_schedule_first); be_node_attr_t *attr = (be_node_attr_t*) get_irn_generic_attr(res); attr->exc.pin_state = op_pin_state_pinned; for (int i = 0; i < n; ++i) { arch_register_req_t const *req = arch_get_irn_register_req(in[i]); req = req->cls != NULL ? req->cls->class_req : arch_no_register_req; be_node_set_register_req_in(res, i, req); } keep_alive(res); return res; }
ir_node *be_new_IncSP(ir_node *bl, ir_node *old_sp, int offset, bool no_align) { arch_register_class_t const *const cls = arch_get_irn_register_req(old_sp)->cls; ir_graph *irg = get_irn_irg(bl); ir_node *in[] = { old_sp }; ir_node *irn = new_ir_node(NULL, irg, bl, op_be_IncSP, cls->mode, ARRAY_SIZE(in), in); init_node_attr(irn, 1, arch_irn_flags_none); be_incsp_attr_t *a = (be_incsp_attr_t*)get_irn_generic_attr(irn); a->offset = offset; a->no_align = no_align; /* Set output constraint to stack register. */ be_node_set_register_req_in(irn, 0, cls->class_req); arch_copy_irn_out_info(irn, 0, old_sp); return irn; }
ir_node *be_new_Phi(ir_node *block, int n_ins, ir_node **ins, arch_register_req_t const *req) { ir_graph *irg = get_irn_irg(block); ir_node *phi = new_ir_node(NULL, irg, block, op_Phi, req->cls->mode, n_ins, ins); phi->attr.phi.u.backedge = new_backedge_arr(get_irg_obstack(irg), n_ins); struct obstack *obst = be_get_be_obst(irg); backend_info_t *info = be_get_info(phi); info->out_infos = NEW_ARR_DZ(reg_out_info_t, obst, 1); info->in_reqs = be_allocate_in_reqs(irg, n_ins); info->out_infos[0].req = req; for (int i = 0; i < n_ins; ++i) { info->in_reqs[i] = req; } verify_new_node(phi); return optimize_node(phi); }
ir_node *be_new_IncSP(const arch_register_t *sp, ir_node *bl, ir_node *old_sp, int offset, unsigned align) { ir_graph *irg = get_irn_irg(bl); ir_node *in[] = { old_sp }; ir_node *irn = new_ir_node(NULL, irg, bl, op_be_IncSP, sp->cls->mode, ARRAY_SIZE(in), in); init_node_attr(irn, 1, arch_irn_flags_none); be_incsp_attr_t *a = (be_incsp_attr_t*)get_irn_generic_attr(irn); a->offset = offset; a->align = align; a->base.exc.pinned = true; /* Set output constraint to stack register. */ be_node_set_register_req_in(irn, 0, sp->cls->class_req); arch_copy_irn_out_info(irn, 0, old_sp); return irn; }
/** * Transform helper for blocks. */ static ir_node *transform_block(ir_node *node) { ir_graph *irg = get_irn_irg(node); dbg_info *dbgi = get_irn_dbg_info(node); ir_mode *mode = get_irn_mode(node); ir_node *block = new_ir_node(dbgi, irg, NULL, get_irn_op(node), mode, get_irn_arity(node), get_irn_in(node) + 1); copy_node_attr(irg, node, block); block->node_nr = node->node_nr; /* transfer execfreq value */ double execfreq = get_block_execfreq(node); set_block_execfreq(block, execfreq); /* put the preds in the worklist */ be_enqueue_preds(node); return block; }
static ir_node *transform_end(ir_node *node) { /* end has to be duplicated manually because we need a dynamic in array */ ir_graph *irg = get_irn_irg(node); dbg_info *dbgi = get_irn_dbg_info(node); ir_node *block = be_transform_node(get_nodes_block(node)); ir_node *new_end = new_ir_node(dbgi, irg, block, op_End, mode_X, -1, NULL); copy_node_attr(irg, node, new_end); be_duplicate_deps(node, new_end); set_irg_end(irg, new_end); /* do not transform predecessors yet to keep the pre-transform * phase from visiting all the graph */ int arity = get_irn_arity(node); for (int i = 0; i < arity; ++i) { ir_node *in = get_irn_n(node, i); add_End_keepalive(new_end, in); } be_enqueue_preds(node); return new_end; }