Esempi in C++ (Cpp) per nouveau_grctx_vals_load

Esempio n. 1

File: nv40_graph.c Progetto: KaZoom/buildroot-linux-kernel-m3

int
nv40_graph_create_context(struct nouveau_channel *chan)
{
	struct drm_device *dev = chan->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
	int ret;

	ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size,
				     16, NVOBJ_FLAG_ZERO_ALLOC,
				     &chan->ramin_grctx);
	if (ret)
		return ret;

	/* Initialise default context values */
	dev_priv->engine.instmem.prepare_access(dev, true);
	if (!pgraph->ctxprog) {
		struct nouveau_grctx ctx = {};

		ctx.dev = chan->dev;
		ctx.mode = NOUVEAU_GRCTX_VALS;
		ctx.data = chan->ramin_grctx->gpuobj;
		nv40_grctx_init(&ctx);
	} else {
		nouveau_grctx_vals_load(dev, chan->ramin_grctx->gpuobj);
	}
	nv_wo32(dev, chan->ramin_grctx->gpuobj, 0,
		     chan->ramin_grctx->gpuobj->im_pramin->start);
	dev_priv->engine.instmem.finish_access(dev);
	return 0;
}

Esempio n. 2

File: nv50_graph.c Progetto: eddie-wang/linux-2

int
nv50_graph_create_context(struct nouveau_channel *chan)
{
	struct drm_device *dev = chan->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
	struct nouveau_gpuobj *ctx;
	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
	int hdr, ret;

	NV_DEBUG(dev, "ch%d\n", chan->id);

	ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size,
				     0x1000, NVOBJ_FLAG_ZERO_ALLOC |
				     NVOBJ_FLAG_ZERO_FREE, &chan->ramin_grctx);
	if (ret)
		return ret;
	ctx = chan->ramin_grctx->gpuobj;

	hdr = IS_G80 ? 0x200 : 0x20;
	dev_priv->engine.instmem.prepare_access(dev, true);
	nv_wo32(dev, ramin, (hdr + 0x00)/4, 0x00190002);
	nv_wo32(dev, ramin, (hdr + 0x04)/4, chan->ramin_grctx->instance +
					   pgraph->grctx_size - 1);
	nv_wo32(dev, ramin, (hdr + 0x08)/4, chan->ramin_grctx->instance);
	nv_wo32(dev, ramin, (hdr + 0x0c)/4, 0);
	nv_wo32(dev, ramin, (hdr + 0x10)/4, 0);
	nv_wo32(dev, ramin, (hdr + 0x14)/4, 0x00010000);
	dev_priv->engine.instmem.finish_access(dev);

	dev_priv->engine.instmem.prepare_access(dev, true);
	if (!pgraph->ctxprog) {
		struct nouveau_grctx ctx = {};
		ctx.dev = chan->dev;
		ctx.mode = NOUVEAU_GRCTX_VALS;
		ctx.data = chan->ramin_grctx->gpuobj;
		nv50_grctx_init(&ctx);
	} else {
		nouveau_grctx_vals_load(dev, ctx);
	}
	nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
	if ((dev_priv->chipset & 0xf0) == 0xa0)
		nv_wo32(dev, ctx, 0x00004/4, 0x00000000);
	else
		nv_wo32(dev, ctx, 0x0011c/4, 0x00000000);
	dev_priv->engine.instmem.finish_access(dev);

	return 0;
}