int
nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev)
{
struct pipe_screen *pscreen = &screen->base;
struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
struct nvc0_fifo nvc0_data = { };
uint64_t time;
int size, ret;
void *data;
union nouveau_bo_config mm_config;
char *nv_dbg = getenv("NOUVEAU_MESA_DEBUG");
if (nv_dbg)
nouveau_mesa_debug = atoi(nv_dbg);
/*
* this is initialized to 1 in nouveau_drm_screen_create after screen
* is fully constructed and added to the global screen list.
*/
screen->refcount = -1;
if (dev->chipset < 0xc0) {
data = &nv04_data;
size = sizeof(nv04_data);
} else {
data = &nvc0_data;
size = sizeof(nvc0_data);
}
ret = nouveau_object_new(&dev->object, 0, NOUVEAU_FIFO_CHANNEL_CLASS,
data, size, &screen->channel);
if (ret)
return ret;
screen->device = dev;
ret = nouveau_client_new(screen->device, &screen->client);
if (ret)
return ret;
ret = nouveau_pushbuf_new(screen->client, screen->channel,
4, 512 * 1024, 1,
&screen->pushbuf);
if (ret)
return ret;
/* getting CPU time first appears to be more accurate */
screen->cpu_gpu_time_delta = os_time_get();
ret = nouveau_getparam(dev, NOUVEAU_GETPARAM_PTIMER_TIME, &time);
if (!ret)
screen->cpu_gpu_time_delta = time - screen->cpu_gpu_time_delta * 1000;
pscreen->get_name = nouveau_screen_get_name;
pscreen->get_vendor = nouveau_screen_get_vendor;
pscreen->get_device_vendor = nouveau_screen_get_device_vendor;
pscreen->get_timestamp = nouveau_screen_get_timestamp;
pscreen->fence_reference = nouveau_screen_fence_ref;
pscreen->fence_signalled = nouveau_screen_fence_signalled;
pscreen->fence_finish = nouveau_screen_fence_finish;
util_format_s3tc_init();
screen->lowmem_bindings = PIPE_BIND_GLOBAL; /* gallium limit */
screen->vidmem_bindings =
PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL |
PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT |
PIPE_BIND_CURSOR |
PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_SHADER_RESOURCE | PIPE_BIND_COMPUTE_RESOURCE |
PIPE_BIND_GLOBAL;
screen->sysmem_bindings =
PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT |
PIPE_BIND_COMMAND_ARGS_BUFFER;
memset(&mm_config, 0, sizeof(mm_config));
screen->mm_GART = nouveau_mm_create(dev,
NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
&mm_config);
screen->mm_VRAM = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
return 0;
}
void
nouveau_screen_fini(struct nouveau_screen *screen)
{
nouveau_mm_destroy(screen->mm_GART);
nouveau_mm_destroy(screen->mm_VRAM);
nouveau_pushbuf_del(&screen->pushbuf);
nouveau_client_del(&screen->client);
nouveau_object_del(&screen->channel);
nouveau_device_del(&screen->device);
}
int
nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev)
{
struct pipe_screen *pscreen = &screen->base;
struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
struct nvc0_fifo nvc0_data = { };
uint64_t time;
int size, ret;
void *data;
union nouveau_bo_config mm_config;
char *nv_dbg = getenv("NOUVEAU_MESA_DEBUG");
if (nv_dbg)
nouveau_mesa_debug = atoi(nv_dbg);
screen->prefer_nir = debug_get_bool_option("NV50_PROG_USE_NIR", false);
/* These must be set before any failure is possible, as the cleanup
* paths assume they're responsible for deleting them.
*/
screen->drm = nouveau_drm(&dev->object);
screen->device = dev;
/*
* this is initialized to 1 in nouveau_drm_screen_create after screen
* is fully constructed and added to the global screen list.
*/
screen->refcount = -1;
if (dev->chipset < 0xc0) {
data = &nv04_data;
size = sizeof(nv04_data);
} else {
data = &nvc0_data;
size = sizeof(nvc0_data);
}
/*
* Set default VRAM domain if not overridden
*/
if (!screen->vram_domain) {
if (dev->vram_size > 0)
screen->vram_domain = NOUVEAU_BO_VRAM;
else
screen->vram_domain = NOUVEAU_BO_GART;
}
ret = nouveau_object_new(&dev->object, 0, NOUVEAU_FIFO_CHANNEL_CLASS,
data, size, &screen->channel);
if (ret)
return ret;
ret = nouveau_client_new(screen->device, &screen->client);
if (ret)
return ret;
ret = nouveau_pushbuf_new(screen->client, screen->channel,
4, 512 * 1024, 1,
&screen->pushbuf);
if (ret)
return ret;
/* getting CPU time first appears to be more accurate */
screen->cpu_gpu_time_delta = os_time_get();
ret = nouveau_getparam(dev, NOUVEAU_GETPARAM_PTIMER_TIME, &time);
if (!ret)
screen->cpu_gpu_time_delta = time - screen->cpu_gpu_time_delta * 1000;
pscreen->get_name = nouveau_screen_get_name;
pscreen->get_vendor = nouveau_screen_get_vendor;
pscreen->get_device_vendor = nouveau_screen_get_device_vendor;
pscreen->get_disk_shader_cache = nouveau_screen_get_disk_shader_cache;
pscreen->get_timestamp = nouveau_screen_get_timestamp;
pscreen->fence_reference = nouveau_screen_fence_ref;
pscreen->fence_finish = nouveau_screen_fence_finish;
nouveau_disk_cache_create(screen);
screen->transfer_pushbuf_threshold = 192;
screen->lowmem_bindings = PIPE_BIND_GLOBAL; /* gallium limit */
screen->vidmem_bindings =
PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL |
PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT |
PIPE_BIND_CURSOR |
PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_SHADER_BUFFER | PIPE_BIND_SHADER_IMAGE |
PIPE_BIND_COMPUTE_RESOURCE |
PIPE_BIND_GLOBAL;
screen->sysmem_bindings =
PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT |
PIPE_BIND_COMMAND_ARGS_BUFFER;
memset(&mm_config, 0, sizeof(mm_config));
screen->mm_GART = nouveau_mm_create(dev,
NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
&mm_config);
screen->mm_VRAM = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
return 0;
}
void
nouveau_screen_fini(struct nouveau_screen *screen)
{
int fd = screen->drm->fd;
nouveau_mm_destroy(screen->mm_GART);
nouveau_mm_destroy(screen->mm_VRAM);
nouveau_pushbuf_del(&screen->pushbuf);
nouveau_client_del(&screen->client);
nouveau_object_del(&screen->channel);
nouveau_device_del(&screen->device);
nouveau_drm_del(&screen->drm);
close(fd);
disk_cache_destroy(screen->disk_shader_cache);
}
