static bool lpc32xx_uart_probe_3(rtems_termios_device_context *context)
{
LPC32XX_UARTCLK_CTRL |= BSP_BIT32(0);
LPC32XX_U3CLK = LPC32XX_CONFIG_U3CLK;
LPC32XX_UART_CLKMODE = BSP_FLD32SET(LPC32XX_UART_CLKMODE, 0x2, 4, 5);
return ns16550_probe(context);
}
static bool lpc32xx_uart_probe_6(rtems_termios_device_context *context)
{
/* Bypass the IrDA modulator/demodulator */
LPC32XX_UART_CTRL |= BSP_BIT32(5);
LPC32XX_UARTCLK_CTRL |= BSP_BIT32(3);
LPC32XX_U6CLK = LPC32XX_CONFIG_U6CLK;
LPC32XX_UART_CLKMODE = BSP_FLD32SET(LPC32XX_UART_CLKMODE, 0x2, 10, 11);
return ns16550_probe(context);
}
bool lpc24xx_uart_probe_1(rtems_termios_device_context *context)
{
static const lpc24xx_pin_range pins [] = {
LPC24XX_PIN_UART_1_TXD_P0_15,
LPC24XX_PIN_UART_1_RXD_P0_16,
LPC24XX_PIN_TERMINAL
};
lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_PCLK_DEFAULT);
lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
return ns16550_probe(context);
}
static bool lpc32xx_uart_probe_4(rtems_termios_device_context *context)
{
volatile lpc32xx_gpio *gpio = &lpc32xx.gpio;
/*
* Set GPO_21/U4_TX/LCDVD[3] to U4_TX. This works only if LCD module is
* disabled.
*/
gpio->p2_mux_set = BSP_BIT32(2);
LPC32XX_UARTCLK_CTRL |= BSP_BIT32(1);
LPC32XX_U4CLK = LPC32XX_CONFIG_U4CLK;
LPC32XX_UART_CLKMODE = BSP_FLD32SET(LPC32XX_UART_CLKMODE, 0x2, 6, 7);
return ns16550_probe(context);
}
static bool altera_cyclone_v_uart_probe(
rtems_termios_device_context *base,
uint32_t uart_set_mask
)
{
ns16550_context *ctx = (ns16550_context *) base;
bool ret = true;
uint32_t ucr;
ALT_STATUS_CODE sc;
void* location = (void *) ctx->port;
/* The ALT_CLK_L4_SP is required for all SoCFPGA UARTs.
* Check that it's enabled. */
if ( alt_clk_is_enabled(ALT_CLK_L4_SP) != ALT_E_TRUE ) {
ret = false;
}
if ( ret ) {
sc = alt_clk_freq_get(ALT_CLK_L4_SP, &ctx->clock);
if ( sc != ALT_E_SUCCESS ) {
ret = false;
}
}
if ( ret ) {
// Bring UART out of reset.
alt_clrbits_word(ALT_RSTMGR_PERMODRST_ADDR, uart_set_mask);
// Verify the UCR (UART Component Version)
ucr = alt_read_word( ALT_UART_UCV_ADDR( location ) );
if ( ucr != ALT_UART_UCV_UART_COMPONENT_VER_RESET ) {
ret = false;
}
}
if ( ret ) {
// Write SRR::UR (Shadow Reset Register :: UART Reset)
alt_write_word( ALT_UART_SRR_ADDR( location ), ALT_UART_SRR_UR_SET_MSK );
// Read the MSR to work around case:119085.
(void)alt_read_word( ALT_UART_MSR_ADDR( location ) );
ret = ns16550_probe( base );
}
return ret;
}
