static void ohci_octeon_hw_start(void) { union cvmx_uctlx_ohci_ctl ohci_ctl; octeon2_usb_clocks_start(); ohci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_OHCI_CTL(0)); ohci_ctl.s.l2c_addr_msb = 0; ohci_ctl.s.l2c_buff_emod = 1; ohci_ctl.s.l2c_desc_emod = 1; cvmx_write_csr(CVMX_UCTLX_OHCI_CTL(0), ohci_ctl.u64); }
static void ehci_octeon_start(void) { union cvmx_uctlx_ehci_ctl ehci_ctl; octeon2_usb_clocks_start(); ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0)); /* Use 64-bit addressing. */ ehci_ctl.s.ehci_64b_addr_en = 1; ehci_ctl.s.l2c_addr_msb = 0; ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */ ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */ cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64); }
static void ehci_octeon_start(struct device *dev) { union cvmx_uctlx_ehci_ctl ehci_ctl; octeon2_usb_clocks_start(dev); ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0)); /* Use 64-bit addressing. */ ehci_ctl.s.ehci_64b_addr_en = 1; ehci_ctl.s.l2c_addr_msb = 0; #ifdef __BIG_ENDIAN ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */ ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */ #else ehci_ctl.s.l2c_buff_emod = 0; /* not swapped. */ ehci_ctl.s.l2c_desc_emod = 0; /* not swapped. */ ehci_ctl.s.inv_reg_a2 = 1; #endif cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64); }