Esempio n. 1
0
/*
 * Called from the processor-specific init to enable GPIO pin support.
 */
void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
{
	unsigned i;
	struct at91_gpio_chip *at91_gpio, *last = NULL;

	BUG_ON(nr_banks > MAX_GPIO_BANKS);

	if (of_have_populated_dt())
		return;

	for (i = 0; i < nr_banks; i++)
		at91_gpio_init_one(i, data[i].regbase, data[i].id);

	for (i = 0; i < gpio_banks; i++) {
		at91_gpio = &gpio_chip[i];

		/*
		 * GPIO controller are grouped on some SoC:
		 * PIOC, PIOD and PIOE can share the same IRQ line
		 */
		if (last && last->pioc_hwirq == at91_gpio->pioc_hwirq)
			last->next = at91_gpio;
		last = at91_gpio;

		gpiochip_add(&at91_gpio->chip);
	}
}
Esempio n. 2
0
static __init int add_rtc_cmos(void)
{
#ifdef CONFIG_PNP
	static const char * const  const ids[] __initconst =
	    { "PNP0b00", "PNP0b01", "PNP0b02", };
	struct pnp_dev *dev;
	struct pnp_id *id;
	int i;

	pnp_for_each_dev(dev) {
		for (id = dev->id; id; id = id->next) {
			for (i = 0; i < ARRAY_SIZE(ids); i++) {
				if (compare_pnp_id(id, ids[i]) != 0)
					return 0;
			}
		}
	}
#endif
	if (of_have_populated_dt())
		return 0;

	/* Intel MID platforms don't have ioport rtc */
	if (mrst_identify_cpu())
		return -ENODEV;

	platform_device_register(&rtc_device);
	dev_info(&rtc_device.dev,
		 "registered platform RTC device (no PNP device found)\n");

	return 0;
}
int __init pismo_panel_init(void)
{
	int err = 0;
	struct resource __maybe_unused *res;
	struct platform_device *phost1x = NULL;

	pismo_panel_select();

#ifdef CONFIG_TEGRA_NVMAP
	pismo_carveouts[1].base = tegra_carveout_start;
	pismo_carveouts[1].size = tegra_carveout_size;
	pismo_carveouts[2].base = tegra_vpr_start;
	pismo_carveouts[2].size = tegra_vpr_size;

	err = platform_device_register(&pismo_nvmap_device);
	if (err) {
		pr_err("nvmap device registration failed\n");
		return err;
	}
#endif

	phost1x = pismo_host1x_init();
	if (!phost1x) {
		pr_err("host1x devices registration failed\n");
		return -EINVAL;
	}

	res = platform_get_resource_byname(&pismo_disp1_device,
					 IORESOURCE_MEM, "fbmem");
	res->start = tegra_fb_start;
	res->end = tegra_fb_start + tegra_fb_size - 1;

	/* Copy the bootloader fb to the fb. */
	__tegra_move_framebuffer(&pismo_nvmap_device,
		tegra_fb_start, tegra_bootloader_fb_start,
			min(tegra_fb_size, tegra_bootloader_fb_size));

	pismo_disp1_device.dev.parent = &phost1x->dev;
	err = platform_device_register(&pismo_disp1_device);
	if (err) {
		pr_err("disp1 device registration failed\n");
		return err;
	}

	err = tegra_init_hdmi(&pismo_disp2_device, phost1x);
	if (err)
		return err;

#ifdef CONFIG_TEGRA_NVAVP
	if (!of_have_populated_dt()) {
		nvavp_device.dev.parent = &phost1x->dev;
		err = platform_device_register(&nvavp_device);
		if (err) {
			pr_err("nvavp device registration failed\n");
			return err;
		}
	}
#endif
	return err;
}
Esempio n. 4
0
File: pm.c Progetto: ivdok/linux
int __init omap2_common_pm_late_init(void)
{
	/*
	 * In the case of DT, the PMIC and SR initialization will be done using
	 * a completely different mechanism.
	 * Disable this part if a DT blob is available.
	 */
	if (of_have_populated_dt())
		return 0;

	/* Init the voltage layer */
	omap_pmic_late_init();
	omap_voltage_late_init();

	/* Initialize the voltages */
	omap3_init_voltages();
	omap4_init_voltages();

	/* Smartreflex device init */
	omap_devinit_smartreflex();

#ifdef CONFIG_SUSPEND
	suspend_set_ops(&omap_pm_ops);
#endif

	return 0;
}
Esempio n. 5
0
static int __init omap3_l3_init(void)
{
	struct omap_hwmod *oh;
	struct platform_device *pdev;
	char oh_name[L3_MODULES_MAX_LEN];

	/*
	 * To avoid code running on other OMAPs in
	 * multi-omap builds
	 */
	if (!(cpu_is_omap34xx()) || of_have_populated_dt())
		return -ENODEV;

	snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");

	oh = omap_hwmod_lookup(oh_name);

	if (!oh)
		pr_err("could not look up %s\n", oh_name);

	pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0);

	WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);

	return PTR_RET(pdev);
}
Esempio n. 6
0
int __init omap_clk_init(void)
{
	int ret = 0;

	if (!omap_clk_soc_init)
		return 0;

	ti_clk_init_features();

	omap2_clk_setup_ll_ops();

	if (of_have_populated_dt()) {
		ret = omap_control_init();
		if (ret)
			return ret;

		ret = omap_prcm_init();
		if (ret)
			return ret;

		of_clk_init(NULL);

		ti_dt_clk_init_retry_clks();

		ti_dt_clockdomains_setup();
	}

	ret = omap_clk_soc_init();

	return ret;
}
Esempio n. 7
0
static int __init omap4_l3_init(void)
{
	int l, i;
	struct omap_hwmod *oh[3];
	struct platform_device *pdev;
	char oh_name[L3_MODULES_MAX_LEN];

	/* If dtb is there, the devices will be created dynamically */
	if (of_have_populated_dt())
		return -ENODEV;

	/*
	 * To avoid code running on other OMAPs in
	 * multi-omap builds
	 */
	if (!(cpu_is_omap44xx()))
		return -ENODEV;

	for (i = 0; i < L3_MODULES; i++) {
		l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);

		oh[i] = omap_hwmod_lookup(oh_name);
		if (!(oh[i]))
			pr_err("could not look up %s\n", oh_name);
	}

	pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
						     0, NULL, 0, 0);

	WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);

	return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
}
Esempio n. 8
0
static int __init exynos4_dma_init(void)
{
	if (of_have_populated_dt())
		return 0;

	if (soc_is_exynos4210()) {
		exynos4_pdma0_pdata.nr_valid_peri =
			ARRAY_SIZE(exynos4210_pdma0_peri);
		exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri;
		exynos4_pdma1_pdata.nr_valid_peri =
			ARRAY_SIZE(exynos4210_pdma1_peri);
		exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
	} else if (soc_is_exynos4212() || soc_is_exynos4412()) {
		exynos4_pdma0_pdata.nr_valid_peri =
			ARRAY_SIZE(exynos4212_pdma0_peri);
		exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri;
		exynos4_pdma1_pdata.nr_valid_peri =
			ARRAY_SIZE(exynos4212_pdma1_peri);
		exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri;
	}

	dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
	dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
	amba_device_register(&exynos4_pdma0_device, &iomem_resource);

	dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
	dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
	amba_device_register(&exynos4_pdma1_device, &iomem_resource);

	dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask);
	amba_device_register(&exynos4_mdma1_device, &iomem_resource);

	return 0;
}
Esempio n. 9
0
/* Setup free-running counter for clocksource */
static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
{
	int ret;
	struct device_node *np = NULL;
	struct omap_hwmod *oh;
	void __iomem *vbase;
	const char *oh_name = "counter_32k";

	/*
	 * If device-tree is present, then search the DT blob
	 * to see if the 32kHz counter is supported.
	 */
	if (of_have_populated_dt()) {
		np = omap_get_timer_dt(omap_counter_match, NULL);
		if (!np)
			return -ENODEV;

		of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
		if (!oh_name)
			return -ENODEV;
	}

	/*
	 * First check hwmod data is available for sync32k counter
	 */
	oh = omap_hwmod_lookup(oh_name);
	if (!oh || oh->slaves_cnt == 0)
		return -ENODEV;

	omap_hwmod_setup_one(oh_name);

	if (np) {
		vbase = of_iomap(np, 0);
		of_node_put(np);
	} else {
		vbase = omap_hwmod_get_mpu_rt_va(oh);
	}

	if (!vbase) {
		pr_warn("%s: failed to get counter_32k resource\n", __func__);
		return -ENXIO;
	}

	ret = omap_hwmod_enable(oh);
	if (ret) {
		pr_warn("%s: failed to enable counter_32k module (%d)\n",
							__func__, ret);
		return ret;
	}

	ret = omap_init_clocksource_32k(vbase);
	if (ret) {
		pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
							__func__, ret);
		omap_hwmod_idle(oh);
	}

	return ret;
}
static int __init s3c6400_core_init(void)
{
	/* Not applicable when using DT. */
	if (of_have_populated_dt() || soc_is_s3c64xx())
		return 0;

	return subsys_system_register(&s3c6400_subsys, NULL);
}
Esempio n. 11
0
static int __init omap_iommu_init(void)
{
	/* If dtb is there, the devices will be created dynamically */
	if (of_have_populated_dt())
		return -ENODEV;

	return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
}
Esempio n. 12
0
static int __init omap2_common_pm_init(void)
{
	if (!of_have_populated_dt())
		omap2_init_processor_devices();
	omap_pm_if_init();

	return 0;
}
Esempio n. 13
0
static __init int s3c64xx_dev_init(void)
{
	/* Not applicable when using DT. */
	if (of_have_populated_dt())
		return 0;

	subsys_system_register(&s3c64xx_subsys, NULL);
	return device_register(&s3c64xx_dev);
}
Esempio n. 14
0
void __init exynos4_init_irq(void)
{
	unsigned int gic_bank_offset;

	gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;

	if (!of_have_populated_dt())
		gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
#ifdef CONFIG_OF
	else
		of_irq_init(exynos_dt_irq_match);
#endif

	if (!of_have_populated_dt()) {
		combiner_init(S5P_VA_COMBINER_BASE, NULL);
		exynos_init_irq_eint(NULL, NULL);
	}
}
Esempio n. 15
0
static int __init omap_device_late_init(void)
{
    bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);

    WARN(!of_have_populated_dt(),
         "legacy booting deprecated, please update to boot with .dts\n");

    return 0;
}
Esempio n. 16
0
static int __init plat_of_setup(void)
{
	if (!of_have_populated_dt())
		panic("device tree not present");

	if (of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL))
		panic("failed to populate DT\n");

	return 0;
}
Esempio n. 17
0
File: devices.c Progetto: 3CTO/linux
int omap3_init_camera(struct isp_platform_data *pdata)
{
	if (of_have_populated_dt())
		omap3_isp_iommu.name = "480bd400.mmu";

	omap3isp_device.dev.platform_data = pdata;
	omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;

	return platform_device_register(&omap3isp_device);
}
/*
 * These devices are always present and don't need any board-specific
 * setup.
 */
static int __init at91_add_standard_devices(void)
{
	if (of_have_populated_dt())
		return 0;

	at91_add_device_rtt();
	at91_add_device_watchdog();
	at91_add_device_tc();
	return 0;
}
Esempio n. 19
0
void __init kona_init_irq(void)
{
    /* start with GLBTIMER */
    if (!of_have_populated_dt())
        gic_init(0, BCM_INT_ID_PPI11, IOMEM(KONA_GICDIST_VA),
                 IOMEM(KONA_GICCPU_VA));
#ifdef CONFIG_OF
    of_irq_init(kona_dt_irq_match);
#endif
}
Esempio n. 20
0
static __init int s3c64xx_syscore_init(void)
{
	/* Appropriate drivers (pinctrl, uart) handle this when using DT. */
	if (of_have_populated_dt())
		return 0;

	register_syscore_ops(&s3c64xx_irq_syscore_ops);

	return 0;
}
Esempio n. 21
0
static void __exit evm_exit(void)
{
#if defined(CONFIG_OF)
	if (of_have_populated_dt()) {
		platform_driver_unregister(&davinci_evm_driver);
		return;
	}
#endif

	platform_device_unregister(evm_snd_device);
}
Esempio n. 22
0
void __init init_cpu_topology(void)
{
	reset_cpu_topology();

	/*
	 * Discard anything that was parsed if we hit an error so we
	 * don't use partial information.
	 */
	if (of_have_populated_dt() && parse_dt_topology())
		reset_cpu_topology();
}
static int __init plat_of_setup(void)
{
	if (!of_have_populated_dt())
		panic("Device tree not present");

	pic32_of_prepare_platform_data(pic32_auxdata_lookup);
	if (of_platform_default_populate(NULL, pic32_auxdata_lookup, NULL))
		panic("Failed to populate DT");

	return 0;
}
Esempio n. 24
0
void __init ux500_timer_init(void)
{
	void __iomem *mtu_timer_base;
	void __iomem *prcmu_timer_base;
	void __iomem *tmp_base;
	struct device_node *np;

	if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
		mtu_timer_base = __io_address(U8500_MTU0_BASE);
		prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
	} else {
		ux500_unknown_soc();
	}

	/* TODO: Once MTU has been DT:ed place code above into else. */
	if (of_have_populated_dt()) {
#ifdef CONFIG_OF
		np = of_find_matching_node(NULL, prcmu_timer_of_match);
		if (!np)
#endif
			goto dt_fail;

		tmp_base = of_iomap(np, 0);
		if (!tmp_base)
			goto dt_fail;

		prcmu_timer_base = tmp_base;
	}

dt_fail:
	/* Doing it the old fashioned way. */

	/*
	 * Here we register the timerblocks active in the system.
	 * Localtimers (twd) is started when both cpu is up and running.
	 * MTU register a clocksource, clockevent and sched_clock.
	 * Since the MTU is located in the VAPE power domain
	 * it will be cleared in sleep which makes it unsuitable.
	 * We however need it as a timer tick (clockevent)
	 * during boot to calibrate delay until twd is started.
	 * RTC-RTT have problems as timer tick during boot since it is
	 * depending on delay which is not yet calibrated. RTC-RTT is in the
	 * always-on powerdomain and is used as clockevent instead of twd when
	 * sleeping.
	 * The PRCMU timer 4 register a clocksource and
	 * sched_clock with higher rating then MTU since is always-on.
	 *
	 */

	nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
	clksrc_dbx500_prcmu_init(prcmu_timer_base);
	ux500_twd_init();
}
static void sprd_init_time(void)
{
	if(of_have_populated_dt()){
		sc8830_pmu_init();
		of_clk_init(NULL);
		clocksource_of_init();
	}else{
		sci_clock_init();
		sci_enable_timer_early();
		sci_timer_init();
	}
}
Esempio n. 26
0
static int __init s3c64xx_pl080_init(void)
{
	/* Set all DMA configuration to be DMA, not SDMA */
	writel(0xffffff, S3C64XX_SDMA_SEL);

	if (of_have_populated_dt())
		return 0;

	amba_device_register(&s3c64xx_dma0_device, &iomem_resource);
	amba_device_register(&s3c64xx_dma1_device, &iomem_resource);

	return 0;
}
Esempio n. 27
0
File: io.c Progetto: 01org/prd
void __init omap3_init_early(void)
{
	omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
			       OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
	/* XXX: remove these once OMAP3 is DT only */
	if (!of_have_populated_dt()) {
		omap2_set_globals_control(
			OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE));
		omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
		omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
				     NULL);
	}
	omap2_control_base_init();
	omap3xxx_check_revision();
	omap3xxx_check_features();
	omap2_prcm_base_init();
	/* XXX: remove these once OMAP3 is DT only */
	if (!of_have_populated_dt()) {
		omap3xxx_prm_init(NULL);
		omap3xxx_cm_init(NULL);
	}
	omap3xxx_voltagedomains_init();
	omap3xxx_powerdomains_init();
	omap3xxx_clockdomains_init();
	omap3xxx_hwmod_init();
	omap_hwmod_init_postsetup();
	if (!of_have_populated_dt()) {
		omap3_control_legacy_iomap_init();
		if (soc_is_am35xx())
			omap_clk_soc_init = am35xx_clk_legacy_init;
		else if (cpu_is_omap3630())
			omap_clk_soc_init = omap36xx_clk_legacy_init;
		else if (omap_rev() == OMAP3430_REV_ES1_0)
			omap_clk_soc_init = omap3430es1_clk_legacy_init;
		else
			omap_clk_soc_init = omap3430_clk_legacy_init;
	}
}
struct platform_device * __init roth_host1x_init(void)
{
    struct platform_device *pdev = NULL;

#ifdef CONFIG_TEGRA_GRHOST
    if (!of_have_populated_dt())
        pdev = tegra11_register_host1x_devices();
    else
        pdev = to_platform_device(bus_find_device_by_name(
                                      &platform_bus_type, NULL, "host1x"));
#endif
    return pdev;
}
Esempio n. 29
0
File: prom.c Progetto: 7L/pi_plus
int __init plat_of_setup(void)
{
	static struct of_device_id of_ids[3];

	if (!of_have_populated_dt())
		panic("device tree not present");

	strncpy(of_ids[0].compatible, soc_info.compatible,
		sizeof(of_ids[0].compatible));
	strncpy(of_ids[1].compatible, "simple-bus",
		sizeof(of_ids[1].compatible));
	return of_platform_bus_probe(NULL, of_ids, NULL);
}
int hdmi_get_sysreg_addr(struct hdmi_device *hdev)
{
    struct device_node *hdmiphy_sys;

    hdmiphy_sys = of_get_child_by_name(hdev->dev->of_node, "hdmiphy-sys");
    if (!hdmiphy_sys) {
        dev_err(hdev->dev, "No sys-controller interface for hdmiphy\n");
        return -ENODEV;
    }
    hdev->pmu_regs = of_iomap(hdmiphy_sys, 0);
    if (hdev->pmu_regs == NULL) {
        dev_err(hdev->dev, "Can't get hdmiphy pmu control register\n");
        return -ENOMEM;
    }

    if (of_have_populated_dt()) {
        struct device_node *nd;

        nd = of_find_compatible_node(NULL, NULL,
                                     "samsung,exynos5-sysreg_localout");
        if (!nd) {
            dev_err(hdev->dev, "failed find compatible node");
            return -ENODEV;
        }

        hdev->sys_regs = of_iomap(nd, 0);
        if (!hdev->sys_regs) {
            dev_err(hdev->dev, "Failed to get address.");
            return -ENOMEM;
        }
        if (hdev->ip_ver == IP_VER_TV_5HP) {
            nd = of_find_compatible_node(NULL, NULL,
                                         "samsung,exynos5-otp_ctrl");
            if (!nd) {
                dev_err(hdev->dev, "failed find otp compatible node");
                return -ENODEV;
            }

            hdev->otp_regs = of_iomap(nd, 0);
            if (!hdev->otp_regs) {
                dev_err(hdev->dev, "Failed to get otp address");
                return -ENOMEM;
            }
        }
    } else {
        dev_err(hdev->dev, "failed have populated device tree");
        return -EIO;
    }

    return 0;
}