static struct ofw_gpiobus_devinfo *
ofw_gpiobus_setup_devinfo(device_t bus, device_t child, phandle_t node)
{
int i, npins;
struct gpiobus_ivar *devi;
struct gpiobus_pin *pins;
struct gpiobus_softc *sc;
struct ofw_gpiobus_devinfo *dinfo;
sc = device_get_softc(bus);
dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (dinfo == NULL)
return (NULL);
if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, node) != 0) {
free(dinfo, M_DEVBUF);
return (NULL);
}
/* Parse the gpios property for the child. */
npins = ofw_gpiobus_parse_gpios_impl(child, node, "gpios", sc, &pins);
if (npins <= 0) {
ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
free(dinfo, M_DEVBUF);
return (NULL);
}
/* Initialize the irq resource list. */
resource_list_init(&dinfo->opd_dinfo.rl);
/* Allocate the child ivars and copy the parsed pin data. */
devi = &dinfo->opd_dinfo;
devi->npins = (uint32_t)npins;
if (gpiobus_alloc_ivars(devi) != 0) {
free(pins, M_DEVBUF);
ofw_gpiobus_destroy_devinfo(bus, dinfo);
return (NULL);
}
for (i = 0; i < devi->npins; i++) {
devi->flags[i] = pins[i].flags;
devi->pins[i] = pins[i].pin;
}
free(pins, M_DEVBUF);
#ifndef INTRNG
/* Parse the interrupt resources. */
if (ofw_bus_intr_to_rl(bus, node, &dinfo->opd_dinfo.rl, NULL) != 0) {
ofw_gpiobus_destroy_devinfo(bus, dinfo);
return (NULL);
}
#endif
device_set_ivars(child, dinfo);
return (dinfo);
}
static int
mdionexus_ofw_bus_attach(device_t dev)
{
struct simplebus_softc *sc;
struct mdionexus_ofw_devinfo *di;
device_t child;
phandle_t parent, node;
parent = ofw_bus_get_node(dev);
simplebus_init(dev, parent);
sc = (struct simplebus_softc *)device_get_softc(dev);
if (mdionexus_ofw_fill_ranges(parent, sc) < 0) {
device_printf(dev, "could not get ranges\n");
return (ENXIO);
}
/* Iterate through all bus subordinates */
for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
/* Allocate and populate devinfo. */
di = malloc(sizeof(*di), M_THUNDER_MDIO, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {
free(di, M_THUNDER_MDIO);
continue;
}
/* Initialize and populate resource list. */
resource_list_init(&di->di_rl);
ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells,
&di->di_rl);
#ifndef INTRNG
ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL);
#endif
/* Add newbus device for this FDT node */
child = device_add_child(dev, NULL, -1);
if (child == NULL) {
resource_list_free(&di->di_rl);
ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
free(di, M_THUNDER_MDIO);
continue;
}
device_set_ivars(child, di);
}
return (0);
}
struct simplebus_devinfo *
simplebus_setup_dinfo(device_t dev, phandle_t node,
struct simplebus_devinfo *di)
{
struct simplebus_softc *sc;
struct simplebus_devinfo *ndi;
sc = device_get_softc(dev);
if (di == NULL)
ndi = malloc(sizeof(*ndi), M_DEVBUF, M_WAITOK | M_ZERO);
else
ndi = di;
if (ofw_bus_gen_setup_devinfo(&ndi->obdinfo, node) != 0) {
if (di == NULL)
free(ndi, M_DEVBUF);
return (NULL);
}
resource_list_init(&ndi->rl);
ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells, &ndi->rl);
ofw_bus_intr_to_rl(dev, node, &ndi->rl, NULL);
return (ndi);
}
static void
ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno)
{
device_t pcib;
struct ofw_pci_register pcir;
struct ofw_pcibus_devinfo *dinfo;
phandle_t node, child;
u_int func, slot;
int intline;
pcib = device_get_parent(dev);
node = ofw_bus_get_node(dev);
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1)
continue;
slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
/* Some OFW device trees contain dupes. */
if (pci_find_dbsf(domain, busno, slot, func) != NULL)
continue;
/*
* The preset in the intline register is usually bogus. Reset
* it such that the PCI code will reroute the interrupt if
* needed.
*/
intline = PCI_INVALID_IRQ;
if (OF_getproplen(child, "interrupts") > 0)
intline = 0;
PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
intline, 1);
/*
* Now set up the PCI and OFW bus layer devinfo and add it
* to the PCI bus.
*/
dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib,
domain, busno, slot, func, sizeof(*dinfo));
if (dinfo == NULL)
continue;
if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
0) {
pci_freecfg((struct pci_devinfo *)dinfo);
continue;
}
dinfo->opd_dma_tag = NULL;
pci_add_child(dev, (struct pci_devinfo *)dinfo);
/*
* Some devices don't have an intpin set, but do have
* interrupts. These are fully specified, and set in the
* interrupts property, so add that value to the device's
* resource list.
*/
if (dinfo->opd_dinfo.cfg.intpin == 0)
ofw_bus_intr_to_rl(dev, child,
&dinfo->opd_dinfo.resources, NULL);
}
}
static int
ofw_iicbus_attach(device_t dev)
{
struct iicbus_softc *sc = IICBUS_SOFTC(dev);
struct ofw_iicbus_devinfo *dinfo;
phandle_t child, node, root;
pcell_t freq, paddr;
device_t childdev;
ssize_t compatlen;
char compat[255];
char *curstr;
u_int iic_addr_8bit = 0;
sc->dev = dev;
mtx_init(&sc->lock, "iicbus", NULL, MTX_DEF);
/*
* If there is a clock-frequency property for the device node, use it as
* the starting value for the bus frequency. Then call the common
* routine that handles the tunable/sysctl which allows the FDT value to
* be overridden by the user.
*/
node = ofw_bus_get_node(dev);
freq = 0;
OF_getencprop(node, "clock-frequency", &freq, sizeof(freq));
iicbus_init_frequency(dev, freq);
iicbus_reset(dev, IIC_FASTEST, 0, NULL);
bus_generic_probe(dev);
bus_enumerate_hinted_children(dev);
/*
* Check if we're running on a PowerMac, needed for the I2C
* address below.
*/
root = OF_peer(0);
compatlen = OF_getprop(root, "compatible", compat,
sizeof(compat));
if (compatlen != -1) {
for (curstr = compat; curstr < compat + compatlen;
curstr += strlen(curstr) + 1) {
if (strncmp(curstr, "MacRISC", 7) == 0)
iic_addr_8bit = 1;
}
}
/*
* Attach those children represented in the device tree.
*/
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
/*
* Try to get the I2C address first from the i2c-address
* property, then try the reg property. It moves around
* on different systems.
*/
if (OF_getencprop(child, "i2c-address", &paddr,
sizeof(paddr)) == -1)
if (OF_getencprop(child, "reg", &paddr,
sizeof(paddr)) == -1)
continue;
/*
* Now set up the I2C and OFW bus layer devinfo and add it
* to the bus.
*/
dinfo = malloc(sizeof(struct ofw_iicbus_devinfo), M_DEVBUF,
M_NOWAIT | M_ZERO);
if (dinfo == NULL)
continue;
/*
* FreeBSD drivers expect I2C addresses to be expressed as
* 8-bit values. Apple OFW data contains 8-bit values, but
* Linux FDT data contains 7-bit values, so shift them up to
* 8-bit format.
*/
if (iic_addr_8bit)
dinfo->opd_dinfo.addr = paddr;
else
dinfo->opd_dinfo.addr = paddr << 1;
if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
0) {
free(dinfo, M_DEVBUF);
continue;
}
childdev = device_add_child(dev, NULL, -1);
resource_list_init(&dinfo->opd_dinfo.rl);
ofw_bus_intr_to_rl(childdev, child,
&dinfo->opd_dinfo.rl, NULL);
device_set_ivars(childdev, dinfo);
}
/* Register bus */
OF_device_register_xref(OF_xref_from_node(node), dev);
return (bus_generic_attach(dev));
}
static int
qman_portals_fdt_attach(device_t dev)
{
struct dpaa_portals_softc *sc;
phandle_t node, child, cpu_node;
vm_paddr_t portal_pa, portal_par_pa;
vm_size_t portal_size;
uint32_t addr, paddr, size;
ihandle_t cpu;
int cpu_num, cpus, intr_rid;
struct dpaa_portals_devinfo di;
struct ofw_bus_devinfo ofw_di = {};
cell_t *range;
int nrange;
int i;
cpus = 0;
sc = device_get_softc(dev);
sc->sc_dev = dev;
node = ofw_bus_get_node(dev);
/* Get this node's range */
get_addr_props(ofw_bus_get_node(device_get_parent(dev)), &paddr, &size);
get_addr_props(node, &addr, &size);
nrange = OF_getencprop_alloc(node, "ranges",
sizeof(*range), (void **)&range);
if (nrange < addr + paddr + size)
return (ENXIO);
portal_pa = portal_par_pa = 0;
portal_size = 0;
for (i = 0; i < addr; i++) {
portal_pa <<= 32;
portal_pa |= range[i];
}
for (; i < paddr + addr; i++) {
portal_par_pa <<= 32;
portal_par_pa |= range[i];
}
portal_pa += portal_par_pa;
for (; i < size + paddr + addr; i++) {
portal_size = (uintmax_t)portal_size << 32;
portal_size |= range[i];
}
OF_prop_free(range);
sc->sc_dp_size = portal_size;
sc->sc_dp_pa = portal_pa;
/* Find portals tied to CPUs */
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
if (cpus >= mp_ncpus)
break;
if (!ofw_bus_node_is_compatible(child, "fsl,qman-portal")) {
continue;
}
/* Checkout related cpu */
if (OF_getprop(child, "cpu-handle", (void *)&cpu,
sizeof(cpu)) <= 0) {
cpu = qman_portal_find_cpu(cpus);
if (cpu <= 0)
continue;
}
/* Acquire cpu number */
cpu_node = OF_instance_to_package(cpu);
if (OF_getencprop(cpu_node, "reg", &cpu_num, sizeof(cpu_num)) <= 0) {
device_printf(dev, "Could not retrieve CPU number.\n");
return (ENXIO);
}
cpus++;
if (ofw_bus_gen_setup_devinfo(&ofw_di, child) != 0) {
device_printf(dev, "could not set up devinfo\n");
continue;
}
resource_list_init(&di.di_res);
if (ofw_bus_reg_to_rl(dev, child, addr, size, &di.di_res)) {
device_printf(dev, "%s: could not process 'reg' "
"property\n", ofw_di.obd_name);
ofw_bus_gen_destroy_devinfo(&ofw_di);
continue;
}
if (ofw_bus_intr_to_rl(dev, child, &di.di_res, &intr_rid)) {
device_printf(dev, "%s: could not process "
"'interrupts' property\n", ofw_di.obd_name);
resource_list_free(&di.di_res);
ofw_bus_gen_destroy_devinfo(&ofw_di);
continue;
}
di.di_intr_rid = intr_rid;
if (dpaa_portal_alloc_res(dev, &di, cpu_num))
goto err;
}
ofw_bus_gen_destroy_devinfo(&ofw_di);
return (qman_portals_attach(dev));
err:
resource_list_free(&di.di_res);
ofw_bus_gen_destroy_devinfo(&ofw_di);
qman_portals_detach(dev);
return (ENXIO);
}
static int
qman_portals_fdt_attach(device_t dev)
{
struct dpaa_portals_softc *sc;
struct resource_list_entry *rle;
phandle_t node, child, cpu_node;
vm_paddr_t portal_pa;
vm_size_t portal_size;
uint32_t addr, size;
ihandle_t cpu;
int cpu_num, cpus, intr_rid;
struct dpaa_portals_devinfo di;
struct ofw_bus_devinfo ofw_di = {};
cpus = 0;
sc = device_get_softc(dev);
sc->sc_dev = dev;
node = ofw_bus_get_node(dev);
get_addr_props(node, &addr, &size);
/* Find portals tied to CPUs */
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
if (!fdt_is_compatible(child, "fsl,qman-portal")) {
continue;
}
/* Checkout related cpu */
if (OF_getprop(child, "cpu-handle", (void *)&cpu,
sizeof(cpu)) <= 0) {
continue;
}
/* Acquire cpu number */
cpu_node = OF_instance_to_package(cpu);
if (OF_getencprop(cpu_node, "reg", &cpu_num, sizeof(cpu_num)) <= 0) {
device_printf(dev, "Could not retrieve CPU number.\n");
return (ENXIO);
}
cpus++;
if (cpus > MAXCPU)
break;
if (ofw_bus_gen_setup_devinfo(&ofw_di, child) != 0) {
device_printf(dev, "could not set up devinfo\n");
continue;
}
resource_list_init(&di.di_res);
if (ofw_bus_reg_to_rl(dev, child, addr, size, &di.di_res)) {
device_printf(dev, "%s: could not process 'reg' "
"property\n", ofw_di.obd_name);
ofw_bus_gen_destroy_devinfo(&ofw_di);
continue;
}
if (ofw_bus_intr_to_rl(dev, child, &di.di_res, &intr_rid)) {
device_printf(dev, "%s: could not process "
"'interrupts' property\n", ofw_di.obd_name);
resource_list_free(&di.di_res);
ofw_bus_gen_destroy_devinfo(&ofw_di);
continue;
}
di.di_intr_rid = intr_rid;
ofw_reg_to_paddr(child, 0, &portal_pa, &portal_size, NULL);
rle = resource_list_find(&di.di_res, SYS_RES_MEMORY, 0);
if (sc->sc_dp_pa == 0)
sc->sc_dp_pa = portal_pa - rle->start;
portal_size = rle->end + 1;
rle = resource_list_find(&di.di_res, SYS_RES_MEMORY, 1);
portal_size = ulmax(rle->end + 1, portal_size);
sc->sc_dp_size = ulmax(sc->sc_dp_size, portal_size);
if (dpaa_portal_alloc_res(dev, &di, cpu_num))
goto err;
}
ofw_bus_gen_destroy_devinfo(&ofw_di);
return (qman_portals_attach(dev));
err:
resource_list_free(&di.di_res);
ofw_bus_gen_destroy_devinfo(&ofw_di);
qman_portals_detach(dev);
return (ENXIO);
}
static int
ofw_iicbus_attach(device_t dev)
{
struct iicbus_softc *sc = IICBUS_SOFTC(dev);
struct ofw_iicbus_devinfo *dinfo;
phandle_t child, node;
pcell_t freq, paddr;
device_t childdev;
sc->dev = dev;
mtx_init(&sc->lock, "iicbus", NULL, MTX_DEF);
/*
* If there is a clock-frequency property for the device node, use it as
* the starting value for the bus frequency. Then call the common
* routine that handles the tunable/sysctl which allows the FDT value to
* be overridden by the user.
*/
node = ofw_bus_get_node(dev);
freq = 0;
OF_getencprop(node, "clock-frequency", &freq, sizeof(freq));
iicbus_init_frequency(dev, freq);
iicbus_reset(dev, IIC_FASTEST, 0, NULL);
bus_generic_probe(dev);
bus_enumerate_hinted_children(dev);
/*
* Attach those children represented in the device tree.
*/
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
/*
* Try to get the I2C address first from the i2c-address
* property, then try the reg property. It moves around
* on different systems.
*/
if (OF_getencprop(child, "i2c-address", &paddr,
sizeof(paddr)) == -1)
if (OF_getencprop(child, "reg", &paddr,
sizeof(paddr)) == -1)
continue;
/*
* Now set up the I2C and OFW bus layer devinfo and add it
* to the bus.
*/
dinfo = malloc(sizeof(struct ofw_iicbus_devinfo), M_DEVBUF,
M_NOWAIT | M_ZERO);
if (dinfo == NULL)
continue;
/*
* FreeBSD drivers expect I2C addresses to be expressed as
* 8-bit values. Apple OFW data contains 8-bit values, but
* Linux FDT data contains 7-bit values, so shift them up to
* 8-bit format.
*/
#ifdef AIM
dinfo->opd_dinfo.addr = paddr;
#else
dinfo->opd_dinfo.addr = paddr << 1;
#endif
if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) !=
0) {
free(dinfo, M_DEVBUF);
continue;
}
childdev = device_add_child(dev, NULL, -1);
resource_list_init(&dinfo->opd_dinfo.rl);
ofw_bus_intr_to_rl(childdev, child,
&dinfo->opd_dinfo.rl, NULL);
device_set_ivars(childdev, dinfo);
}
return (bus_generic_attach(dev));
}
