/** * omap_init_opp_table() - Initialize opp table as per the CPU type * @opp_def: opp default list for this silicon * @opp_def_size: number of opp entries for this silicon * * Register the initial OPP table with the OPP library based on the CPU * type. This is meant to be used only by SoC specific registration. */ int __init omap_init_opp_table(struct omap_opp_def *opp_def, u32 opp_def_size) { int i, r; struct clk *clk; long round_rate; if (!opp_def || !opp_def_size) { pr_err("%s: invalid params!\n", __func__); return -EINVAL; } /* * Initialize only if not already initialized even if the previous * call failed, because, no reason we'd succeed again. */ if (omap_table_init) return -EEXIST; omap_table_init = 1; /* Lets now register with OPP library */ for (i = 0; i < opp_def_size; i++, opp_def++) { struct omap_hwmod *oh; struct device *dev; if (!opp_def->hwmod_name) { WARN(1, "%s: NULL name of omap_hwmod, failing" " [%d].\n", __func__, i); return -EINVAL; } oh = omap_hwmod_lookup(opp_def->hwmod_name); if (!oh || !oh->od) { WARN(1, "%s: no hwmod or odev for %s, [%d] " "cannot add OPPs.\n", __func__, opp_def->hwmod_name, i); return -EINVAL; } dev = &oh->od->pdev.dev; clk = omap_clk_get_by_name(opp_def->clk_name); if (clk) { round_rate = clk_round_rate(clk, opp_def->freq); if (round_rate > 0) { opp_def->freq = round_rate; } else { WARN(1, "%s: round_rate for clock %s failed\n", __func__, opp_def->clk_name); return -EINVAL; /* skip Bad OPP */ } } else { WARN(1, "%s: No clock by name %s found\n", __func__, opp_def->clk_name); return -EINVAL; /* skip Bad OPP */ } r = opp_add(dev, opp_def->freq, opp_def->u_volt); if (r) { dev_err(dev, "%s: add OPP %ld failed for %s [%d] " "result=%d\n", __func__, opp_def->freq, opp_def->hwmod_name, i, r); } else { if (!opp_def->default_available) r = opp_disable(dev, opp_def->freq); if (r) dev_err(dev, "%s: disable %ld failed for %s " "[%d] result=%d\n", __func__, opp_def->freq, opp_def->hwmod_name, i, r); r = omap_dvfs_register_device(dev, opp_def->voltdm_name, opp_def->clk_name); if (r) dev_err(dev, "%s:%s:err dvfs register %d %d\n", __func__, opp_def->hwmod_name, r, i); } } return 0; }
/** * omap_opp_register() - Initialize opp table as per the CPU type * @dev: device registering for OPP * @hwmod_name: hemod name of registering device * * Register the given device with the OPP/DVFS framework. Intended to * be called when omap_device is built. */ int omap_opp_register(struct device *dev, const char *hwmod_name) { int i, r; struct clk *clk; long round_rate; struct omap_opp_def *opp_def = opp_table; u32 opp_def_size = opp_table_size; if (!opp_def || !opp_def_size) { pr_err("%s: invalid params!\n", __func__); return -EINVAL; } if (IS_ERR(dev)) { pr_err("%s: Unable to get dev pointer\n", __func__); return -EINVAL; } /* Lets now register with OPP library */ for (i = 0; i < opp_def_size; i++, opp_def++) { if (!opp_def->default_available) continue; if (!opp_def->dev_info->hwmod_name) { WARN_ONCE(1, "%s: NULL name of omap_hwmod, failing [%d].\n", __func__, i); return -EINVAL; } if (!strcmp(hwmod_name, opp_def->dev_info->hwmod_name)) { clk = omap_clk_get_by_name(opp_def->dev_info->clk_name); if (clk) { round_rate = clk_round_rate(clk, opp_def->freq); if (round_rate > 0) { opp_def->freq = round_rate; } else { pr_warn("%s: round_rate for clock %s failed\n", __func__, opp_def->dev_info->clk_name); continue; /* skip Bad OPP */ } } else { pr_warn("%s: No clock by name %s found\n", __func__, opp_def->dev_info->clk_name); continue; /* skip Bad OPP */ } r = opp_add(dev, opp_def->freq, opp_def->u_volt); if (r) { dev_err(dev, "%s: add OPP %ld failed for %s [%d] result=%d\n", __func__, opp_def->freq, opp_def->dev_info->hwmod_name, i, r); continue; } r = omap_dvfs_register_device(dev, opp_def->dev_info->voltdm_name, opp_def->dev_info->clk_name); if (r) dev_err(dev, "%s:%s:err dvfs register %d %d\n", __func__, opp_def->dev_info->hwmod_name, r, i); } } return 0; }