Esempio n. 1
0
void melps4_cpu_device::execute_one()
{
	// B is at $18x and BM is at $10x for all MCU types
	if (m_op >= 0x180)
		op_b();
	else if (m_op >= 0x100)
		op_bm();
	else
		op_illegal();
}
Esempio n. 2
0
void sm511_device::execute_one()
{
	switch (m_op & 0xf0)
	{
		case 0x20: op_lax(); break;
		case 0x30: op_adx(); break;
		case 0x40: op_lb(); break;
		case 0x70: op_tl(); break;

		case 0x80: case 0x90: case 0xa0: case 0xb0:
			op_t(); break;
		case 0xc0: case 0xd0: case 0xe0: case 0xf0:
			op_tm(); break;

		default:
			switch (m_op & 0xfc)
			{
		case 0x04: op_rm(); break;
		case 0x0c: op_sm(); break;
		case 0x10: op_exc(); break;
		case 0x14: op_exci(); break;
		case 0x18: op_lda(); break;
		case 0x1c: op_excd(); break;
		case 0x54: op_tmi(); break;
		case 0x68: op_tml(); break;

		default:
			switch (m_op)
			{
		case 0x00: op_rot(); break;
//      case 0x01: op_xxx(); break; // ?
		case 0x02: op_sbm(); break;
		case 0x03: op_atpl(); break;
		case 0x08: op_add(); break;
		case 0x09: op_add11(); break;
		case 0x0a: op_coma(); break;
		case 0x0b: op_exbla(); break;

		case 0x50: op_kta(); break;
		case 0x51: op_tb(); break;
		case 0x52: op_tc(); break;
		case 0x53: op_tam(); break;
		case 0x58: op_tis(); break;
		case 0x59: op_atl(); break;
		case 0x5a: op_ta0(); break;
		case 0x5b: op_tabl(); break;
		case 0x5c: op_atx(); break;
//      case 0x5d: op_cend(); break;
		case 0x5e: op_tal(); break;
		case 0x5f: op_lbl(); break;

		case 0x61: op_pre(); break;
		case 0x62: op_wr(); break;
		case 0x63: op_ws(); break;
		case 0x64: op_incb(); break;
//      case 0x65: op_idiv(); break;
		case 0x66: op_rc(); break;
		case 0x67: op_sc(); break;
		case 0x6c: op_decb(); break;
		case 0x6d: op_ptw(); break;
		case 0x6e: op_rtn0(); break;
		case 0x6f: op_rtn1(); break;

		// extended opcodes
		case 0x60:
			m_op = m_op << 8 | m_param;
			switch (m_param)
			{
		case 0x30: op_rme(); break;
		case 0x31: op_sme(); break;
		case 0x32: op_tmel(); break;
		case 0x33: op_atfc(); break;
		case 0x34: op_bdc(); break;
		case 0x35: op_atbp(); break;

		default: op_illegal(); break;
			}
			break; // 0x60

		default: op_illegal(); break;
			}
			break; // 0xff

			}
			break; // 0xfc

	} // big switch
}
Esempio n. 3
0
void sm510_device::execute_one()
{
	switch (m_op & 0xf0)
	{
		case 0x20: op_lax(); break;
		case 0x30: op_adx(); break;
		case 0x40: op_lb(); break;

		case 0x80: case 0x90: case 0xa0: case 0xb0:
			op_t(); break;
		case 0xc0: case 0xd0: case 0xe0: case 0xf0:
			op_tm(); break;

		default:
			switch (m_op & 0xfc)
			{
		case 0x04: op_rm(); break;
		case 0x0c: op_sm(); break;
		case 0x10: op_exc(); break;
		case 0x14: op_exci(); break;
		case 0x18: op_lda(); break;
		case 0x1c: op_excd(); break;
		case 0x54: op_tmi(); break;
		case 0x70: case 0x74: case 0x78: op_tl(); break;
		case 0x7c: op_tml(); break;

		default:
			switch (m_op)
			{
		case 0x00: op_skip(); break;
		case 0x01: op_atbp(); break;
		case 0x02: op_sbm(); break;
		case 0x03: op_atpl(); break;
		case 0x08: op_add(); break;
		case 0x09: op_add11(); break;
		case 0x0a: op_coma(); break;
		case 0x0b: op_exbla(); break;

		case 0x51: op_tb(); break;
		case 0x52: op_tc(); break;
		case 0x53: op_tam(); break;
		case 0x58: op_tis(); break;
		case 0x59: op_atl(); break;
		case 0x5a: op_ta0(); break;
		case 0x5b: op_tabl(); break;
		case 0x5d: op_cend(); break;
		case 0x5e: op_tal(); break;
		case 0x5f: op_lbl(); break;

		case 0x60: op_atfc(); break;
		case 0x61: op_atr(); break;
		case 0x62: op_wr(); break;
		case 0x63: op_ws(); break;
		case 0x64: op_incb(); break;
		case 0x65: op_idiv(); break;
		case 0x66: op_rc(); break;
		case 0x67: op_sc(); break;
		case 0x68: op_tf1(); break;
		case 0x69: op_tf4(); break;
		case 0x6a: op_kta(); break;
		case 0x6b: op_rot(); break;
		case 0x6c: op_decb(); break;
		case 0x6d: op_bdc(); break;
		case 0x6e: op_rtn0(); break;
		case 0x6f: op_rtn1(); break;

		default: op_illegal(); break;
			}
			break; // 0xff

			}
			break; // 0xfc

	} // big switch

	// BM high bit is only valid for 1 step
	m_sbm = (m_op == 0x02);
}
Esempio n. 4
0
void kb1013vk12_device::execute_one()
{
	switch (m_op & 0xf0)
	{
		case 0x20: op_lax(); break; // LC
		case 0x30: op_adx(); break; // AS/A10
		case 0x40: op_lb(); break; // LAS
		case 0x70: op_ssr(); break; // LP

		case 0x80: case 0x90: case 0xa0: case 0xb0:
			op_t(); break; // BR (LP+this=JMP)
		case 0xc0: case 0xd0: case 0xe0: case 0xf0:
			op_trs(); break; // CBR/CZP (LP+this=CAL)

		default:
			switch (m_op & 0xfc)
			{
		case 0x04: op_rm(); break; // BM0
		case 0x0c: op_sm(); break; // BM1
		case 0x10: op_exc(); break; // XM/XE
		case 0x14: op_exci(); break; // XI/XEI
		case 0x18: op_lda(); break; // LE
		case 0x1c: op_excd(); break; // XD/XED
		case 0x54: op_tmi(); break; // SM1

		default:
			switch (m_op)
			{
		case 0x00: op_skip(); break; // NOP
		case 0x01: op_atr(); break; // OAR
		case 0x02: op_bs1(); break; // *BS1
		case 0x03: op_atbp(); break;
		case 0x08: op_add(); break; // AM
		case 0x09: op_add11(); break; // AC
		case 0x0a: op_coma(); break; // COM
		case 0x0b: op_exbla(); break; // XL

		case 0x50: op_tal(); break; // SI1
		case 0x51: op_tb(); break; // SI0
		case 0x52: op_tc(); break; // SCO
		case 0x53: op_tam(); break; // SAM
		case 0x58: op_tis(); break; // TIM
		case 0x59: op_ptw(); break;
		case 0x5a: op_ta0(); break; // SAO
		case 0x5b: op_tabl(); break; // SAL
		case 0x5c: op_tw(); break;
		case 0x5d: op_dtw(); break;
		case 0x5f: op_lbl(); break; // LAF

		case 0x60: op_comcn(); break;
		case 0x61: op_pdtw(); break;
		case 0x62: op_wr(); break;
		case 0x63: op_ws(); break;
		case 0x64: op_incb(); break; // INC
		case 0x65: op_idiv(); break; // SYN
		case 0x66: op_rc(); break; // CLC
		case 0x67: op_sc(); break; // STC
		case 0x68: op_rmf(); break; // CLL
		case 0x69: op_smf(); break; // LD0
		case 0x6a: op_kta(); break; // ICD
		case 0x6b: op_bs0(); break; // *BS0
		case 0x6c: op_decb(); break; // DEC
		case 0x6d: op_comcb(); break; // CMS
		case 0x6e: op_rtn0(); break; // RT
		case 0x6f: op_rtn1(); break; // RTS

		// extended opcodes
		case 0x5e:
			m_op = m_op << 8 | m_param;
			switch (m_param)
			{
		case 0x00: op_cend(); break; // HLT
		case 0x04: op_dta(); break; // LDF

		default: op_illegal(); break;
			}
			break; // 0x5e

		default: op_illegal(); break;
			}
			break; // 0xff

			}
			break; // 0xfc

	} // big switch
}
Esempio n. 5
0
void ucom4_cpu_device::execute_run()
{
	while (m_icount > 0)
	{
		m_icount--;

		// remember previous opcode
		m_prev_op = m_op;

		// handle interrupt - it not accepted during LI($9x) or EI($31), or while skipping
		if (m_int_f && m_inte_f && (m_prev_op & 0xf0) != 0x90 && m_prev_op != 0x31 && !m_skip)
		{
			m_icount--;
			push_stack();
			m_pc = 0xf << 2;
			m_int_f = 0;
			m_inte_f = (m_family == NEC_UCOM43) ? 0 : 1;

			standard_irq_callback(0);
		}

		// fetch next opcode
		debugger_instruction_hook(this, m_pc);
		m_op = m_program->read_byte(m_pc);
		m_bitmask = 1 << (m_op & 0x03);
		increment_pc();
		fetch_arg();

		if (m_skip)
		{
			m_skip = false;
			m_op = 0; // nop
		}

		// handle opcode
		switch (m_op & 0xf0)
		{
			case 0x80: op_ldz(); break;
			case 0x90: op_li(); break;
			case 0xa0: op_jmpcal(); break;
			case 0xb0: op_czp(); break;

			case 0xc0: case 0xd0: case 0xe0: case 0xf0: op_jcp(); break;

			default:
				switch (m_op)
				{
			case 0x00: op_nop(); break;
			case 0x01: op_di(); break;
			case 0x02: op_s(); break;
			case 0x03: op_tit(); break;
			case 0x04: op_tc(); break;
			case 0x05: op_ttm(); break;
			case 0x06: op_daa(); break;
			case 0x07: op_tal(); break;
			case 0x08: op_ad(); break;
			case 0x09: op_ads(); break;
			case 0x0a: op_das(); break;
			case 0x0b: op_clc(); break;
			case 0x0c: op_cm(); break;
			case 0x0d: op_inc(); break;
			case 0x0e: op_op(); break;
			case 0x0f: op_dec(); break;
			case 0x10: op_cma(); break;
			case 0x11: op_cia(); break;
			case 0x12: op_tla(); break;
			case 0x13: op_ded(); break;
			case 0x14: op_stm(); break;
			case 0x15: op_ldi(); break;
			case 0x16: op_cli(); break;
			case 0x17: op_ci(); break;
			case 0x18: op_exl(); break;
			case 0x19: op_adc(); break;
			case 0x1a: op_xc(); break;
			case 0x1b: op_stc(); break;
			case 0x1c: op_illegal(); break;
			case 0x1d: op_inm(); break;
			case 0x1e: op_ocd(); break;
			case 0x1f: op_dem(); break;

			case 0x30: op_rar(); break;
			case 0x31: op_ei(); break;
			case 0x32: op_ip(); break;
			case 0x33: op_ind(); break;

			case 0x40: op_ia(); break;
			case 0x41: op_jpa(); break;
			case 0x42: op_taz(); break;
			case 0x43: op_taw(); break;
			case 0x44: op_oe(); break;
			case 0x45: op_illegal(); break;
			case 0x46: op_tly(); break;
			case 0x47: op_thx(); break;
			case 0x48: op_rt(); break;
			case 0x49: op_rts(); break;
			case 0x4a: op_xaz(); break;
			case 0x4b: op_xaw(); break;
			case 0x4c: op_xls(); break;
			case 0x4d: op_xhr(); break;
			case 0x4e: op_xly(); break;
			case 0x4f: op_xhx(); break;

			default:
				switch (m_op & 0xfc)
				{
			case 0x20: op_fbf(); break;
			case 0x24: op_tab(); break;
			case 0x28: op_xm(); break;
			case 0x2c: op_xmd(); break;

			case 0x34: op_cmb(); break;
			case 0x38: op_lm(); break;
			case 0x3c: op_xmi(); break;

			case 0x50: op_tpb(); break;
			case 0x54: op_tpa(); break;
			case 0x58: op_tmb(); break;
			case 0x5c: op_fbt(); break;
			case 0x60: op_rpb(); break;
			case 0x64: op_reb(); break;
			case 0x68: op_rmb(); break;
			case 0x6c: op_rfb(); break;
			case 0x70: op_spb(); break;
			case 0x74: op_seb(); break;
			case 0x78: op_smb(); break;
			case 0x7c: op_sfb(); break;
				}
				break; // 0xfc

				}
				break; // 0xff

		} // big switch
	}
}