//--------------------------------------------------------------------+ // CLASS-USBD API (don't require to verify parameters) //--------------------------------------------------------------------+ bool usbh_init(void) { tu_memclr(_usbh_devices, sizeof(usbh_device_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); //------------- Enumeration & Reporter Task init -------------// _usbh_q = osal_queue_create( &_usbh_qdef ); TU_ASSERT(_usbh_q != NULL); //------------- Semaphore, Mutex for Control Pipe -------------// for(uint8_t i=0; i<CFG_TUSB_HOST_DEVICE_MAX+1; i++) // including address zero { usbh_device_t * const dev = &_usbh_devices[i]; dev->control.sem_hdl = osal_semaphore_create(&dev->control.sem_def); TU_ASSERT(dev->control.sem_hdl != NULL); dev->control.mutex_hdl = osal_mutex_create(&dev->control.mutex_def); TU_ASSERT(dev->control.mutex_hdl != NULL); memset(dev->itf2drv, 0xff, sizeof(dev->itf2drv)); // invalid mapping memset(dev->ep2drv , 0xff, sizeof(dev->ep2drv )); // invalid mapping } // Class drivers init for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) usbh_class_drivers[drv_id].init(); TU_ASSERT(hcd_init()); hcd_int_enable(TUH_OPT_RHPORT); return true; }
static void win_search_capture_semaphore(void) { #if 0 if(srch_cb_sem == OSAL_INVALID_ID) srch_cb_sem = osal_semaphore_create(1); if(srch_cb_sem != OSAL_INVALID_ID) osal_semaphore_capture(srch_cb_sem,OSAL_WAIT_FOREVER_TIME); #endif }
/* Register one special type Device */ INT32 dev_register_device(void *dev, UINT32 hld_type,UINT8 id,UINT32 sub_type) { UINT8 i; INT32 ret = -1; struct dev_manag_dev *dev_list = NULL; //Device Config Info Initialization if(dev_manag_sema_id==OSAL_INVALID_ID) { dev_manag_sema_id = osal_semaphore_create(1); MEMSET(dev_manag_list, 0, sizeof(dev_manag_list)); MEMSET(dev_nim_info, 0, sizeof(dev_nim_info)); MEMSET(dev_dmx_info, 0, sizeof(dev_dmx_info)); } if(dev_manag_sema_id==OSAL_INVALID_ID) return ret; ENTER_DEV_MUTEX(); dev_list = &dev_manag_list[0]; for(i=0;i < DEV_MAX_CNT; i++) { if((dev_list[i].hld_type==0)&&(dev_list[i].sub_type==0) &&(dev_list[i].dev_handle==NULL)) { dev_list[i].dev_handle = dev; dev_list[i].hld_type = hld_type; dev_list[i].sub_type = sub_type; dev_list[i].status = DEV_STATUS_NULL; if(hld_type==HLD_DEV_TYPE_NIM) dev_list[i].config = (UINT32)&dev_nim_info[id]; else if(hld_type==HLD_DEV_TYPE_DMX) dev_list[i].config = (UINT32)&dev_dmx_info[id]; ret = 0; break; } } LEAVE_DEV_MUTEX(); return ret; }
*****************************************************************************/ INT32 f_TC90512_attach(struct COFDM_TUNER_CONFIG_API *ptrCOFDM_Tuner) //51117-01Angus { struct nim_device *dev; struct nim_TC90512_private * priv_mem; UINT32 tuner_id=0; if ((ptrCOFDM_Tuner == NULL)) { NIM_PRINTF("Tuner Configuration API structure is NULL!/n"); return ERR_NO_DEV; } dev = (struct nim_device *)dev_alloc(nim_TC90512_name, HLD_DEV_TYPE_NIM, sizeof(struct nim_device)); if (dev == NULL) { NIM_PRINTF("Error: Alloc nim device error!\n"); return ERR_NO_MEM; } /* Alloc structure space of private */ priv_mem = (struct nim_TC90512_private *)MALLOC(sizeof(struct nim_TC90512_private)); if ((void*)priv_mem == NULL) { dev_free(dev); NIM_TC90512_PRINTF("Alloc nim device prive memory error!/n"); return ERR_NO_MEM; } MEMCPY((void*)&(priv_mem->Tuner_Control), (void*)ptrCOFDM_Tuner, sizeof(struct COFDM_TUNER_CONFIG_API)); dev->priv = (void*)priv_mem; /* Function point init */ dev->base_addr = SYS_COFDM_TC90512_CHIP_ADRRESS; //please check here dev->init = f_TC90512_attach; dev->open = f_TC90512_open; dev->stop = f_TC90512_close; dev->do_ioctl = NULL; dev->channel_change = f_TC90512_channel_change; dev->channel_search = f_TC90512_channel_search; dev->get_lock = f_TC90512_get_lock; dev->get_freq = f_TC90512_get_freq; dev->get_FEC = f_TC90512_get_code_rate; dev->get_AGC = f_TC90512_get_AGC; dev->get_SNR = f_TC90512_get_SNR; //dev->get_BER = f_TC90512_get_BER; dev->get_guard_interval = f_TC90512_get_GI; dev->get_fftmode = f_TC90512_get_fftmode; dev->get_modulation = f_TC90512_get_modulation; dev->get_spectrum_inv = NULL; //dev->get_HIER= f_TC90512_get_hier_mode; //dev->get_priority=f_TC90512_priority; dev->get_freq_offset = NULL; f_IIC_Sema_ID=osal_semaphore_create(1); /*if((((struct nim_TC90512_private*)dev->priv)->Tuner_Control.tuner_config.cChip)!=Tuner_Chip_QUANTEK ) { ptrCOFDM_Tuner->tuner_config.Tuner_Write=NULL; ptrCOFDM_Tuner->tuner_config.Tuner_Read=NULL; }*/ /* Add this device to queue */ if (dev_register(dev) != SUCCESS) { NIM_PRINTF("Error: Register nim device error!\n"); FREE(priv_mem); dev_free(dev); return ERR_NO_DEV; } if (((struct nim_TC90512_private*)dev->priv)->Tuner_Control.nim_Tuner_Init != NULL) { if((((struct nim_TC90512_private*)dev->priv)->Tuner_Control.tuner_config.cChip)==Tuner_Chip_QUANTEK || (((struct nim_TC90512_private*)dev->priv)->Tuner_Control.tuner_config.cChip)==Tuner_Chip_MAXLINEAR) { f_TC90512_PassThrough(dev,TRUE); //if (((struct nim_TC90512_private*)dev->priv)->Tuner_Control.nim_Tuner_Init(&((struct nim_TC90512_private*)dev->priv)->tuner_id, &(ptrCOFDM_Tuner->tuner_config)) != SUCCESS) if (((struct nim_TC90512_private*)dev->priv)->Tuner_Control.nim_Tuner_Init(&tuner_id, &(ptrCOFDM_Tuner->tuner_config)) != SUCCESS) { NIM_PRINTF("Error: Init Tuner Failure!\n"); f_TC90512_PassThrough(dev,FALSE); return ERR_NO_DEV; } f_TC90512_PassThrough(dev,FALSE); } else { if (((struct nim_TC90512_private*)dev->priv)->Tuner_Control.nim_Tuner_Init(&tuner_id, &(ptrCOFDM_Tuner->tuner_config)) != SUCCESS) { NIM_PRINTF("Error: Init Tuner Failure!\n"); return ERR_NO_DEV; } } } return SUCCESS;