int lcd_enable(void)
{
//debug("%s\n", __FUNCTION__);
//lcd_setup_gama_table(&tcon_config);
/* aml_8726m_bl_init();
lcd_io_init();
tcon_probe();
osd_init_hw();
osd_hw_setup();
*/
mdelay(10);
// power_off_backlight();
lcd_setup_gama_table(&tcon_config);
//t13_io_init();
lcd_io_init();
tcon_probe();
osd_init_hw();
osd_hw_setup();
//video_dac_disable();
// power_on_lcd();
// power_on_backlight(); //disable when required power sequence.
return 0;
}
static int osd1_init(logo_object_t *plogo)
{
int hpd_state = 0;
if(plogo->para.output_dev_type==output_osd1.idx)
{
DisableVideoLayer();
if((plogo->platform_res[output_osd1.idx].mem_end - plogo->platform_res[output_osd1.idx].mem_start) ==0)
{
return OUTPUT_DEV_UNFOUND;
}
if(plogo->para.loaded)
{
osd_init_hw(plogo->para.loaded);
if(plogo->para.vout_mode > VMODE_4K2K_SMPTE){
plogo->para.vout_mode|=VMODE_LOGO_BIT_MASK;
}
}
#ifdef CONFIG_AM_HDMI_ONLY
if(plogo->para.vout_mode > VMODE_4K2K_SMPTE) {
set_current_vmode(plogo->para.vout_mode);
}else{
extern int read_hpd_gpio(void);
hpd_state = read_hpd_gpio();
if (hpd_state == 0){
set_current_vmode(cvbsmode_hdmionly);
}
else{
set_current_vmode(hdmimode_hdmionly);
}
}
#else
set_current_vmode(plogo->para.vout_mode);
#endif
output_osd1.vinfo=get_current_vinfo();
plogo->dev=&output_osd1;
plogo->dev->window.x=0;
plogo->dev->window.y=0;
plogo->dev->window.w=plogo->dev->vinfo->width;
plogo->dev->window.h=plogo->dev->vinfo->height;
plogo->dev->output_dev.osd.mem_start=plogo->platform_res[LOGO_DEV_OSD1].mem_start;
plogo->dev->output_dev.osd.mem_end=plogo->platform_res[LOGO_DEV_OSD1].mem_end;
plogo->dev->output_dev.osd.color_depth=get_curr_color_depth(P_VIU_OSD2_BLK0_CFG_W0);//setup by uboot
return OUTPUT_DEV_FOUND;
}
return OUTPUT_DEV_UNFOUND;
}
static int osd_hw_setup(logo_object_t *plogo)
{
struct osd_ctl_s osd_ctl;
const color_bit_define_t *color;
osd_ctl.addr=plogo->dev->output_dev.osd.mem_start;
osd_ctl.index=plogo->dev->idx;
plogo->dev->output_dev.osd.color_depth=plogo->parser->logo_pic_info.color_info;
color=&default_color_format_array[plogo->dev->output_dev.osd.color_depth];
osd_ctl.xres=plogo->dev->vinfo->width ; //logo pic.
osd_ctl.yres=plogo->dev->vinfo->height;
osd_ctl.xres_virtual=plogo->dev->vinfo->width ;
osd_ctl.yres_virtual=plogo->dev->vinfo->height<<1;
osd_ctl.disp_start_x=0;
osd_ctl.disp_end_x=osd_ctl.xres -1;
osd_ctl.disp_start_y=0;
osd_ctl.disp_end_y=osd_ctl.yres-1;
osd_init_hw(0);
setup_color_mode(color,osd_ctl.index==0?P_VIU_OSD1_BLK0_CFG_W0:P_VIU_OSD2_BLK0_CFG_W0);
if(!plogo->para.loaded)
{
if(plogo->dev->idx == LOGO_DEV_OSD0){
aml_set_reg32_mask(P_VPP_MISC,VPP_OSD1_POSTBLEND);
}else if(plogo->dev->idx == LOGO_DEV_OSD1){
aml_set_reg32_mask(P_VPP_MISC,VPP_OSD2_POSTBLEND);
}
}
osd_setup(&osd_ctl, \
0, \
0, \
osd_ctl.xres, \
osd_ctl.yres, \
osd_ctl.xres_virtual, \
osd_ctl.yres_virtual, \
osd_ctl.disp_start_x, \
osd_ctl.disp_start_y, \
osd_ctl.disp_end_x, \
osd_ctl.disp_end_y, \
osd_ctl.addr, \
color, \
osd_ctl.index) ;
return SUCCESS;
}
int lcd_enable(void)
{
sn7325_init();
lcd_setup_gama_table(&tcon_config);
aml_8726m_bl_init();
lcd_io_init();
tcon_probe();
osd_init_hw();
osd_hw_setup();
return 0;
}
static int osd1_init(logo_object_t *plogo)
{
#if defined(CONFIG_AM_HDMI_ONLY)
int hpd_state = 0;
#endif
#if defined(CONFIG_AM_HDMI_ONLY) || (MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8)
vmode_t cur_mode = plogo->para.vout_mode;
#endif
if(plogo->para.output_dev_type==output_osd1.idx)
{
DisableVideoLayer();
if((plogo->platform_res[output_osd1.idx].mem_end - plogo->platform_res[output_osd1.idx].mem_start) ==0)
{
return OUTPUT_DEV_UNFOUND;
}
if(plogo->para.loaded)
{
osd_init_hw(plogo->para.loaded);
if(plogo->para.vout_mode > VMODE_4K2K_SMPTE){
plogo->para.vout_mode|=VMODE_LOGO_BIT_MASK;
}
}
#ifdef CONFIG_AM_HDMI_ONLY
if(plogo->para.vout_mode > VMODE_4K2K_SMPTE) {
set_current_vmode(plogo->para.vout_mode);
}else{
extern int read_hpd_gpio(void);
hpd_state = read_hpd_gpio();
if (hpd_state == 0){
cur_mode = cvbsmode_hdmionly;
}
else{
cur_mode = hdmimode_hdmionly;
}
set_current_vmode(cur_mode);
}
#else
set_current_vmode(plogo->para.vout_mode);
#endif
#if MESON_CPU_TYPE < MESON_CPU_TYPE_MESON8
osd_init_scan_mode();
#endif
output_osd1.vinfo=get_current_vinfo();
plogo->dev=&output_osd1;
plogo->dev->window.x=0;
plogo->dev->window.y=0;
plogo->dev->window.w=plogo->dev->vinfo->width;
plogo->dev->window.h=plogo->dev->vinfo->height;
plogo->dev->output_dev.osd.mem_start=plogo->platform_res[LOGO_DEV_OSD1].mem_start;
plogo->dev->output_dev.osd.mem_end=plogo->platform_res[LOGO_DEV_OSD1].mem_end;
plogo->dev->output_dev.osd.color_depth=get_curr_color_depth(P_VIU_OSD2_BLK0_CFG_W0);//setup by uboot
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
if((cur_mode != (plogo->para.vout_mode & VMODE_MODE_BIT_MASK)) && (cur_mode <= VMODE_4K2K_SMPTE)) {
set_osd_freescaler(LOGO_DEV_OSD1, plogo, cur_mode);
}
#endif
return OUTPUT_DEV_FOUND;
}
return OUTPUT_DEV_UNFOUND;
}
