static void pch_enable_mphy(void) { u32 gpio71_native = gpio_is_native(71); u32 data_and = 0xffffffff; u32 data_or = (1 << 14) | (1 << 13) | (1 << 12); if (gpio71_native) { data_or |= (1 << 0); if (pch_is_wpt()) { data_and &= ~((1 << 7) | (1 << 6) | (1 << 3)); data_or |= (1 << 5) | (1 << 4); if (pch_is_wpt_ulx()) { /* Check if SATA and USB3 MPHY are enabled */ u32 strap19 = pch_read_soft_strap(19); strap19 &= ((1 << 31) | (1 << 30)); strap19 >>= 30; if (strap19 == 3) { data_or |= (1 << 3); printk(BIOS_DEBUG, "Enable ULX MPHY PG " "control in single domain\n"); } else if (strap19 == 0) { printk(BIOS_DEBUG, "Enable ULX MPHY PG " "control in split domains\n"); } else { printk(BIOS_DEBUG, "Invalid PCH Soft " "Strap 19 configuration\n"); } } else { data_or |= (1 << 3); } } }
static void pch_enable_mphy(struct udevice *dev) { u32 data_and = 0xffffffff; u32 data_or = (1 << 14) | (1 << 13) | (1 << 12); data_or |= (1 << 0); if (pch_is_wpt(dev)) { data_and &= ~((1 << 7) | (1 << 6) | (1 << 3)); data_or |= (1 << 5) | (1 << 4); if (pch_is_wpt_ulx(dev)) { /* Check if SATA and USB3 MPHY are enabled */ u32 strap19 = pch_read_soft_strap(19); strap19 &= ((1 << 31) | (1 << 30)); strap19 >>= 30; if (strap19 == 3) { data_or |= (1 << 3); debug("Enable ULX MPHY PG control in single domain\n"); } else if (strap19 == 0) { debug("Enable ULX MPHY PG control in split domains\n"); } else { debug("Invalid PCH Soft Strap 19 configuration\n"); } } else { data_or |= (1 << 3); } }