Esempio n. 1
0
static void sata_enable_resources(struct device *dev)
{
	printk(BIOS_DEBUG, "SB900 - Late.c - sata_enable_resources - Start.\n");
//-	sataInitAfterPciEnum(sb_config);
	pci_dev_enable_resources(dev);
	printk(BIOS_DEBUG, "SB900 - Late.c - sata_enable_resources - End.\n");
}
Esempio n. 2
0
File: late.c Progetto: 0ida/coreboot
static void lpc_enable_resources(device_t dev)
{

	printk(BIOS_SPEW, "SB700 - Late.c - %s - Start.\n", __func__);
	pci_dev_enable_resources(dev);
	lpc_enable_childrens_resources(dev);
	printk(BIOS_SPEW, "SB700 - Late.c - %s - End.\n", __func__);
}
Esempio n. 3
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static void lpc_enable_resources(device_t dev)
{

	printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - Start.\n");
	pci_dev_enable_resources(dev);
	//lpc_enable_childrens_resources(dev);
	printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - End.\n");
}
Esempio n. 4
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static void i82801ex_lpc_enable_resources(device_t dev)
{
	/* Enable the normal PCI resources. */
	pci_dev_enable_resources(dev);

	/* Enable ACPI and GPIO BARs. */
	i82801ex_enable_acpi(dev);
}
Esempio n. 5
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static void pcie_bus_enable_resources(struct device *dev)
{
	if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
		printk(BIOS_SPEW, "Enable VGA IO/MEM forwarding on PCIe port\n");
		pci_write_config8(dev, PCI_BRIDGE_CONTROL, 8);

		dev->command |= PCI_COMMAND_IO;
		dev->command |= PCI_COMMAND_MEMORY;
	}
	pci_dev_enable_resources(dev);
}
Esempio n. 6
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static void acpi_enable_resources(device_t dev)
{
	uint8_t byte;
	/* Enable the generic pci resources */
	pci_dev_enable_resources(dev);

	/* Enable the ACPI/SMBUS Bar */
	byte = pci_read_config8(dev, 0x41);
	byte |= (1 << 7);
	pci_write_config8(dev, 0x41, byte);

	/* Set the class code */
	pci_write_config32(dev, 0x60, 0x06800000);

}
Esempio n. 7
0
void cardbus_enable_resources(device_t dev)
{
	u16 ctrl;

	ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
	ctrl |= (dev->link_list->bridge_ctrl & (
			PCI_BRIDGE_CTL_PARITY |
			PCI_BRIDGE_CTL_SERR |
			PCI_BRIDGE_CTL_NO_ISA |
			PCI_BRIDGE_CTL_VGA |
			PCI_BRIDGE_CTL_MASTER_ABORT |
			PCI_BRIDGE_CTL_BUS_RESET));
	/* Error check */
	ctrl |= (PCI_CB_BRIDGE_CTL_PARITY + PCI_CB_BRIDGE_CTL_SERR);
	printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
	pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);

	pci_dev_enable_resources(dev);
}
Esempio n. 8
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static void sb600_lpc_enable_resources(device_t dev)
{
	pci_dev_enable_resources(dev);
	sb600_lpc_enable_childrens_resources(dev);
}
Esempio n. 9
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static void lpc_enable_resources(struct device *dev)
{
	pch_decode_init(dev);
	pci_dev_enable_resources(dev);
}
Esempio n. 10
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static void sb800_lpc_enable_resources(struct device *dev)
{
	pci_dev_enable_resources(dev);
	sb800_lpc_enable_childrens_resources(dev);
}
Esempio n. 11
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static void bcm5785_lpc_enable_resources(device_t dev)
{
	pci_dev_enable_resources(dev);
	bcm5785_lpc_enable_childrens_resources(dev);
}
Esempio n. 12
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static void hudson_lpc_enable_resources(device_t dev)
{
	pci_dev_enable_resources(dev);
	hudson_lpc_enable_childrens_resources(dev);
}
Esempio n. 13
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static void lpc_enable_resources(device_t dev)
{

	pci_dev_enable_resources(dev);
	//lpc_enable_childrens_resources(dev);
}
Esempio n. 14
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static void sata_enable_resources(struct device *dev)
{
	sataInitAfterPciEnum(sb_config);
	pci_dev_enable_resources(dev);
}