void
VIAUnmapMem(ScrnInfoPtr pScrn)
{
    VIAPtr pVia = VIAPTR(pScrn);

    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAUnmapMem\n"));

    ViaMMIODisable(pScrn);

#ifdef HAVE_PCIACCESS
    if (pVia->MapBase)
        pci_device_unmap_range(pVia->PciInfo, (pointer) pVia->MapBase,
                               VIA_MMIO_REGSIZE);

    if (pVia->BltBase)
        pci_device_unmap_range(pVia->PciInfo, (pointer) pVia->BltBase,
                               VIA_MMIO_BLTSIZE);

    if (pVia->FBBase)
        pci_device_unmap_range(pVia->PciInfo, (pointer) pVia->FBBase,
                               pVia->videoRambytes);
#else
    if (pVia->MapBase)
        xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pVia->MapBase,
                        VIA_MMIO_REGSIZE);

    if (pVia->BltBase)
        xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pVia->BltBase,
                        VIA_MMIO_BLTSIZE);

    if (pVia->FBBase)
        xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pVia->FBBase,
                        pVia->videoRambytes);
#endif
}
Esempio n. 2
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void
ASTUnmapMMIO(ScrnInfoPtr pScrn)
{
   ASTRecPtr pAST = ASTPTR(pScrn);

#ifndef XSERVER_LIBPCIACCESS
   xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pAST->MMIOVirtualAddr,
		   pAST->MMIOMapSize);
#else
   pci_device_unmap_range(pAST->PciInfo, pAST->MMIOVirtualAddr, pAST->MMIOMapSize);
#endif
   pAST->MMIOVirtualAddr = 0;

}
Esempio n. 3
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/**
 * Unmap the specified BAR so that it can no longer be accessed by the CPU.
 *
 * Unmaps the specified BAR that was previously mapped via
 * \c pci_device_map_region.
 *
 * \param dev          Device whose memory region is to be mapped.
 * \param region       Region, on the range [0, 5], that is to be mapped.
 *
 * \return
 * Zero on success or an \c errno value on failure.
 *
 * \sa pci_device_map_range, pci_device_unmap_range
 * \deprecated
 */
int
pci_device_unmap_region( struct pci_device * dev, unsigned region )
{
    int err;

    if (dev == NULL) {
        return EFAULT;
    }

    if ((region > 5) || (dev->regions[region].size == 0)) {
        return ENOENT;
    }

    err = pci_device_unmap_range(dev, dev->regions[region].memory,
                                 dev->regions[region].size);
    if (!err) {
        dev->regions[region].memory = NULL;
    }

    return err;
}
int
Permedia3MemorySizeDetect(ScrnInfoPtr pScrn)
{
    GLINTPtr pGlint = GLINTPTR (pScrn);
    CARD32 size = 0, temp, temp1, temp2, i;

    /* We can map 64MB, as that's the size of the Permedia3 aperture 
     * regardless of memory configuration */
    pGlint->FbMapSize = 64*1024*1024;

#ifndef XSERVER_LIBPCIACCESS    
    /* Mark as VIDMEM_MMIO to avoid write-combining while detecting memory */
    pGlint->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO,
			pGlint->PciTag, pGlint->FbAddress, pGlint->FbMapSize);
#else
    {
      void** result = (void**)&pGlint->FbBase;
      int err = pci_device_map_range(pGlint->PciInfo,
				     pGlint->FbAddress,
				     pGlint->FbMapSize,
				     PCI_DEV_MAP_FLAG_WRITABLE,
				     result);
      
      if (err) 
	return FALSE;
    }

#endif
    if (pGlint->FbBase == NULL) 
	return 0;

    temp = GLINT_READ_REG(PM3MemBypassWriteMask);
    GLINT_SLOW_WRITE_REG(0xffffffff, PM3MemBypassWriteMask);

    /* The Permedia3 splits up memory, and even replicates it. Grrr.
     * So that each 32MB appears at offset 0, and offset 32, unless
     * there's really 64MB attached to the chip.
     * So, 16MB appears at offset 0, nothing between 16-32, then it re-appears
     * at offset 32.
     * This below is to detect the cases of memory combinations
     */

    /* Test first 32MB */
    for(i=0;i<32;i++) {
    	/* write test pattern */
	MMIO_OUT32(pGlint->FbBase, i*1024*1024, i*0x00345678);
	mem_barrier();
	temp1 = MMIO_IN32(pGlint->FbBase, i*1024*1024);
    	/* Let's check for wrapover, write will fail at 16MB boundary */
	if (temp1 == (i*0x00345678)) 
	    size = i;
	else 
	    break;
    }

    /* Ok, we're satisfied we've got 32MB, let's test the second lot */
    if ((size + 1) == i) {
	for(i=0;i<32;i++) {
	    /* Clear first 32MB */
	    MMIO_OUT32(pGlint->FbBase, i*1024*1024, 0);
	}
	mem_barrier();

        for(i=32;i<64;i++) {
    	    /* write test pattern */
	    MMIO_OUT32(pGlint->FbBase, i*1024*1024, i*0x00345678);
	    mem_barrier();
	    temp1 = MMIO_IN32(pGlint->FbBase, i*1024*1024);
	    temp2 = MMIO_IN32(pGlint->FbBase, (i-32)*1024*1024);
    	    /* Let's check for wrapover */
	    if ( (temp1 == (i*0x00345678)) && (temp2 == 0) )
	        size = i;
	    else 
	        break;
	}
    }

    GLINT_SLOW_WRITE_REG(temp, PM3MemBypassWriteMask);

#ifndef XSERVER_LIBPCIACCESS
    xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pGlint->FbBase, 
							pGlint->FbMapSize);
#else
    pci_device_unmap_range(pGlint->PciInfo, pGlint->FbBase, pGlint->FbMapSize);
#endif

    pGlint->FbBase = NULL;
    pGlint->FbMapSize = 0;

    return ( (size+1) * 1024 );
}
Esempio n. 5
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/**
 * Unmap the specified memory range so that it can no longer be accessed by the CPU.
 *
 * Unmaps the specified memory range that was previously mapped via
 * \c pci_device_map_memory_range.
 *
 * \param dev          Device whose memory is to be unmapped.
 * \param memory       Pointer to the base of the mapped range.
 * \param size         Size, in bytes, of the range to be unmapped.
 *
 * \return
 * Zero on success or an \c errno value on failure.
 *
 * \sa pci_device_map_range, pci_device_unmap_range
 * \deprecated
 */
int
pci_device_unmap_memory_range(struct pci_device *dev, void *memory,
                              pciaddr_t size)
{
    return pci_device_unmap_range(dev, memory, size);
}