static int mm_pi_enable(struct pi *pi, int enable) { int ret; pi_dbg(pi->id, PI_LOG_EN_DIS, "%s\n", __func__); writel(0x00A5A501, KONA_ROOT_CLK_VA + ROOT_CLK_MGR_REG_WR_ACCESS_OFFSET); #ifdef CONFIG_PLL1_8PHASE_OFF_ERRATUM if (is_pm_erratum(ERRATUM_PLL1_8PHASE_OFF)) { if (enable && ref_8ph_en_pll1_clk) clk_enable(ref_8ph_en_pll1_clk); } #endif #ifdef CONFIG_MM_FREEZE_VAR500M_ERRATUM if (is_pm_erratum(ERRATUM_MM_FREEZE_VAR500M) && enable) var500m_clk_en_override(true); #endif ret = gen_pi_ops.enable(pi, enable); #ifdef CONFIG_MM_FREEZE_VAR500M_ERRATUM if (is_pm_erratum(ERRATUM_MM_FREEZE_VAR500M) && !enable) var500m_clk_en_override(false); #endif #ifdef CONFIG_PLL1_8PHASE_OFF_ERRATUM if (is_pm_erratum(ERRATUM_PLL1_8PHASE_OFF)) { if (!enable && ref_8ph_en_pll1_clk) clk_disable(ref_8ph_en_pll1_clk); } #endif return ret; }
static int mm_pi_enable(struct pi *pi, int enable) { int ret; pi_dbg(pi->id, PI_LOG_EN_DIS, "%s\n", __func__); #ifdef CONFIG_PLL1_8PHASE_OFF_ERRATUM if (is_pm_erratum(ERRATUM_PLL1_8PHASE_OFF)) { if (enable && ref_8ph_en_pll1_clk) __clk_enable(ref_8ph_en_pll1_clk); } #endif #ifdef CONFIG_MM_FREEZE_VAR500M_ERRATUM if (is_pm_erratum(ERRATUM_MM_FREEZE_VAR500M) && enable) mm_varvdd_clk_en_override(true); #endif ret = gen_pi_ops.enable(pi, enable); #ifdef CONFIG_MM_FREEZE_VAR500M_ERRATUM #ifdef CONFIG_MM_312M_SOURCE_CLK if (is_pm_erratum(ERRATUM_MM_FREEZE_VAR500M) && enable) mm_varvdd_clk_en_override(false); #else if (is_pm_erratum(ERRATUM_MM_FREEZE_VAR500M) && !enable) mm_varvdd_clk_en_override(false); #endif #endif #ifdef CONFIG_PLL1_8PHASE_OFF_ERRATUM #ifdef CONFIG_MOVE_MM_CLK_TO_PLL0 if (is_pm_erratum(ERRATUM_PLL1_8PHASE_OFF)) { if (enable && ref_8ph_en_pll1_clk) __clk_disable(ref_8ph_en_pll1_clk); } #else if (is_pm_erratum(ERRATUM_PLL1_8PHASE_OFF)) { if (!enable && ref_8ph_en_pll1_clk) __clk_disable(ref_8ph_en_pll1_clk); } #endif #endif return ret; }