Esempi in C++ (Cpp) per pmic_gpio_set_bit_val

Esempio n. 1

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * This function enable and reset GPS GPIO
 */
void gpio_gps_active(void)
{
	/* Pull GPIO1_5 to be low for routing signal to UART3/GPS */
	if (board_is_mx35(BOARD_REV_2)) {
		mxc_request_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO);
		mxc_iomux_set_pad(MX35_PIN_COMPARE, PAD_CTL_DRV_NORMAL |
				PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU |
				PAD_CTL_DRV_3_3V | PAD_CTL_PUE_PUD |
				PAD_CTL_SRE_SLOW);
		mxc_set_gpio_direction(MX35_PIN_COMPARE, 0);
		mxc_set_gpio_dataout(MX35_PIN_COMPARE, 0);
	}

	/* PWR_EN_GPS is set to be 0, will be toggled on in app by ioctl */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 0);

	/* GPS 32KHz clock enbale */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 7, 1);

	/* GPS reset */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, 0);
	msleep(5);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, 1);
	msleep(5);
}

Esempio n. 2

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File: mach-mx35_3ds.c Progetto: Angor00/linux-aura-hd-android-2.6.35.3

static void si4702_reset(void)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 4, 0);
	msleep(100);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 4, 1);
	msleep(100);
}

Esempio n. 3

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File: mach-mx35_3ds.c Progetto: Angor00/linux-aura-hd-android-2.6.35.3

static void adv7180_reset(void)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 6, 0);
	msleep(5);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 6, 1);
	msleep(5);
}

Esempio n. 4

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File: mx35_3stack.c Progetto: vasubabu/kernel

static int mxc_ak4647_plat_init(void)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 1, 0);
	msleep(1);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 1, 1);
	return 0;
}

Esempio n. 5

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File: mx35_3stack.c Progetto: twobob/KK_kernel

static void mxc_unifi_enable(int en)
{
	if (en) {
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 5, 1);
		msleep(10);
	} else
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 5, 0);
}

Esempio n. 6

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static int spk_amp_event(struct snd_soc_dapm_widget *w,
			 struct snd_kcontrol *kcontrol, int event)
{
	if (SND_SOC_DAPM_EVENT_ON(event))
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 0, 1);
	else
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 0, 0);
	return 0;
}

Esempio n. 7

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File: mx35_3stack_gpio.c Progetto: R0-Developers/YP-R0_Kernel

/*!
 * This function enable and reset GPS GPIO
 */
void gpio_gps_active(void)
{
	/* PWR_EN_GPS is set to be 0, will be toggled on in app by ioctl */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 0);

	/* GPS 32KHz clock enbale */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 7, 1);

	/* GPS reset */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, 0);
	msleep(5);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, 1);
	msleep(5);
}

Esempio n. 8

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * Setup GPIO for spdif tx/rx to be active
 */
void gpio_spdif_active(void)
{
	/* SPDIF OUT */
	mxc_request_iomux(MX35_PIN_STXD5, MUX_CONFIG_ALT1);
	mxc_iomux_set_pad(MX35_PIN_STXD5, PAD_CTL_PKE_NONE | PAD_CTL_PUE_PUD);
	/* SPDIF IN */
	mxc_request_iomux(MX35_PIN_SRXD5, MUX_CONFIG_ALT1);
	mxc_iomux_set_pad(MX35_PIN_SRXD5, PAD_CTL_PKE_ENABLE
			  | PAD_CTL_100K_PU | PAD_CTL_HYS_SCHMITZ);
	/* SPDIF ext clock */
	mxc_request_iomux(MX35_PIN_SCK5, MUX_CONFIG_ALT1);
	if (board_is_mx35(BOARD_REV_2))
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 5, 1);
	else
		pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 0, 1);
}

Esempio n. 9

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File: mx35_3stack.c Progetto: vasubabu/kernel

static void flexcan_xcvr_enable(int id, int en)
{
	static int pwdn;

	if (id < 0 || id > 1)
		return;

	if (en) {
		if (!(pwdn++))
			pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2,
					      1, 0);
	} else {
		if (!(--pwdn))
			pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2,
					      1, 1);
	}
}

Esempio n. 10

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * This function disable GPS GPIO
 */
void gpio_gps_inactive(void)
{
	/* GPS disable */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 0);
	/* Free GPIO1_5 */
	if (board_is_mx35(BOARD_REV_2))
		mxc_free_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO);
}

Esempio n. 11

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*
 *  USB Host2
 */
int gpio_usbh2_active(void)
{
	if (board_is_mx35(BOARD_REV_2)) {
		/* MUX3_CTR to be low for USB Host2 DP&DM */
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 6, 0);
		/* CAN_PWDN to be high for USB Host2 Power&OC */
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 1, 1);
	}

	mxc_request_iomux(MX35_PIN_I2C2_CLK, MUX_CONFIG_ALT2);
	mxc_iomux_set_pad(MX35_PIN_I2C2_CLK, 0x0040);

	mxc_request_iomux(MX35_PIN_I2C2_DAT, MUX_CONFIG_ALT2);
	mxc_iomux_set_input(MUX_IN_USB_UH2_USB_OC, INPUT_CTL_PATH0);
	mxc_iomux_set_pad(MX35_PIN_I2C2_DAT, 0x01c0);

	return 0;
}

Esempio n. 12

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * This function activates DAM ports 5 to enable
 * audio I/O.
 */
void gpio_activate_bt_audio_port(void)
{
	unsigned int pad_val;

	mxc_request_iomux(MX35_PIN_STXD5, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_SRXD5, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_SCK5, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_STXFS5, MUX_CONFIG_FUNC);

	pad_val = PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU |
	    PAD_CTL_PUE_PUD;
	mxc_iomux_set_pad(MX35_PIN_STXD5, pad_val);
	mxc_iomux_set_pad(MX35_PIN_SRXD5, pad_val);
	mxc_iomux_set_pad(MX35_PIN_SCK5, pad_val);
	mxc_iomux_set_pad(MX35_PIN_STXFS5, pad_val);
	if (board_is_mx35(BOARD_REV_2))
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 5, 0);
	else
		pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 0, 0);
}

Esempio n. 13

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * Restore ATA interface pins to reset values
 *
 */
void gpio_ata_inactive(void)
{
	/*Turn off the IOMUX for ATA group B signals */
	mxc_free_iomux(MX35_PIN_ATA_DATA0, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA1, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA2, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA3, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA4, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA5, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA6, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA7, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA8, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA9, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA10, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA11, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA12, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA13, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA14, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DATA15, MUX_CONFIG_FUNC);

	/* Config the multiplex pin of ATA interface DIR, DA0-2, INTRQ, DMARQ */
	mxc_free_iomux(MX35_PIN_ATA_DMARQ, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DIOR, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DIOW, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DMACK, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_RESET_B, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_IORDY, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_INTRQ, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_CS0, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_CS1, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DA0, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DA1, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_DA2, MUX_CONFIG_FUNC);
	mxc_free_iomux(MX35_PIN_ATA_BUFF_EN, MUX_CONFIG_FUNC);

	/* Power Off the HDD */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 4, 0);
	/* HDD_ENBALE */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 3, 1);
}

Esempio n. 14

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * This function get GPS GPIO status.
 */
int gpio_gps_access(int para)
{
	unsigned int gps_val;

	if (para & 0x4) {	/* Read GPIO */
		if (para & 0x1) /* Read PWR_EN */
			pmic_gpio_get_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0,
						&gps_val);
		else		/* Read nReset */
			pmic_gpio_get_bit_val(MCU_GPIO_REG_RESET_1, 5,
						&gps_val);
		return gps_val;
	} else {		/* Write GPIO */
		gps_val = (para & 0x2) ? 1 : 0;
		if (para & 0x1)
			pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0,
						gps_val);
		else
			pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 5, gps_val);
	}
	return 0;
}

Esempio n. 15

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File: mach-mx35_3ds.c Progetto: Angor00/linux-aura-hd-android-2.6.35.3

static unsigned int sdhc_get_card_det_status(struct device *dev)
{
	unsigned int ret;

	if (board_is_rev(BOARD_REV_2))
		pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 7, 1);

	if (to_platform_device(dev)->id == 0) {
		if (0 != pmic_gpio_get_designation_bit_val(2, &ret))
			printk(KERN_ERR "Get cd status error.");
		return ret;
	}

	return 0;
}

Esempio n. 16

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

void gpio_fec_inactive(void)
{
	mxc_request_gpio(MX35_PIN_FEC_TX_CLK);
	mxc_request_gpio(MX35_PIN_FEC_RX_CLK);
	mxc_request_gpio(MX35_PIN_FEC_RX_DV);
	mxc_request_gpio(MX35_PIN_FEC_COL);
	mxc_request_gpio(MX35_PIN_FEC_RDATA0);
	mxc_request_gpio(MX35_PIN_FEC_TDATA0);
	mxc_request_gpio(MX35_PIN_FEC_TX_EN);
	mxc_request_gpio(MX35_PIN_FEC_MDC);
	mxc_request_gpio(MX35_PIN_FEC_MDIO);
	mxc_request_gpio(MX35_PIN_FEC_TX_ERR);
	mxc_request_gpio(MX35_PIN_FEC_RX_ERR);
	mxc_request_gpio(MX35_PIN_FEC_CRS);
	mxc_request_gpio(MX35_PIN_FEC_RDATA1);
	mxc_request_gpio(MX35_PIN_FEC_TDATA1);
	mxc_request_gpio(MX35_PIN_FEC_RDATA2);
	mxc_request_gpio(MX35_PIN_FEC_TDATA2);
	mxc_request_gpio(MX35_PIN_FEC_RDATA3);
	mxc_request_gpio(MX35_PIN_FEC_TDATA3);

	mxc_free_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_GPIO);

	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 2, 0);

	/* Free GPIO1_5 */
	if (board_is_mx35(BOARD_REV_2))
		mxc_free_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO);
}

Esempio n. 17

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File: mx35_3stack_gpio.c Progetto: R0-Developers/YP-R0_Kernel

void gpio_fec_inactive(void)
{
	mxc_request_gpio(MX35_PIN_FEC_TX_CLK);
	mxc_request_gpio(MX35_PIN_FEC_RX_CLK);
	mxc_request_gpio(MX35_PIN_FEC_RX_DV);
	mxc_request_gpio(MX35_PIN_FEC_COL);
	mxc_request_gpio(MX35_PIN_FEC_RDATA0);
	mxc_request_gpio(MX35_PIN_FEC_TDATA0);
	mxc_request_gpio(MX35_PIN_FEC_TX_EN);
	mxc_request_gpio(MX35_PIN_FEC_MDC);
	mxc_request_gpio(MX35_PIN_FEC_MDIO);
	mxc_request_gpio(MX35_PIN_FEC_TX_ERR);
	mxc_request_gpio(MX35_PIN_FEC_RX_ERR);
	mxc_request_gpio(MX35_PIN_FEC_CRS);
	mxc_request_gpio(MX35_PIN_FEC_RDATA1);
	mxc_request_gpio(MX35_PIN_FEC_TDATA1);
	mxc_request_gpio(MX35_PIN_FEC_RDATA2);
	mxc_request_gpio(MX35_PIN_FEC_TDATA2);
	mxc_request_gpio(MX35_PIN_FEC_RDATA3);
	mxc_request_gpio(MX35_PIN_FEC_TDATA3);

	mxc_free_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_GPIO);
	mxc_free_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_GPIO);

	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 2, 0);
}

Esempio n. 18

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * Setup GPIO for ATA interface
 *
 */
void gpio_ata_active(void)
{
	unsigned int ata_ctl_pad_cfg, ata_dat_pad_cfg;

	/* HDD_ENBALE */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 3, 0);
	/* Power On the HDD */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 4, 1);
	msleep(300);

	/*IOMUX Settings */
	/*PATA_DIOR */
	mxc_request_iomux(MX35_PIN_ATA_DIOR, MUX_CONFIG_FUNC);
	/*PATA_DIOW */
	mxc_request_iomux(MX35_PIN_ATA_DIOW, MUX_CONFIG_FUNC);
	/*PATA_DMARQ_B */
	mxc_request_iomux(MX35_PIN_ATA_DMARQ, MUX_CONFIG_FUNC);
	/*PATA_DMACK */
	mxc_request_iomux(MX35_PIN_ATA_DMACK, MUX_CONFIG_FUNC);
	/*PATA_RESET_B */
	mxc_request_iomux(MX35_PIN_ATA_RESET_B, MUX_CONFIG_FUNC);
	/*PATA_IORDY */
	mxc_request_iomux(MX35_PIN_ATA_IORDY, MUX_CONFIG_FUNC);
	/*PATA_INTRQ_B */
	mxc_request_iomux(MX35_PIN_ATA_INTRQ, MUX_CONFIG_FUNC);
	/*PATA_CS_0 */
	mxc_request_iomux(MX35_PIN_ATA_CS0, MUX_CONFIG_FUNC);
	/*PATA_CS_1 */
	mxc_request_iomux(MX35_PIN_ATA_CS1, MUX_CONFIG_FUNC);
	/*PATA_DA0 */
	mxc_request_iomux(MX35_PIN_ATA_DA0, MUX_CONFIG_FUNC);
	/*PATA_DA1 */
	mxc_request_iomux(MX35_PIN_ATA_DA1, MUX_CONFIG_FUNC);
	/*PATA_DA2 */
	mxc_request_iomux(MX35_PIN_ATA_DA2, MUX_CONFIG_FUNC);
	/* BUFFER_ENABLE - HDD_ENABLE_B  */
	mxc_request_iomux(MX35_PIN_ATA_BUFF_EN, MUX_CONFIG_FUNC);

	/*PATA_D0 */
	mxc_request_iomux(MX35_PIN_ATA_DATA0, MUX_CONFIG_FUNC);
	/*PATA_D1 */
	mxc_request_iomux(MX35_PIN_ATA_DATA1, MUX_CONFIG_FUNC);
	/*PATA_D2 */
	mxc_request_iomux(MX35_PIN_ATA_DATA2, MUX_CONFIG_FUNC);
	/*PATA_D3 */
	mxc_request_iomux(MX35_PIN_ATA_DATA3, MUX_CONFIG_FUNC);
	/*PATA_D4 */
	mxc_request_iomux(MX35_PIN_ATA_DATA4, MUX_CONFIG_FUNC);
	/*PATA_D5 */
	mxc_request_iomux(MX35_PIN_ATA_DATA5, MUX_CONFIG_FUNC);
	/*PATA_D6 */
	mxc_request_iomux(MX35_PIN_ATA_DATA6, MUX_CONFIG_FUNC);
	/*PATA_D7 */
	mxc_request_iomux(MX35_PIN_ATA_DATA7, MUX_CONFIG_FUNC);
	/*PATA_D8 */
	mxc_request_iomux(MX35_PIN_ATA_DATA8, MUX_CONFIG_FUNC);
	/*PATA_D9 */
	mxc_request_iomux(MX35_PIN_ATA_DATA9, MUX_CONFIG_FUNC);
	/*PATA_D10 */
	mxc_request_iomux(MX35_PIN_ATA_DATA10, MUX_CONFIG_FUNC);
	/*PATA_D11 */
	mxc_request_iomux(MX35_PIN_ATA_DATA11, MUX_CONFIG_FUNC);
	/*PATA_D12 */
	mxc_request_iomux(MX35_PIN_ATA_DATA12, MUX_CONFIG_FUNC);
	/*PATA_D13 */
	mxc_request_iomux(MX35_PIN_ATA_DATA13, MUX_CONFIG_FUNC);
	/*PATA_D14 */
	mxc_request_iomux(MX35_PIN_ATA_DATA14, MUX_CONFIG_FUNC);
	/*PATA_D15 */
	mxc_request_iomux(MX35_PIN_ATA_DATA15, MUX_CONFIG_FUNC);

	/* IOMUX Pad Settings */
	ata_ctl_pad_cfg = PAD_CTL_SRE_SLOW | PAD_CTL_DRV_NORMAL |
	    PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE |
	    PAD_CTL_PUE_PUD | PAD_CTL_100K_PD |
	    PAD_CTL_HYS_CMOS | PAD_CTL_DRV_3_3V;
	ata_dat_pad_cfg = PAD_CTL_SRE_FAST | PAD_CTL_DRV_MAX |
	    PAD_CTL_ODE_CMOS | PAD_CTL_PKE_ENABLE |
	    PAD_CTL_PUE_PUD | PAD_CTL_100K_PD |
	    PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_3_3V;

	mxc_iomux_set_pad(MX35_PIN_ATA_DMARQ, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DIOR, ata_ctl_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DIOW, ata_ctl_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DMACK, ata_ctl_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_RESET_B, PAD_CTL_SRE_SLOW |
			  PAD_CTL_DRV_NORMAL | PAD_CTL_ODE_CMOS |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PUD |
			  PAD_CTL_100K_PU | PAD_CTL_HYS_CMOS |
			  PAD_CTL_DRV_3_3V);
	mxc_iomux_set_pad(MX35_PIN_ATA_IORDY, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_INTRQ, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_CS0, ata_ctl_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_CS1, ata_ctl_pad_cfg);

	mxc_iomux_set_pad(MX35_PIN_ATA_DATA0, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA1, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA2, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA3, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA4, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA5, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA6, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA7, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA8, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA9, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA10, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA11, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA12, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA13, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA14, ata_dat_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DATA15, ata_dat_pad_cfg);

	mxc_iomux_set_pad(MX35_PIN_ATA_DA0, ata_ctl_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DA1, ata_ctl_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_DA2, ata_ctl_pad_cfg);
	mxc_iomux_set_pad(MX35_PIN_ATA_BUFF_EN, ata_ctl_pad_cfg);
}

Esempio n. 19

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File: mx35_3stack_gpio.c Progetto: R0-Developers/YP-R0_Kernel

void gpio_fec_active(void)
{
	mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC);

#define FEC_PAD_CTL_COMMON (PAD_CTL_DRV_3_3V|PAD_CTL_PUE_PUD| \
			PAD_CTL_ODE_CMOS|PAD_CTL_DRV_NORMAL|PAD_CTL_SRE_SLOW)
	mxc_iomux_set_pad(MX35_PIN_FEC_TX_CLK, FEC_PAD_CTL_COMMON |
			  PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE |
			  PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RX_CLK,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RX_DV,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_COL,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA0,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA0,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TX_EN,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_MDC,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_MDIO,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_22K_PU);
	mxc_iomux_set_pad(MX35_PIN_FEC_TX_ERR,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RX_ERR,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_CRS,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA1,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA1,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA2,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA2,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA3,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA3,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
#undef FEC_PAD_CTL_COMMON

	/* FEC enable */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 2, 1);
	/* FEC reset */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 7, 0);
	msleep(10);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 7, 1);
	msleep(100);
}

Esempio n. 20

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File: mach-mx35_3ds.c Progetto: Angor00/linux-aura-hd-android-2.6.35.3

static void adv7180_pwdn(int pwdn)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 1, ~pwdn);
}

Esempio n. 21

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File: mach-mx35_3ds.c Progetto: Angor00/linux-aura-hd-android-2.6.35.3

static void si4702_clock_ctl(int flag)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 7, flag);
}

Esempio n. 22

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/*
 * This function will register the snd_soc_pcm_link drivers.
 * It also registers devices for platform DMA, I2S, SSP and registers an
 * I2C driver to probe the codec.
 */
static int __init imx_3stack_ak4647_probe(struct platform_device *pdev)
{
	struct snd_soc_machine *machine;
	struct mxc_audio_platform_data *dev_data = pdev->dev.platform_data;
	struct snd_soc_pcm_link *hifi;
	const char *ssi_port;
	int ret;

	machine = kzalloc(sizeof(struct snd_soc_machine), GFP_KERNEL);
	if (machine == NULL)
		return -ENOMEM;

	machine->owner = THIS_MODULE;
	machine->pdev = pdev;
	machine->name = "imx_3stack";
	machine->longname = "ak4647";
	machine->ops = &imx_3stack_mach_ops;
	pdev->dev.driver_data = machine;

	/* register card */
	imx_3stack_mach = machine;
	ret =
	    snd_soc_new_card(machine, 1, SNDRV_DEFAULT_IDX1,
			     SNDRV_DEFAULT_STR1);
	if (ret < 0) {
		pr_err("%s: failed to create stereo sound card\n", __func__);
		goto err;
	}

	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 1, 0);
	msleep(1);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_2, 1, 1);

	/* imx_3stack ak4647 hifi interface */
	if (dev_data->src_port == 1)
		ssi_port = imx_ssi_1;
	else
		ssi_port = imx_ssi_3;
	hifi =
	    snd_soc_pcm_link_new(machine,
				 "imx_3stack-hifi", &hifi_pcm,
				 imx_pcm, ak4647_codec,
				 ak4647_hifi_dai, ssi_port);
	if (hifi == NULL) {
		pr_err("Failed to create HiFi PCM link\n");
		goto err;
	}
	ret = snd_soc_pcm_link_attach(hifi);
	hifi->private_data = dev_data;
	if (ret < 0)
		goto link_err;

	/* Configure audio port 3 */
	gpio_activate_audio_ports();

	if (request_irq
	    (dev_data->intr_id_hp, imx_headphone_detect_handler, 0,
	     "headphone", machine))
		goto link_err;

	ret = driver_create_file(pdev->dev.driver, &driver_attr_headphone);
	if (ret < 0)
		goto sysfs_err;

	return ret;

      sysfs_err:
	driver_remove_file(pdev->dev.driver, &driver_attr_headphone);
      link_err:
	snd_soc_machine_free(machine);
      err:
	kfree(machine);
	return ret;
}

Esempio n. 23

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

void gpio_fec_active(void)
{
	mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC);
	mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC);

#define FEC_PAD_CTL_COMMON (PAD_CTL_DRV_3_3V|PAD_CTL_PUE_PUD| \
			PAD_CTL_ODE_CMOS|PAD_CTL_DRV_NORMAL|PAD_CTL_SRE_SLOW)
	mxc_iomux_set_pad(MX35_PIN_FEC_TX_CLK, FEC_PAD_CTL_COMMON |
			  PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE |
			  PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RX_CLK,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RX_DV,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_COL,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA0,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA0,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TX_EN,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_MDC,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_MDIO,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_22K_PU);
	mxc_iomux_set_pad(MX35_PIN_FEC_TX_ERR,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RX_ERR,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_CRS,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA1,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA1,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA2,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA2,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_RDATA3,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_SCHMITZ |
			  PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PD);
	mxc_iomux_set_pad(MX35_PIN_FEC_TDATA3,
			  FEC_PAD_CTL_COMMON | PAD_CTL_HYS_CMOS |
			  PAD_CTL_PKE_NONE | PAD_CTL_100K_PD);
#undef FEC_PAD_CTL_COMMON
	/* Pull GPIO1_5 to be high for routing signal to FEC */
	if (board_is_mx35(BOARD_REV_2)) {
		mxc_request_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO);
		mxc_iomux_set_pad(MX35_PIN_COMPARE, PAD_CTL_DRV_NORMAL |
				PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU |
				PAD_CTL_DRV_3_3V | PAD_CTL_PUE_PUD |
				PAD_CTL_SRE_SLOW);
		mxc_set_gpio_direction(MX35_PIN_COMPARE, 0);
		mxc_set_gpio_dataout(MX35_PIN_COMPARE, 1);
	}

	/* FEC enable */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 2, 1);
	/* FEC reset */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 7, 0);
	msleep(10);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 7, 1);
	msleep(100);
}

Esempio n. 24

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File: mx35_3stack.c Progetto: twobob/KK_kernel

static void mxc_unifi_hardreset(void)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 1, 0);
	msleep(100);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 1, 1);
}

Esempio n. 25

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File: mx35_3stack.c Progetto: vasubabu/kernel

static void bt_reset(void)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 2, 0);
	msleep(5);
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 2, 1);
}

Esempio n. 26

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File: mx35_3stack.c Progetto: vasubabu/kernel

static void mxc_unifi_hardreset(int pin_level)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_RESET_1, 1, pin_level & 0x01);
}

Esempio n. 27

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File: mx35_3stack_gpio.c Progetto: traveller42/linux-2.6.28.mx233-falconwing

/*!
 * Setup GPIO for SDHC to be active
 *
 * @param module SDHC module number
 */
void gpio_sdhc_active(int module)
{
	unsigned int pad_val;

	switch (module) {
	case 0:
		mxc_request_iomux(MX35_PIN_SD1_CLK,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD1_CMD,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD1_DATA0,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD1_DATA1,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD1_DATA2,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD1_DATA3,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE)
#else
		/* MUX4_CTR , 0: SD2 to WIFI, 1:SD2 to SD1 8bit */
		if (board_is_mx35(BOARD_REV_2))
			pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2,
					      7, 1);
		mxc_request_iomux(MX35_PIN_SD2_CMD,
				  MUX_CONFIG_ALT2 | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_CLK,
				  MUX_CONFIG_ALT2 | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_DATA0,
				  MUX_CONFIG_ALT2 | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_DATA1,
				  MUX_CONFIG_ALT2 | MUX_CONFIG_SION);
#endif

		pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE |
		    PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX |
		    PAD_CTL_47K_PU | PAD_CTL_SRE_FAST;
		mxc_iomux_set_pad(MX35_PIN_SD1_CMD, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD1_DATA0, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD1_DATA1, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD1_DATA2, pad_val);
		pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE |
		    PAD_CTL_DRV_MAX | PAD_CTL_47K_PU | PAD_CTL_SRE_FAST;
		mxc_iomux_set_pad(MX35_PIN_SD1_CLK, pad_val);
		pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE |
		    PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX |
		    PAD_CTL_100K_PU | PAD_CTL_SRE_FAST;
		mxc_iomux_set_pad(MX35_PIN_SD1_DATA3, pad_val);
#if defined(CONFIG_SDIO_UNIFI_FS) || defined(CONFIG_SDIO_UNIFI_FS_MODULE)
#else
		pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE |
		    PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX |
		    PAD_CTL_47K_PU | PAD_CTL_SRE_FAST;
		mxc_iomux_set_pad(MX35_PIN_SD2_CMD, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD2_DATA1, pad_val);
		pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE |
		    PAD_CTL_DRV_MAX | PAD_CTL_47K_PU | PAD_CTL_SRE_FAST;
		mxc_iomux_set_pad(MX35_PIN_SD2_CLK, pad_val);
#endif
		break;
	case 1:
		/* MUX4_CTR , 0: SD2 to WIFI, 1:SD2 to SD1 8bit */
		if (board_is_mx35(BOARD_REV_2))
			pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2,
					      7, 0);
		mxc_request_iomux(MX35_PIN_SD2_CLK,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_CMD,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_DATA0,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_DATA1,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_DATA2,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);
		mxc_request_iomux(MX35_PIN_SD2_DATA3,
				  MUX_CONFIG_FUNC | MUX_CONFIG_SION);

		pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE |
		    PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX |
		    PAD_CTL_47K_PU | PAD_CTL_SRE_FAST;

		mxc_iomux_set_pad(MX35_PIN_SD2_CLK, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD2_CMD, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD2_DATA0, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD2_DATA1, pad_val);
		mxc_iomux_set_pad(MX35_PIN_SD2_DATA2, pad_val);

		pad_val = PAD_CTL_PUE_PUD | PAD_CTL_PKE_ENABLE |
		    PAD_CTL_HYS_SCHMITZ | PAD_CTL_DRV_MAX |
		    PAD_CTL_100K_PU | PAD_CTL_SRE_FAST;

		mxc_iomux_set_pad(MX35_PIN_SD2_DATA3, pad_val);
		break;
	default:
		break;
	}
}

Esempio n. 28

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File: mx35_3stack_gpio.c Progetto: R0-Developers/YP-R0_Kernel

/*!
 * This function disable GPS GPIO
 */
void gpio_gps_inactive(void)
{
	/* GPS disable */
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_2, 0, 0);
}

Esempio n. 29

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File: mx35_3stack.c Progetto: vasubabu/kernel

static int mxc_ak4647_amp_enable(int enable)
{
	pmic_gpio_set_bit_val(MCU_GPIO_REG_GPIO_CONTROL_1, 0, enable);
	return 0;
}