static void lpc47b397_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
/* dump_pnp_device(dev); */
pnp_exit_conf_state(dev);
}
static void f81865f_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
(dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
pnp_exit_conf_state(dev);
}
static void lpc47m10x_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, !!dev->enabled);
pnp_exit_conf_state(dev);
}
void sch4037_early_init(unsigned port)
{
pnp_devfn_t dev;
dev = PNP_DEV(port, SMSCSUPERIO_SP1);
pnp_enter_conf_state(dev);
/* Auto power management */
pnp_write_config(dev, 0x22, 0x38); /* BIT3+BIT4+BIT5 */
pnp_write_config(dev, 0x23, 0);
/* Enable SMSC UART 0 */
dev = PNP_DEV(port, SMSCSUPERIO_SP1);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
pnp_set_irq(dev, PNP_IDX_IRQ0, 0x4);
/* Enabled High speed, disabled MIDI support. */
pnp_write_config(dev, 0xF0, 0x02);
pnp_set_enable(dev, 1);
/* Enable keyboard */
dev = PNP_DEV(port, SCH4037_KBC);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_irq(dev, 0x70, 1); /* IRQ 1 */
pnp_set_irq(dev, 0x72, 12); /* IRQ 12 */
pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
}
/**
* Configure the specified Super I/O device with the resources (I/O space,
* etc.) that have been allocate for it.
*
* NOTE: Cannot use pnp_set_resources() here because it assumes chip
* support for logical devices, which the LPC47N227 doesn't have.
*
* @param dev Pointer to structure describing a Super I/O device.
*/
void lpc47n227_pnp_set_resources(struct device *dev)
{
struct resource *res;
pnp_enter_conf_state(dev);
for (res = dev->resource_list; res; res = res->next)
lpc47n227_pnp_set_resource(dev, res);
pnp_exit_conf_state(dev);
}
/*
* Function: lpc47b272_enable_serial
* Parameters: dev - high 8 bits = Super I/O port,
* low 8 bits = logical device number (per lpc47b272.h)
* iobase - processor I/O port address to assign to this serial device
* Return Value: bool
* Description: Configure the base I/O port of the specified serial device
* and enable the serial device.
*/
static void lpc47b272_enable_serial(device_t dev, unsigned iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
}
void lpc47n227_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
// NOTE: Cannot use pnp_enable_resources() here because it assumes chip
// support for logical devices, which the LPC47N227 doesn't have
lpc47n227_pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
}
/**
* Configure the specified Super I/O device with the resources (I/O space,
* etc.) that have been allocate for it.
*
* NOTE: Cannot use pnp_set_resources() here because it assumes chip
* support for logical devices, which the LPC47N217 doesn't have.
*
* @param dev Pointer to structure describing a Super I/O device.
*/
static void lpc47n217_pnp_set_resources(device_t dev)
{
struct resource *res;
pnp_enter_conf_state(dev);
for (res = dev->resource_list; res; res = res->next)
lpc47n217_pnp_set_resource(dev, res);
/* dump_pnp_device(dev); */
pnp_exit_conf_state(dev);
}
static void wilco_ec_serial_init(void)
{
pnp_devfn_t dev = PNP_DEV(PNP_CFG_IDX, PNP_LDN_SERIAL);
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 1);
pnp_set_iobase(dev, PNP_IDX_IO1, cpu_to_be16(CONFIG_TTYS0_BASE));
pnp_write_config(dev, PNP_IDX_IO0, 1);
pnp_exit_conf_state(dev);
}
//----------------------------------------------------------------------------------
// Function: lpc47n227_pnp_set_resources
// Parameters: dev - pointer to structure describing a Super I/O device
// Return Value: None
// Description: Configure the specified Super I/O device with the resources
// (I/O space, etc.) that have been allocate for it.
//
void lpc47n227_pnp_set_resources(device_t dev)
{
struct resource *res;
pnp_enter_conf_state(dev);
// NOTE: Cannot use pnp_set_resources() here because it assumes chip
// support for logical devices, which the LPC47N227 doesn't have
for (res = dev->resource_list; res; res = res->next)
lpc47n227_pnp_set_resource(dev, res);
pnp_exit_conf_state(dev);
}
static void write_GPIO(void)
{
pnp_enter_conf_state(GPIO1_DEV);
pnp_set_logical_device(GPIO1_DEV);
pnp_write_config(GPIO1_DEV, 0x30, 0x01);
pnp_write_config(GPIO1_DEV, 0x60, 0x00);
pnp_write_config(GPIO1_DEV, 0x61, 0x00);
pnp_write_config(GPIO1_DEV, 0x62, 0x00);
pnp_write_config(GPIO1_DEV, 0x63, 0x00);
pnp_write_config(GPIO1_DEV, 0x70, 0x00);
pnp_write_config(GPIO1_DEV, 0xf0, 0xff);
pnp_write_config(GPIO1_DEV, 0xf1, 0xff);
pnp_write_config(GPIO1_DEV, 0xf2, 0x00);
pnp_exit_conf_state(GPIO1_DEV);
pnp_enter_conf_state(GPIO2_DEV);
pnp_set_logical_device(GPIO2_DEV);
pnp_write_config(GPIO2_DEV, 0x30, 0x01);
pnp_write_config(GPIO2_DEV, 0xf0, 0xef);
pnp_write_config(GPIO2_DEV, 0xf1, 0xff);
pnp_write_config(GPIO2_DEV, 0xf2, 0x00);
pnp_write_config(GPIO2_DEV, 0xf3, 0x00);
pnp_write_config(GPIO2_DEV, 0xf5, 0x48);
pnp_write_config(GPIO2_DEV, 0xf6, 0x00);
pnp_write_config(GPIO2_DEV, 0xf7, 0xc0);
pnp_exit_conf_state(GPIO2_DEV);
pnp_enter_conf_state(GPIO3_DEV);
pnp_set_logical_device(GPIO3_DEV);
pnp_write_config(GPIO3_DEV, 0x30, 0x00);
pnp_write_config(GPIO3_DEV, 0xf0, 0xff);
pnp_write_config(GPIO3_DEV, 0xf1, 0xff);
pnp_write_config(GPIO3_DEV, 0xf2, 0xff);
pnp_write_config(GPIO3_DEV, 0xf3, 0x40);
pnp_exit_conf_state(GPIO3_DEV);
}
static void lpc47b397_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
switch(dev->path.pnp.device) {
case LPC47B397_HWM:
printk(BIOS_DEBUG, "LPC47B397 SensorBus register access enabled\n");
pnp_set_logical_device(dev);
enable_hwm_smbus(dev);
break;
}
/* dump_pnp_device(dev); */
pnp_exit_conf_state(dev);
}
void lpc47n227_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
// NOTE: Cannot use pnp_set_enable() here because it assumes chip
// support for logical devices, which the LPC47N227 doesn't have
if (dev->enabled) {
lpc47n227_pnp_set_enable(dev, 1);
} else {
lpc47n227_pnp_set_enable(dev, 0);
}
pnp_exit_conf_state(dev);
}
static inline void kbc1100_early_init(unsigned port)
{
device_t dev;
dev = PNP_DEV (port, KBC1100_KBC);
pnp_enter_conf_state(dev);
/* Serial IRQ enabled */
outb(0x25, port);
outb(0x04, port + 1);
/* Enable SMSC UART 0 */
dev = PNP_DEV (port, SMSCSUPERIO_SP1);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
pnp_set_enable(dev, 1);
/* Enable keyboard */
dev = PNP_DEV (port, KBC1100_KBC);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, 0x60);
pnp_set_iobase(dev, PNP_IDX_IO1, 0x64);
pnp_set_irq(dev, 0x70, 1); /* IRQ 1 */
pnp_set_irq(dev, 0x72, 12); /* IRQ 12 */
pnp_set_enable(dev, 1);
/* Enable EC Channel 0 */
dev = PNP_DEV (port, KBC1100_EC0);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
/* disable the 1s timer */
outb(0xE7, 0x64);
}
static void f71889_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
pnp_exit_conf_state(dev);
}
static void lpc47m10x_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
pnp_exit_conf_state(dev);
}
/*
* NOTE: Cannot use pnp_set_enable() here because it assumes chip
* support for logical devices, which the LPC47N227 doesn't have.
*/
void lpc47n227_pnp_enable(struct device *dev)
{
pnp_enter_conf_state(dev);
lpc47n227_pnp_set_enable(dev, !!dev->enabled);
pnp_exit_conf_state(dev);
}
/*
* NOTE: Cannot use pnp_enable_resources() here because it assumes chip
* support for logical devices, which the LPC47N227 doesn't have.
*/
void lpc47n227_pnp_enable_resources(struct device *dev)
{
pnp_enter_conf_state(dev);
lpc47n227_pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
}
static void lpc47m15x_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
pnp_exit_conf_state(dev);
}
/*
* NOTE: Cannot use pnp_set_enable() here because it assumes chip
* support for logical devices, which the LPC47N217 doesn't have.
*/
static void lpc47n217_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
lpc47n217_pnp_set_enable(dev, !!dev->enabled);
pnp_exit_conf_state(dev);
}
/*
* NOTE: Cannot use pnp_enable_resources() here because it assumes chip
* support for logical devices, which the LPC47N217 doesn't have.
*/
static void lpc47n217_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
lpc47n217_pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
}
static void f71859_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
pnp_exit_conf_state(dev);
}
