Esempio n. 1
0
void vPortEnterCritical( void )
{
	portDISABLE_INTERRUPTS();
	uxCriticalNesting++;
}
Esempio n. 2
0
signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait )
{
signed portBASE_TYPE xReturn;

	/* If the queue is already empty we may have to block.  A critical section
	is required to prevent an interrupt adding something to the queue
	between the check to see if the queue is empty and blocking on the queue. */
	portDISABLE_INTERRUPTS();
	{
		if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 )
		{
			/* There are no messages in the queue, do we want to block or just
			leave with nothing? */			
			if( xTicksToWait > ( portTickType ) 0 )
			{
				/* As this is a co-routine we cannot block directly, but return
				indicating that we need to block. */
				vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
				portENABLE_INTERRUPTS();
				return errQUEUE_BLOCKED;
			}
			else
			{
				portENABLE_INTERRUPTS();
				return errQUEUE_FULL;
			}
		}
	}
	portENABLE_INTERRUPTS();

	portNOP();

	portDISABLE_INTERRUPTS();
	{
		if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
		{
			/* Data is available from the queue. */
			pxQueue->pcReadFrom += pxQueue->uxItemSize;
			if( pxQueue->pcReadFrom >= pxQueue->pcTail )
			{
				pxQueue->pcReadFrom = pxQueue->pcHead;
			}
			--( pxQueue->uxMessagesWaiting );
			memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize );

			xReturn = pdPASS;

			/* Were any co-routines waiting for space to become available? */
			if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) )
			{
				/* In this instance the co-routine could be placed directly
				into the ready list as we are within a critical section.
				Instead the same pending ready list mechanism is used as if
				the event were caused from within an interrupt. */
				if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
				{
					xReturn = errQUEUE_YIELD;
				}
			}	
		}
		else
		{
			xReturn = pdFAIL;
		}
	}
	portENABLE_INTERRUPTS();

	return xReturn;
}
Esempio n. 3
0
/* Setup the timer to generate the tick interrupts. */
static void prvSetupTimerInterrupt(void)
{
#if( configTICK_USE_TC==1 )

	volatile avr32_tc_t *tc = &AVR32_TC;

	// Options for waveform genration.
	tc_waveform_opt_t waveform_opt =
	{
	.channel  = configTICK_TC_CHANNEL,             /* Channel selection. */

	.bswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOB. */
	.beevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOB. */
	.bcpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOB. */
	.bcpb     = TC_EVT_EFFECT_NOOP,                /* RB compare effect on TIOB. */

	.aswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOA. */
	.aeevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOA. */
	.acpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOA: toggle. */
	.acpa     = TC_EVT_EFFECT_NOOP,                /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */

	.wavsel   = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
	.enetrg   = FALSE,                             /* External event trigger enable. */
	.eevt     = 0,                                 /* External event selection. */
	.eevtedg  = TC_SEL_NO_EDGE,                    /* External event edge selection. */
	.cpcdis   = FALSE,                             /* Counter disable when RC compare. */
	.cpcstop  = FALSE,                             /* Counter clock stopped with RC compare. */

	.burst    = FALSE,                             /* Burst signal selection. */
	.clki     = FALSE,                             /* Clock inversion. */
	.tcclks   = TC_CLOCK_SOURCE_TC2                /* Internal source clock 2. */
	};

	tc_interrupt_t tc_interrupt =
	{
		.etrgs=0,
		.ldrbs=0,
		.ldras=0,
		.cpcs =1,
		.cpbs =0,
		.cpas =0,
		.lovrs=0,
		.covfs=0,
	};

#endif

	/* Disable all interrupt/exception. */
	portDISABLE_INTERRUPTS();

	/* Register the compare interrupt handler to the interrupt controller and
	enable the compare interrupt. */

	#if( configTICK_USE_TC==1 )
	{
		INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);

		/* Initialize the timer/counter. */
		tc_init_waveform(tc, &waveform_opt);

		/* Set the compare triggers.
		Remember TC counter is 16-bits, so counting second is not possible!
		That's why we configure it to count ms. */
		tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );

		tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );

		/* Start the timer/counter. */
		tc_start(tc, configTICK_TC_CHANNEL);
	}
	#else
	{
		INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
		prvScheduleFirstTick();
	}
	#endif
}
Esempio n. 4
0
unsigned char __low_level_init(void)
{
unsigned char resetflag = RESF;
unsigned char psval = 0;

	/* Setup provided by NEC. */

	/* Disable global interrupts to ensure no interrupts occur during system
	setup. */
	portDISABLE_INTERRUPTS();

	PRCMD = 0x00;
	OCDM = 0x00;
	VSWC = 0x12;
	VSWC = 18;

	/* Set main system clock */
	OSTS = 0x06;
	psval = 0x80;
	PRCMD = psval;
	PCC = psval;
	while (!OSTC)
	{
		;
	}

	PLLS = 0x03;
	PLLON = 1;
	while (LOCKR)
	{
		;
	}

	psval = 0x01;
	PRCMD = psval;
	MCM = psval;
	SELPLL = 1;

	/* Set fCPU */
	psval = PCC | 0x00;
	PRCMD = psval;
	PCC = psval;
	RCM = 0x83;

	/* Set fXP1 */
	SELCNT4 = 0x00;

	/* Set fBRG */
	PRSM0 = 0x00;

	/* Stand-by setting */
	psval = 0x00;
	PRCMD = psval;
	PSC = psval;

	/* WDT2 setting */
	WDTM2 = 0x1F;

	/* PCL setting */
	PCLM = 0x00;

	/* disable dma0 - dma3 */
	E00 = 0;	
	E11 = 0;
	E22 = 0;
	E33 = 0;	

	return pdTRUE;
}
Esempio n. 5
0
signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait )
{
signed portBASE_TYPE xReturn;
		
	/* If the queue is already full we may have to block.  A critical section
	is required to prevent an interrupt removing something from the queue
	between the check to see if the queue is full and blocking on the queue. */
	portDISABLE_INTERRUPTS();
	{
		if( prvIsQueueFull( pxQueue ) )
		{
			/* The queue is full - do we want to block or just leave without
			posting? */
			if( xTicksToWait > ( portTickType ) 0 )
			{
				/* As this is called from a coroutine we cannot block directly, but
				return indicating that we need to block. */
				vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );				
				portENABLE_INTERRUPTS();
				return errQUEUE_BLOCKED;
			}
			else
			{
				portENABLE_INTERRUPTS();
				return errQUEUE_FULL;
			}
		}
	}
	portENABLE_INTERRUPTS();
		
	portNOP();

	portDISABLE_INTERRUPTS();
	{
		if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
		{
			/* There is room in the queue, copy the data into the queue. */			
			prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
			xReturn = pdPASS;

			/* Were any co-routines waiting for data to become available? */
			if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) )
			{
				/* In this instance the co-routine could be placed directly
				into the ready list as we are within a critical section.
				Instead the same pending ready list mechanism is used as if
				the event were caused from within an interrupt. */
				if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
				{
					/* The co-routine waiting has a higher priority so record
					that a yield might be appropriate. */
					xReturn = errQUEUE_YIELD;
				}
			}
		}
		else
		{
			xReturn = errQUEUE_FULL;
		}
	}
	portENABLE_INTERRUPTS();

	return xReturn;
}
Esempio n. 6
0
void timer_clear_ppm(void)
{
  portDISABLE_INTERRUPTS();
  g_ppm_state.sample_len = 0;
  portENABLE_INTERRUPTS();
}
Esempio n. 7
0
File: main.c Progetto: Eclo/FreeRTOS
int __low_level_init(void)
{
unsigned char ucResetFlag = RESF;

	portDISABLE_INTERRUPTS();

	/* Clock Configuration:
	In this port, to use the internal high speed clock source of the
	microcontroller, define the configCLOCK_SOURCE as 1 in FreeRTOSConfig.h.  To
	use an external	clock define configCLOCK_SOURCE as 0. */
	#if configCLOCK_SOURCE == 1
	{
		/* Set fMX */
		CMC = 0x00;
		MSTOP = 1U;

		/* Set fMAIN */
		MCM0 = 0U;

		/* Set fSUB */
		XTSTOP = 1U;
		OSMC = 0x10;

		/* Set fCLK */
		CSS = 0U;

		/* Set fIH */
		HIOSTOP = 0U;
	}
	#else
	{
		unsigned char ucTempStabset, ucTempStabWait;

		/* Set fMX */
		CMC = 0x41;
		OSTS = 0x07;
		MSTOP = 0U;
		ucTempStabset = 0xFF;

		do
		{
			ucTempStabWait = OSTC;
			ucTempStabWait &= ucTempStabset;
		}
		while( ucTempStabWait != ucTempStabset );

		/* Set fMAIN */
		MCM0 = 1U;

		/* Set fSUB */
		XTSTOP = 1U;
		OSMC = 0x10;

		/* Set fCLK */
		CSS = 0U;

		/* Set fIH */
		HIOSTOP = 0U;
	}
	#endif /* configCLOCK_SOURCE == 1 */

	/* LED port initialization - set port register. */
	P7 &= 0x7F;

	/* Set port mode register. */
	PM7 &= 0x7F;

	/* Switch pin initialization - enable pull-up resistor. */
	PU12_bit.no0  = 1;

	return pdTRUE;
}
Esempio n. 8
0
void vApplicationMallocFailedHook( void )
{
	  portDISABLE_INTERRUPTS();

	  while(1);
}
Esempio n. 9
0
File: port.c Progetto: fmorel/SoC
/* Critical section management. */
void vPortEnterCritical( void )
{
	/* Port Disable Interrupts */
	portDISABLE_INTERRUPTS();
	uxCriticalNesting++;
}
Esempio n. 10
0
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
    /*
     * Implementation note:
     *
     * To help debugging the option configUSE_TICKLESS_IDLE_SIMPLE_DEBUG was presented.
     * This option would make sure that even if program execution was stopped inside
     * this function no more than expected number of ticks would be skipped.
     *
     * Normally RTC works all the time even if firmware execution was stopped
     * and that may lead to skipping too much of ticks.
     */
    TickType_t enterTime;

    /* Make sure the SysTick reload value does not overflow the counter. */
    if ( xExpectedIdleTime > portNRF_RTC_MAXTICKS - configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
    {
        xExpectedIdleTime = portNRF_RTC_MAXTICKS - configEXPECTED_IDLE_TIME_BEFORE_SLEEP;
    }
    /* Block the scheduler now */
    portDISABLE_INTERRUPTS();

    /* Configure CTC interrupt */
    enterTime = nrf_rtc_counter_get(portNRF_RTC_REG);

    if ( eTaskConfirmSleepModeStatus() == eAbortSleep )
    {
        portENABLE_INTERRUPTS();
    }
    else
    {
        TickType_t xModifiableIdleTime;
        TickType_t wakeupTime = (enterTime + xExpectedIdleTime) & portNRF_RTC_MAXTICKS;

        /* Stop tick events */
        nrf_rtc_int_disable(portNRF_RTC_REG, NRF_RTC_INT_TICK_MASK);

        /* Configure CTC interrupt */
        nrf_rtc_cc_set(portNRF_RTC_REG, 0, wakeupTime);
        nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
        nrf_rtc_int_enable(portNRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);

        __DSB();

        /* Sleep until something happens.  configPRE_SLEEP_PROCESSING() can
         * set its parameter to 0 to indicate that its implementation contains
         * its own wait for interrupt or wait for event instruction, and so wfi
         * should not be executed again.  However, the original expected idle
         * time variable must remain unmodified, so a copy is taken. */
        xModifiableIdleTime = xExpectedIdleTime;
        configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
        if ( xModifiableIdleTime > 0 )
        {
#ifdef SOFTDEVICE_PRESENT
            sd_app_evt_wait();
#else
            do{
                __WFE();
            } while (0 == (NVIC->ISPR[0]));
#endif
        }
        configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
        nrf_rtc_int_disable(portNRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
        portENABLE_INTERRUPTS();

        /* Correct the system ticks */
        portENTER_CRITICAL();
        {
            TickType_t diff;
            TickType_t hwTicks     = nrf_rtc_counter_get(portNRF_RTC_REG);
            nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_TICK);
            nrf_rtc_int_enable (portNRF_RTC_REG, NRF_RTC_INT_TICK_MASK);

            if(enterTime > hwTicks)
            {
                hwTicks += portNRF_RTC_MAXTICKS + 1U;
            }

            diff = (hwTicks - enterTime);
            if((configUSE_TICKLESS_IDLE_SIMPLE_DEBUG) && (diff > xExpectedIdleTime))
            {
                diff = xExpectedIdleTime;
            }

            if (diff > 0)
            {
                vTaskStepTick(diff);
            }
        }
        portEXIT_CRITICAL();
    }
}
Esempio n. 11
0
File: main.c Progetto: Eclo/FreeRTOS
int __low_level_init(void)
{
unsigned char ucResetFlag = RESF;

	portDISABLE_INTERRUPTS();

	/* Clock Configuration:
	In this port, to use the internal high speed clock source of the microcontroller
	define the configCLOCK_SOURCE as 1 in FreeRTOSConfig.h.  To use an external
	clock define configCLOCK_SOURCE as 0. */
	#if configCLOCK_SOURCE == 1
	{
		/* Set XT1 and XT2 in Input Port Mode
		   Set X1  and X2  in Input Port Mode
		   High speed oscillator frequency 2MHz <= fMX <= 10MHz */
		CMC = 0x00;

		/* X1 external oszillation stopped. */
		MSTOP = 1;

		/* Enable internal high speed oszillation. */
		HIOSTOP = 0;
		MCM0 = 0;

		/* Stop internal subsystem clock. */
		XTSTOP = 1;

		/* Set clock speed. */
		CSS = 0;
		CKC &= (unsigned char)~0x07;
		CKC |= 0x00;
	}
	#else
	{
		/* XT1 and XT2 pin in input port mode
		   X1  and X2  pin in crystal resonator mode
		   High speed oszillation frequency 10MHz < fMX <= 20MHz */
		CMC   = 0x41;
		
		/* Set oscillation stabilization time. */
		OSTS  = 0x07;
		
		/* Set speed mode: fMX > 10MHz for Flash memory high speed operation. */
		OSMC  = 0x01;
		
		/* Start up X1 oscillator operation
		   Internal high-speed oscillator operating. */
		MSTOP = 0;
		
		/* Check oscillation stabilization time status. */
		while(OSTC < 0x07)
		{
			/* Wait until X1 clock stabilization time. */
			portNOP();
		}
		
		/* Switch CPU clock to X1 oscillator. */
		MCM0 = 1;
		while(MCS != 1)
		{
			/* Wait until CPU and peripherals operate with fX1 clock. */
			portNOP();
		}

		/* Stop the internal high-speed oscillator operation. */
		HIOSTOP = 1;
		
		/* Stop the XT1 oscillator operation. */
		XTSTOP  = 1;
		
		/* Operating frequency f = fx
		   Change clock generator setting, if necessary. */
		CKC &= 0xF8;

		/* From here onwards the X1 oscillator is supplied to the CPU. */
	}
	#endif
	
	/* LED port initialization - set port register. */
	P7  = 0x80;
	
	/* Set port mode register. */
	PM7 = 0x3F;
	
	/* Switch pin initialization - enable pull-up resistor. */
	PU12_bit.no0  = 1;

	/* INTP0 is used by the button on the target board. */
	
	/* INTP0 disable. */
	PMK0 = 1;			
	
	/* INTP0 IF clear. */
	PIF0 = 0;			
	EGN0_bit.no0  = 1;
	
	/* INTP0 priority low. */
	PPR10 = 0;
	PPR00 = 1;
	
	/* Enable ext. INTP0 interrupt */
	PMK0  = 0;	

	return pdTRUE;
}
Esempio n. 12
0
void Console_SingleMode()
{
	portDISABLE_INTERRUPTS();
	// FIXME switch over stdio output
}