static void ppc_exc_initialize_booke(void)
{
  /* Interupt vector prefix register */
  MTIVPR(ppc_exc_vector_base);

  if (ppc_cpu_is(PPC_e200z0) || ppc_cpu_is(PPC_e200z1)) {
    /*
     * These cores have hard wired IVOR registers.  An access will case a
     * program exception.
     */
    return;
  }

  /* Interupt vector offset registers */
  MTIVOR(0,  ppc_exc_vector_address(ASM_BOOKE_CRIT_VECTOR));
  MTIVOR(1,  ppc_exc_vector_address(ASM_MACH_VECTOR));
  MTIVOR(2,  ppc_exc_vector_address(ASM_PROT_VECTOR));
  MTIVOR(3,  ppc_exc_vector_address(ASM_ISI_VECTOR));
  MTIVOR(4,  ppc_exc_vector_address(ASM_EXT_VECTOR));
  MTIVOR(5,  ppc_exc_vector_address(ASM_ALIGN_VECTOR));
  MTIVOR(6,  ppc_exc_vector_address(ASM_PROG_VECTOR));
  MTIVOR(7,  ppc_exc_vector_address(ASM_FLOAT_VECTOR));
  MTIVOR(8,  ppc_exc_vector_address(ASM_SYS_VECTOR));
  MTIVOR(9,  ppc_exc_vector_address(ASM_BOOKE_APU_VECTOR));
  MTIVOR(10, ppc_exc_vector_address(ASM_BOOKE_DEC_VECTOR));
  MTIVOR(11, ppc_exc_vector_address(ASM_BOOKE_FIT_VECTOR));
  MTIVOR(12, ppc_exc_vector_address(ASM_BOOKE_WDOG_VECTOR));
  MTIVOR(13, ppc_exc_vector_address(ASM_BOOKE_DTLBMISS_VECTOR));
  MTIVOR(14, ppc_exc_vector_address(ASM_BOOKE_ITLBMISS_VECTOR));
  MTIVOR(15, ppc_exc_vector_address(ASM_BOOKE_DEBUG_VECTOR));
  if (ppc_cpu_is_e200() || ppc_cpu_is_e500()) {
    MTIVOR(32, ppc_exc_vector_address(ASM_E500_SPE_UNAVAILABLE_VECTOR));
    MTIVOR(33, ppc_exc_vector_address(ASM_E500_EMB_FP_DATA_VECTOR));
    MTIVOR(34, ppc_exc_vector_address(ASM_E500_EMB_FP_ROUND_VECTOR));
  }
  if (ppc_cpu_is_e500()) {
    MTIVOR(35, ppc_exc_vector_address(ASM_E500_PERFMON_VECTOR));
  }
}
Esempio n. 2
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void *ppc_exc_vector_address(unsigned vector)
{
  uintptr_t vector_base = 0xfff00000;
  uintptr_t vector_offset = vector << 8;

  if (ppc_cpu_has_altivec()) {
    if (vector == ASM_60X_VEC_VECTOR) {
      vector_offset = ASM_60X_VEC_VECTOR_OFFSET;
    }
  }

  if (ppc_cpu_is(PPC_405)) {
    switch (vector) {
      case ASM_BOOKE_FIT_VECTOR:
        vector_offset = ASM_PPC405_FIT_VECTOR_OFFSET;
        break;
      case ASM_BOOKE_WDOG_VECTOR:
        vector_offset = ASM_PPC405_WDOG_VECTOR_OFFSET;
        break;
      case ASM_TRACE_VECTOR:
        vector_offset = ASM_PPC405_TRACE_VECTOR_OFFSET;
        break;
      case ASM_PPC405_APU_UNAVAIL_VECTOR:
        vector_offset = ASM_60X_VEC_VECTOR_OFFSET;
      default:
        break;
    }
  }

  if (
    ppc_cpu_is_bookE() == PPC_BOOKE_STD
      || ppc_cpu_is_bookE() == PPC_BOOKE_E500
  ) {
    if (vector < sizeof(ivor_values) / sizeof(ivor_values [0])) {
      vector_offset = ((uintptr_t) ivor_values [vector]) << 4;
    } else {
      vector_offset = 0;
    }
  }

  if (bsp_exceptions_in_RAM) {
    vector_base = ppc_exc_vector_base;
  }

  return (void *) (vector_base + vector_offset);
}