static void multigam_init_mapper02(running_machine *machine, UINT8* prg_base, int prg_size)
{
UINT8* mem = machine->region("maincpu")->base();
memcpy(mem + 0x8000, prg_base + prg_size - 0x8000, 0x8000);
memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, multigam3_mapper02_rom_switch_w );
multigam_mapper02_prg_base = prg_base;
multigam_mapper02_prg_size = prg_size;
ppu2c0x_set_scanline_callback(machine->device("ppu"), 0);
}
static void multigam_init_mapper02(running_machine &machine, UINT8* prg_base, int prg_size)
{
multigam_state *state = machine.driver_data<multigam_state>();
UINT8* mem = machine.region("maincpu")->base();
memcpy(mem + 0x8000, prg_base + prg_size - 0x8000, 0x8000);
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x8000, 0xffff, FUNC(multigam3_mapper02_rom_switch_w) );
state->m_mapper02_prg_base = prg_base;
state->m_mapper02_prg_size = prg_size;
ppu2c0x_set_scanline_callback(machine.device("ppu"), 0);
}
static WRITE8_HANDLER( multigam3_mmc3_rom_switch_w )
{
multigam_state *state = space->machine().driver_data<multigam_state>();
device_t *ppu = space->machine().device("ppu");
/* basically, a MMC3 mapper from the nes */
int bankmask = state->m_multigam3_mmc3_prg_size == 0x40000 ? 0x1f : 0x0f;
switch(offset & 0x7001)
{
case 0x0000:
state->m_multigam3_mmc3_command = data;
if (state->m_multigam3_mmc3_last_bank != (data & 0xc0))
{
int bank;
UINT8 *prg = space->machine().region("maincpu")->base();
/* reset the banks */
if (state->m_multigam3_mmc3_command & 0x40)
{
/* high bank */
bank = (state->m_multigam3_mmc3_banks[0] & bankmask) * 0x2000;
memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000);
memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000);
}
else
{
/* low bank */
bank = (state->m_multigam3_mmc3_banks[0] & bankmask) * 0x2000;
memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000);
memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000);
}
/* mid bank */
bank = (state->m_multigam3_mmc3_banks[1] & bankmask) * 0x2000;
memcpy(&prg[0x0a000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000);
state->m_multigam3_mmc3_last_bank = data & 0xc0;
}
break;
case 0x0001:
{
UINT8 cmd = state->m_multigam3_mmc3_command & 0x07;
int page = (state->m_multigam3_mmc3_command & 0x80) >> 5;
int bank;
switch (cmd)
{
case 0: /* char banking */
case 1: /* char banking */
data &= 0xfe;
page ^= (cmd << 1);
set_videorom_bank(space->machine(), page, 2, state->m_multigam3_mmc3_chr_bank_base + data, 1);
break;
case 2: /* char banking */
case 3: /* char banking */
case 4: /* char banking */
case 5: /* char banking */
page ^= cmd + 2;
set_videorom_bank(space->machine(), page, 1, state->m_multigam3_mmc3_chr_bank_base + data, 1);
break;
case 6: /* program banking */
{
UINT8 *prg = space->machine().region("maincpu")->base();
if (state->m_multigam3_mmc3_command & 0x40)
{
/* high bank */
state->m_multigam3_mmc3_banks[0] = data & bankmask;
bank = (state->m_multigam3_mmc3_banks[0]) * 0x2000;
memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000);
memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000);
}
else
{
/* low bank */
state->m_multigam3_mmc3_banks[0] = data & bankmask;
bank = (state->m_multigam3_mmc3_banks[0]) * 0x2000;
memcpy(&prg[0x08000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000);
memcpy(&prg[0x0c000], &state->m_multigam3_mmc3_prg_base[state->m_multigam3_mmc3_prg_size - 0x4000], 0x2000);
}
}
break;
case 7: /* program banking */
{
/* mid bank */
UINT8 *prg = space->machine().region("maincpu")->base();
state->m_multigam3_mmc3_banks[1] = data & bankmask;
bank = state->m_multigam3_mmc3_banks[1] * 0x2000;
memcpy(&prg[0x0a000], &state->m_multigam3_mmc3_prg_base[bank], 0x2000);
}
break;
}
}
break;
case 0x2000: /* mirroring */
if (!state->m_multigam3_mmc3_4screen)
{
if (data & 0x40)
set_mirroring(state, PPU_MIRROR_HIGH);
else
set_mirroring(state, (data & 1) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
}
break;
case 0x2001: /* enable ram at $6000 */
if (data & 0x80)
{
memory_set_bankptr(space->machine(), "bank10", state->m_multigmc_mmc3_6000_ram);
}
else
{
memory_set_bankptr(space->machine(), "bank10", space->machine().region("maincpu")->base() + 0x6000);
}
if (data & 0x40)
{
logerror("Write protect for 6000 enabled\n");
}
break;
case 0x4000: /* scanline counter */
state->m_multigam3_mmc3_scanline_counter = data;
break;
case 0x4001: /* scanline latch */
state->m_multigam3_mmc3_scanline_latch = data;
break;
case 0x6000: /* disable irqs */
ppu2c0x_set_scanline_callback(ppu, 0);
break;
case 0x6001: /* enable irqs */
ppu2c0x_set_scanline_callback(ppu, multigam3_mmc3_scanline_cb);
break;
}
}
