static int __init leonuart_init(void)
{
int ret;
int i;
int node;
int freq_khz;
int baud_rates[UART_NR];
printk(KERN_INFO
"Serial: Leon driver, author: Konrad Eisele<*****@*****.**>\n");
node = prom_getchild(prom_root_node);
freq_khz = prom_getint(node, "clock-frequency");
baud_rates[0] = prom_getintdefault(node, "uart1_baud", 9600);
baud_rates[1] = prom_getintdefault(node, "uart2_baud", 9600);
printk(KERN_INFO
"Serial: system frequency: %i khz, baud rates: %i %i\n",
freq_khz, baud_rates[0], baud_rates[1]);
ret = uart_register_driver(&leon_reg);
leon_reg.tty_driver->init_termios.c_cflag =
(leon_reg.tty_driver->init_termios.c_cflag & ~CBAUD) | B38400;
if (ret)
return ret;
for (i = 0; i < UART_NR; i++) {
struct console co;
leon_ports[i].port.uartclk = freq_khz * 1000;
uart_add_one_port(&leon_reg, &leon_ports[i].port);
uart_set_options(&leon_ports[i].port, &co,
baud_rates[i], 'n', 8, 'n');
}
return ret;
}
void __cpuinit smp_store_cpu_info(int id)
{
int cpu_node;
cpu_data(id).udelay_val = loops_per_jiffy;
cpu_find_by_mid(id, &cpu_node);
cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
"clock-frequency", 0);
cpu_data(id).prom_node = cpu_node;
cpu_data(id).mid = cpu_get_hwmid(cpu_node);
if (cpu_data(id).mid < 0)
panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
}
asmlinkage int solaris_sysconf(int id)
{
switch (id) {
case SOLARIS_CONFIG_NGROUPS: return NGROUPS_MAX;
case SOLARIS_CONFIG_CHILD_MAX: return CHILD_MAX;
case SOLARIS_CONFIG_OPEN_FILES: return OPEN_MAX;
case SOLARIS_CONFIG_POSIX_VER: return 199309;
case SOLARIS_CONFIG_PAGESIZE: return PAGE_SIZE;
case SOLARIS_CONFIG_XOPEN_VER: return 3;
case SOLARIS_CONFIG_CLK_TCK:
case SOLARIS_CONFIG_PROF_TCK:
return prom_getintdefault(prom_cpu_nodes[smp_processor_id()],
"clock-frequency", 167000000);
#ifdef CONFIG_SMP
case SOLARIS_CONFIG_NPROC_CONF: return NR_CPUS;
case SOLARIS_CONFIG_NPROC_ONLN: return smp_num_cpus;
#else
case SOLARIS_CONFIG_NPROC_CONF: return 1;
case SOLARIS_CONFIG_NPROC_ONLN: return 1;
#endif
case SOLARIS_CONFIG_SIGRT_MIN: return 37;
case SOLARIS_CONFIG_SIGRT_MAX: return 44;
case SOLARIS_CONFIG_PHYS_PAGES:
case SOLARIS_CONFIG_AVPHYS_PAGES:
{
struct sysinfo s;
si_meminfo(&s);
if (id == SOLARIS_CONFIG_PHYS_PAGES)
return s.totalram >>= PAGE_SHIFT;
else
return s.freeram >>= PAGE_SHIFT;
}
/* XXX support these as well -jj */
case SOLARIS_CONFIG_AIO_LISTIO_MAX: return -EINVAL;
case SOLARIS_CONFIG_AIO_MAX: return -EINVAL;
case SOLARIS_CONFIG_AIO_PRIO_DELTA_MAX: return -EINVAL;
case SOLARIS_CONFIG_DELAYTIMER_MAX: return -EINVAL;
case SOLARIS_CONFIG_MQ_OPEN_MAX: return -EINVAL;
case SOLARIS_CONFIG_MQ_PRIO_MAX: return -EINVAL;
case SOLARIS_CONFIG_RTSIG_MAX: return -EINVAL;
case SOLARIS_CONFIG_SEM_NSEMS_MAX: return -EINVAL;
case SOLARIS_CONFIG_SEM_VALUE_MAX: return -EINVAL;
case SOLARIS_CONFIG_SIGQUEUE_MAX: return -EINVAL;
case SOLARIS_CONFIG_TIMER_MAX: return -EINVAL;
default: return -EINVAL;
}
static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev,
struct linux_prom_registers *pregs)
{
int irq_prop;
irq_prop = prom_getintdefault(isa_dev->prom_node,
"interrupts", -1);
if (irq_prop <= 0) {
goto no_irq;
} else {
struct pci_controller_info *pcic;
struct pci_pbm_info *pbm;
int i;
if (isa_dev->bus->num_isa_intmap) {
if (!isa_dev_get_irq_using_imap(isa_dev,
isa_dev->bus,
&irq_prop,
pregs))
goto route_irq;
}
for (i = 0; grover_irq_table[i].obp_irq != 0; i++) {
if (grover_irq_table[i].obp_irq == irq_prop) {
int ino = grover_irq_table[i].pci_ino;
if (ino == 0)
goto no_irq;
irq_prop = ino;
goto route_irq;
}
}
goto no_irq;
route_irq:
pbm = isa_dev->bus->parent;
pcic = pbm->parent;
isa_dev->irq = pcic->irq_build(pbm, NULL, irq_prop);
return;
}
no_irq:
isa_dev->irq = PCI_IRQ_NONE;
}
void __init smp_store_cpu_info(int id)
{
int cpu_node;
/* multiplier and counter set by
smp_setup_percpu_timer() */
cpu_data(id).udelay_val = loops_per_jiffy;
cpu_find_by_mid(id, &cpu_node);
cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
"clock-frequency", 0);
cpu_data(id).pgcache_size = 0;
cpu_data(id).pte_cache[0] = NULL;
cpu_data(id).pte_cache[1] = NULL;
cpu_data(id).pgd_cache = NULL;
cpu_data(id).idle_volume = 1;
}
void smp_store_cpu_info(int id)
{
int cpu_node;
int mid;
cpu_data(id).udelay_val = loops_per_jiffy;
cpu_find_by_mid(id, &cpu_node);
cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
"clock-frequency", 0);
cpu_data(id).prom_node = cpu_node;
mid = cpu_get_hwmid(cpu_node);
if (mid < 0) {
printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08d", id, cpu_node);
mid = 0;
}
cpu_data(id).mid = mid;
}
__initfunc(int sun_kbd_init(void))
{
int i, opt_node;
struct kbd_struct kbd0;
extern struct tty_driver console_driver;
kbd0.ledflagstate = kbd0.default_ledflagstate = KBD_DEFLEDS;
kbd0.ledmode = LED_SHOW_FLAGS;
kbd0.lockstate = KBD_DEFLOCK;
kbd0.slockstate = 0;
kbd0.modeflags = KBD_DEFMODE;
kbd0.kbdmode = VC_XLATE;
for (i = 0 ; i < MAX_NR_CONSOLES ; i++)
kbd_table[i] = kbd0;
ttytab = console_driver.table;
kd_mksound = sunkbd_kd_mksound;
/* XXX Check keyboard-click? property in 'options' PROM node XXX */
if(sparc_cpu_model != sun4) {
opt_node = prom_getchild(prom_root_node);
opt_node = prom_searchsiblings(opt_node, "options");
i = prom_getintdefault(opt_node, "keyboard-click?", -1);
if(i != -1)
sunkbd_clickp = 1;
else
sunkbd_clickp = 0;
} else {
sunkbd_clickp = 0;
}
init_bh(KEYBOARD_BH, kbd_bh);
mark_bh(KEYBOARD_BH);
return 0;
}
static int __init myri_ether_init(struct net_device *dev, struct sbus_dev *sdev, int num)
{
static unsigned version_printed = 0;
struct myri_eth *mp;
unsigned char prop_buf[32];
int i;
DET(("myri_ether_init(%p,%p,%d):\n", dev, sdev, num));
dev = init_etherdev(0, sizeof(struct myri_eth));
if (version_printed++ == 0)
printk(version);
printk("%s: MyriCOM MyriNET Ethernet ", dev->name);
mp = (struct myri_eth *) dev->priv;
mp->myri_sdev = sdev;
/* Clean out skb arrays. */
for (i = 0; i < (RX_RING_SIZE + 1); i++)
mp->rx_skbs[i] = NULL;
for (i = 0; i < TX_RING_SIZE; i++)
mp->tx_skbs[i] = NULL;
/* First check for EEPROM information. */
i = prom_getproperty(sdev->prom_node, "myrinet-eeprom-info",
(char *)&mp->eeprom, sizeof(struct myri_eeprom));
DET(("prom_getprop(myrinet-eeprom-info) returns %d\n", i));
if (i == 0 || i == -1) {
/* No eeprom property, must cook up the values ourselves. */
DET(("No EEPROM: "));
mp->eeprom.bus_type = BUS_TYPE_SBUS;
mp->eeprom.cpuvers = prom_getintdefault(sdev->prom_node,"cpu_version",0);
mp->eeprom.cval = prom_getintdefault(sdev->prom_node,"clock_value",0);
mp->eeprom.ramsz = prom_getintdefault(sdev->prom_node,"sram_size",0);
DET(("cpuvers[%d] cval[%d] ramsz[%d]\n", mp->eeprom.cpuvers,
mp->eeprom.cval, mp->eeprom.ramsz));
if (mp->eeprom.cpuvers == 0) {
DET(("EEPROM: cpuvers was zero, setting to %04x\n",CPUVERS_2_3));
mp->eeprom.cpuvers = CPUVERS_2_3;
}
if (mp->eeprom.cpuvers < CPUVERS_3_0) {
DET(("EEPROM: cpuvers < CPUVERS_3_0, clockval set to zero.\n"));
mp->eeprom.cval = 0;
}
if (mp->eeprom.ramsz == 0) {
DET(("EEPROM: ramsz == 0, setting to 128k\n"));
mp->eeprom.ramsz = (128 * 1024);
}
i = prom_getproperty(sdev->prom_node, "myrinet-board-id",
&prop_buf[0], 10);
DET(("EEPROM: prom_getprop(myrinet-board-id) returns %d\n", i));
if ((i != 0) && (i != -1))
memcpy(&mp->eeprom.id[0], &prop_buf[0], 6);
else
set_boardid_from_idprom(mp, num);
i = prom_getproperty(sdev->prom_node, "fpga_version",
&mp->eeprom.fvers[0], 32);
DET(("EEPROM: prom_getprop(fpga_version) returns %d\n", i));
if (i == 0 || i == -1)
memset(&mp->eeprom.fvers[0], 0, 32);
if (mp->eeprom.cpuvers == CPUVERS_4_1) {
DET(("EEPROM: cpuvers CPUVERS_4_1, "));
if (mp->eeprom.ramsz == (128 * 1024)) {
DET(("ramsize 128k, setting to 256k, "));
mp->eeprom.ramsz = (256 * 1024);
}
if ((mp->eeprom.cval==0x40414041)||(mp->eeprom.cval==0x90449044)){
DET(("changing cval from %08x to %08x ",
mp->eeprom.cval, 0x50e450e4));
mp->eeprom.cval = 0x50e450e4;
}
DET(("\n"));
}
}
#ifdef DEBUG_DETECT
dump_eeprom(mp);
#endif
for (i = 0; i < 6; i++)
printk("%2.2x%c",
dev->dev_addr[i] = mp->eeprom.id[i],
i == 5 ? ' ' : ':');
printk("\n");
determine_reg_space_size(mp);
/* Map in the MyriCOM register/localram set. */
if (mp->eeprom.cpuvers < CPUVERS_4_0) {
/* XXX Makes no sense, if control reg is non-existant this
* XXX driver cannot function at all... maybe pre-4.0 is
* XXX only a valid version for PCI cards? Ask feldy...
*/
DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
mp->regs = sbus_ioremap(&sdev->resource[0], 0,
mp->reg_size, "MyriCOM Regs");
if (!mp->regs) {
printk("MyriCOM: Cannot map MyriCOM registers.\n");
return -ENODEV;
}
mp->lanai = (unsigned short *) (mp->regs + (256 * 1024));
mp->lanai3 = (unsigned int *) mp->lanai;
mp->lregs = (unsigned long) &mp->lanai[0x10000];
} else {
DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
mp->cregs = sbus_ioremap(&sdev->resource[0], 0,
PAGE_SIZE, "MyriCOM Control Regs");
mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024),
PAGE_SIZE, "MyriCOM LANAI Regs");
mp->lanai = (unsigned short *)
sbus_ioremap(&sdev->resource[0], (512 * 1024),
mp->eeprom.ramsz, "MyriCOM SRAM");
mp->lanai3 = (unsigned int *) mp->lanai;
}
DET(("Registers mapped: cregs[%lx] lregs[%lx] lanai[%p] lanai3[%p]\n",
mp->cregs, mp->lregs, mp->lanai, mp->lanai3));
if (mp->eeprom.cpuvers >= CPUVERS_4_0)
mp->shmem_base = 0xf000;
else
mp->shmem_base = 0x8000;
DET(("Shared memory base is %04x, ", mp->shmem_base));
mp->shmem = (struct myri_shmem *) &mp->lanai[mp->shmem_base];
DET(("shmem mapped at %p\n", mp->shmem));
mp->rqack = &mp->shmem->channel.recvqa;
mp->rq = &mp->shmem->channel.recvq;
mp->sq = &mp->shmem->channel.sendq;
/* Reset the board. */
DET(("Resetting LANAI\n"));
myri_reset_off(mp->lregs, mp->cregs);
myri_reset_on(mp->cregs);
/* Turn IRQ's off. */
myri_disable_irq(mp->lregs, mp->cregs);
/* Reset once more. */
myri_reset_on(mp->cregs);
/* Get the supported DVMA burst sizes from our SBUS. */
mp->myri_bursts = prom_getintdefault(mp->myri_sdev->bus->prom_node,
"burst-sizes", 0x00);
if (!sbus_can_burst64(sdev))
mp->myri_bursts &= ~(DMA_BURST64);
DET(("MYRI bursts %02x\n", mp->myri_bursts));
/* Encode SBUS interrupt level in second control register. */
i = prom_getint(sdev->prom_node, "interrupts");
if (i == 0)
i = 4;
DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
i, (1 << i)));
sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);
mp->dev = dev;
dev->open = &myri_open;
dev->stop = &myri_close;
dev->hard_start_xmit = &myri_start_xmit;
dev->tx_timeout = &myri_tx_timeout;
dev->watchdog_timeo = 5*HZ;
dev->get_stats = &myri_get_stats;
dev->set_multicast_list = &myri_set_multicast;
dev->irq = sdev->irqs[0];
/* Register interrupt handler now. */
DET(("Requesting MYRIcom IRQ line.\n"));
if (request_irq(dev->irq, &myri_interrupt,
SA_SHIRQ, "MyriCOM Ethernet", (void *) dev)) {
printk("MyriCOM: Cannot register interrupt handler.\n");
return -ENODEV;
}
DET(("ether_setup()\n"));
ether_setup(dev);
dev->mtu = MYRINET_MTU;
dev->change_mtu = myri_change_mtu;
dev->hard_header = myri_header;
dev->rebuild_header = myri_rebuild_header;
dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN);
dev->hard_header_cache = myri_header_cache;
dev->header_cache_update= myri_header_cache_update;
/* Load code onto the LANai. */
DET(("Loading LANAI firmware\n"));
myri_load_lanai(mp);
#ifdef MODULE
dev->ifindex = dev_new_index();
mp->next_module = root_myri_dev;
root_myri_dev = mp;
#endif
return 0;
}
int __init igafb_init(void)
{
struct pci_dev *pdev;
struct fb_info_iga *info;
unsigned long addr;
extern int con_is_present(void);
int iga2000 = 0;
/* Do not attach when we have a serial console. */
if (!con_is_present())
return -ENXIO;
pdev = pci_find_device(PCI_VENDOR_ID_INTERG,
PCI_DEVICE_ID_INTERG_1682, 0);
if (pdev == NULL) {
/*
* XXX We tried to use cyber2000fb.c for IGS 2000.
* But it does not initialize the chip in JavaStation-E, alas.
*/
pdev = pci_find_device(PCI_VENDOR_ID_INTERG, 0x2000, 0);
if(pdev == NULL) {
return -ENXIO;
}
iga2000 = 1;
}
info = kmalloc(sizeof(struct fb_info_iga), GFP_ATOMIC);
if (!info) {
printk("igafb_init: can't alloc fb_info_iga\n");
return -ENOMEM;
}
memset(info, 0, sizeof(struct fb_info_iga));
if ((addr = pdev->resource[0].start) == 0) {
printk("igafb_init: no memory start\n");
kfree(info);
return -ENXIO;
}
if ((info->frame_buffer = ioremap(addr, 1024*1024*2)) == 0) {
printk("igafb_init: can't remap %lx[2M]\n", addr);
kfree(info);
return -ENXIO;
}
info->frame_buffer_phys = addr & PCI_BASE_ADDRESS_MEM_MASK;
#ifdef __sparc__
/*
* The following is sparc specific and this is why:
*
* IGS2000 has its I/O memory mapped and we want
* to generate memory cycles on PCI, e.g. do ioremap(),
* then readb/writeb() as in Documentation/IO-mapping.txt.
*
* IGS1682 is more traditional, it responds to PCI I/O
* cycles, so we want to access it with inb()/outb().
*
* On sparc, PCIC converts CPU memory access within
* phys window 0x3000xxxx into PCI I/O cycles. Therefore
* we may use readb/writeb to access them with IGS1682.
*
* We do not take io_base_phys from resource[n].start
* on IGS1682 because that chip is BROKEN. It does not
* have a base register for I/O. We just "know" what its
* I/O addresses are.
*/
if (iga2000) {
info->io_base_phys = info->frame_buffer_phys | 0x00800000;
} else {
info->io_base_phys = 0x30000000; /* XXX */
}
if ((info->io_base = (int) ioremap(info->io_base_phys, 0x1000)) == 0) {
printk("igafb_init: can't remap %lx[4K]\n", info->io_base_phys);
iounmap((void *)info->frame_buffer);
kfree(info);
return -ENXIO;
}
/*
* Figure mmap addresses from PCI config space.
* We need two regions: for video memory and for I/O ports.
* Later one can add region for video coprocessor registers.
* However, mmap routine loops until size != 0, so we put
* one additional region with size == 0.
*/
info->mmap_map = kmalloc(4 * sizeof(*info->mmap_map), GFP_ATOMIC);
if (!info->mmap_map) {
printk("igafb_init: can't alloc mmap_map\n");
iounmap((void *)info->io_base);
iounmap(info->frame_buffer);
kfree(info);
return -ENOMEM;
}
memset(info->mmap_map, 0, 4 * sizeof(*info->mmap_map));
/*
* Set default vmode and cmode from PROM properties.
*/
{
struct pcidev_cookie *cookie = pdev->sysdata;
int node = cookie->prom_node;
int width = prom_getintdefault(node, "width", 1024);
int height = prom_getintdefault(node, "height", 768);
int depth = prom_getintdefault(node, "depth", 8);
switch (width) {
case 1024:
if (height == 768)
default_var = default_var_1024x768;
break;
case 1152:
if (height == 900)
default_var = default_var_1152x900;
break;
case 1280:
if (height == 1024)
default_var = default_var_1280x1024;
break;
default:
break;
}
switch (depth) {
case 8:
default_var.bits_per_pixel = 8;
break;
case 16:
default_var.bits_per_pixel = 16;
break;
case 24:
default_var.bits_per_pixel = 24;
break;
case 32:
default_var.bits_per_pixel = 32;
break;
default:
break;
}
}
#endif
if (!iga_init(info)) {
iounmap((void *)info->io_base);
iounmap(info->frame_buffer);
if (info->mmap_map)
kfree(info->mmap_map);
kfree(info);
}
#ifdef __sparc__
/*
* Add /dev/fb mmap values.
*/
/* First region is for video memory */
info->mmap_map[0].voff = 0x0;
info->mmap_map[0].poff = info->frame_buffer_phys & PAGE_MASK;
info->mmap_map[0].size = info->total_vram & PAGE_MASK;
info->mmap_map[0].prot_mask = SRMMU_CACHE;
info->mmap_map[0].prot_flag = SRMMU_WRITE;
/* Second region is for I/O ports */
info->mmap_map[1].voff = info->frame_buffer_phys & PAGE_MASK;
info->mmap_map[1].poff = info->io_base_phys & PAGE_MASK;
info->mmap_map[1].size = PAGE_SIZE * 2; /* X wants 2 pages */
info->mmap_map[1].prot_mask = SRMMU_CACHE;
info->mmap_map[1].prot_flag = SRMMU_WRITE;
#endif /* __sparc__ */
return 0;
}
char __init *creatorfb_init(struct fb_info_sbusfb *fb)
{
struct fb_fix_screeninfo *fix = &fb->fix;
struct fb_var_screeninfo *var = &fb->var;
struct display *disp = &fb->disp;
struct fbtype *type = &fb->type;
struct linux_prom64_registers regs[2*PROMREG_MAX];
int i, afb = 0;
unsigned int btype;
char name[64];
struct fb_ops *fbops;
if (prom_getproperty(fb->prom_node, "reg", (void *) regs, sizeof(regs)) <= 0)
return NULL;
if (creator_apply_upa_parent_ranges(fb->prom_parent, ®s[0]))
return NULL;
disp->dispsw_data = (void *)kmalloc(16 * sizeof(u32), GFP_KERNEL);
if (disp->dispsw_data == NULL)
return NULL;
memset(disp->dispsw_data, 0, 16 * sizeof(u32));
fbops = kmalloc(sizeof(*fbops), GFP_KERNEL);
if (fbops == NULL) {
kfree(disp->dispsw_data);
return NULL;
}
*fbops = *fb->info.fbops;
fbops->fb_rasterimg = ffb_rasterimg;
fb->info.fbops = fbops;
prom_getstring(fb->prom_node, "name", name, sizeof(name));
if (!strcmp(name, "SUNW,afb"))
afb = 1;
btype = prom_getintdefault(fb->prom_node, "board_type", 0);
strcpy(fb->info.modename, "Creator");
if (!afb) {
if ((btype & 7) == 3)
strcpy(fix->id, "Creator 3D");
else
strcpy(fix->id, "Creator");
} else
strcpy(fix->id, "Elite 3D");
fix->visual = FB_VISUAL_TRUECOLOR;
fix->line_length = 8192;
fix->accel = FB_ACCEL_SUN_CREATOR;
var->bits_per_pixel = 32;
var->green.offset = 8;
var->blue.offset = 16;
var->accel_flags = FB_ACCELF_TEXT;
disp->scrollmode = SCROLL_YREDRAW;
disp->screen_base = (char *)__va(regs[0].phys_addr) + FFB_DFB24_POFF + 8192 * fb->y_margin + 4 * fb->x_margin;
fb->s.ffb.xy_margin = (fb->y_margin << 16) + fb->x_margin;
fb->s.ffb.yx_margin = (((u64)fb->y_margin) << 32) + fb->x_margin;
fb->s.ffb.fbc = (struct ffb_fbc *)(regs[0].phys_addr + FFB_FBC_REGS_POFF);
fb->s.ffb.dac = (struct ffb_dac *)(regs[0].phys_addr + FFB_DAC_POFF);
fb->dispsw = ffb_dispsw;
fb->margins = ffb_margins;
fb->loadcmap = ffb_loadcmap;
fb->setcursor = ffb_setcursor;
fb->setcursormap = ffb_setcursormap;
fb->setcurshape = ffb_setcurshape;
fb->switch_from_graph = ffb_switch_from_graph;
fb->fill = ffb_fill;
#if 0
/* XXX Can't enable this for now, I've seen cases
* XXX where the VC was blanked, and Xsun24 was started
* XXX via a remote login, the sunfb code did not
* XXX unblank creator when it was mmap'd for some
* XXX reason, investigate later... -DaveM
*/
fb->blank = ffb_blank;
fb->unblank = ffb_unblank;
#endif
/* If there are any read errors or fifo overflow conditions,
* clear them now.
*/
if((upa_readl(&fb->s.ffb.fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0)
upa_writel(FFB_UCSR_ALL_ERRORS, &fb->s.ffb.fbc->ucsr);
ffb_switch_from_graph(fb);
fb->physbase = regs[0].phys_addr;
fb->mmap_map = ffb_mmap_map;
fb->cursor.hwsize.fbx = 64;
fb->cursor.hwsize.fby = 64;
type->fb_depth = 24;
upa_writel(0x8000, &fb->s.ffb.dac->type);
fb->s.ffb.dac_rev = (upa_readl(&fb->s.ffb.dac->value) >> 0x1c);
i = prom_getintdefault (fb->prom_node, "board_type", 8);
sprintf(idstring, "%s at %016lx type %d DAC %d",
fix->id, regs[0].phys_addr, i, fb->s.ffb.dac_rev);
/* Elite3D has different DAC revision numbering, and no DAC revisions
have the reversed meaning of cursor enable */
if (afb)
fb->s.ffb.dac_rev = 10;
/* Unblank it just to be sure. When there are multiple
* FFB/AFB cards in the system, or it is not the OBP
* chosen console, it will have video outputs off in
* the DAC.
*/
ffb_unblank(fb);
return idstring;
}
int __init gaisler_apbuart_init(void)
{
int ret;
int i;
int node;
int freq_khz;
int baud_rates[UART_NR];
_apbuart_init_bases();
node = prom_getchild(prom_root_node);
freq_khz = prom_getint(node, "clock-frequency");
printk(KERN_INFO "grlib apbuart: %i serial driver(s) at [",
leon_ports_nr);
for (i = 0; i < UART_NR; i++) {
baud_rates[i] = 9600;
}
for (i = 0; i < leon_ports_nr; i++) {
baud_rates[i] = prom_getintdefault(node, "uart1_baud", 9600);
if (i != 0) {
printk(",");
}
printk("0x%x", (unsigned int)leon_ports[i].port.mapbase);
printk("(irq %i)", leon_ports[i].port.irq);
}
printk("]\n");
baud_rates[0] = prom_getintdefault(node, "uart1_baud", 9600);
baud_rates[1] = prom_getintdefault(node, "uart2_baud", 9600);
printk(KERN_INFO
"grlib apbuart: system frequency: %i khz, baud rates: %i %i\n",
freq_khz, baud_rates[0], baud_rates[1]);
ret = uart_register_driver(&leon_reg);
leon_reg.tty_driver->init_termios.c_cflag =
(leon_reg.tty_driver->init_termios.c_cflag & ~CBAUD) | B38400;
if (ret)
return ret;
/*
* Set the FIFO size after the baud rates are set so it'll be done at an
* appropriate rate. Also flush the FIFOs just in case they have lingering
* data.
*/
of_register_driver(&apbuart_driver, &of_platform_bus_type);
/*for (i = 0; i < leon_ports_nr; i++) {
struct console co;
leon_ports[i].port.uartclk = freq_khz * 1000;
uart_add_one_port(&leon_reg, &leon_ports[i].port);
uart_set_options(&leon_ports[i].port, &co,
baud_rates[i], 'n', 8, 'n');
leon_ports[i].port.fifosize = apbuart_scan_fifo_size(i);
apbuart_flush_fifo(&leon_ports[i].port);
}*/
return ret;
}
