static void __init gpl32900_init(void)
{
gpl32900_devinit();
pwr_down_reserved_mem_init();
/* set TCK to low */
SCUB_PIN_MUX |= 0x1; /* disable ICE, JTAG pin will return to IOB[25:20] */
SCUB_GPIO1_IE &= (~0x3F00000); /* IOB[25:20] input enable, always low of IO status */
//SCUB_PGS0 |= 0x1; /* with ARM clock on */
SCUB_WFI &= (~0x1); /* with ARM clock off */
idle_counter = 0; /*0:enable , others:disable*/
pm_power_off = gpl32900_power_off;
}
static void __init gpl32900b_init(void)
{
gp_register_baseclocks(0);
gpl32900b_devinit();
pwr_down_reserved_mem_init();
/* set TCK to low */
SCUB_PIN_MUX |= 0x1; /* disable ICE, JTAG pin will return to IOB[25:20] */
SCUB_GPIO1_IE &= (~0x3F00000); /* IOB[25:20] input enable, always low of IO status */
SCUB_PGS2 |= 0x1400; /* Non-bonding pad in gpl32900b, this gid is one of SD2 data pin, must set as GPIO when using SD2. */
//SCUB_PGS0 |= 0x1; /* with ARM clock on */
SCUB_WFI &= (~0x1); /* with ARM clock off */
idle_counter = 0; /*0:enable , others:disable*/
pm_power_off = gpl32900b_power_off;
}
