static void create_from_node(QEMUDeviceClass *dc, const void *dt, int node)
{
QEMUDevice *d;
const char *propstr;
int i;
d = qdev_create(dc, dt, node);
if (dc->has_chardev) {
int n;
propstr = fdt_getprop_string(dt, node, "chardev");
if (propstr) {
i = sscanf(propstr, "serial%d", &n);
if (i == 1 && n >= 0 && n < MAX_SERIAL_PORTS)
{
if (!serial_hds[n])
{
const char* target = fdt_getprop_string(dt, node, "target");
if (target)
serial_hds[n] = qemu_chr_open(propstr, target);
}
d->chardev = serial_hds[n];
}
}
}
find_properties(d);
d->dc->create(d);
if (dc->savevm_version) {
register_savevm(dc->name, -1, dc->savevm_version,
dc->save_state, dc->load_state, d->opaque);
}
if (dc->num_regs) {
const struct fdt_property *p;
uint32_t base;
uint32_t *data;
void *opaque;
int iomemtype;
int len;
check_cells(dt, node, 1, 0);
p = fdt_get_property(dt, node, "reg", &len);
if (!p || len != dc->num_regs * 4) {
invalid_devtree(d, "Missing reg");
return;
}
data = (uint32_t *)p->data;
for (i = 0; i < dc->num_regs; i++) {
base = fdt32_to_cpu(*data);
data++;
opaque = d->mem_opaque[i];
if (!opaque)
opaque = d->opaque;
iomemtype = cpu_register_io_memory(0, dc->mem_read[i],
dc->mem_write[i], opaque);
cpu_register_physical_memory(base, dc->mem_size[i], iomemtype);
}
}
}
struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
qemu_irq irq, omap_clk fclk, omap_clk iclk,
qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr)
{
struct omap_uart_s *s = (struct omap_uart_s *)
qemu_mallocz(sizeof(struct omap_uart_s));
s->base = base;
s->fclk = fclk;
s->irq = irq;
#ifdef TARGET_WORDS_BIGENDIAN
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_open("null", "null", NULL), 1,
1);
#else
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_open("null", "null", NULL), 1,
0);
#endif
return s;
}
static void onedram_tcp_init(void *opaque)
{
S5pc1xxOneDRAMState *s = (S5pc1xxOneDRAMState *)opaque;
/* open a socket to communicate with vmodem */
const char *p = "tcp:localhost:7777,server,nowait";
s->socket= qemu_chr_open("onedram_socket", p, NULL);
if (!s->socket)
hw_error("onedram: could not open onedram socket\n");
qemu_chr_add_handlers(s->socket, onedram_tcp_can_read,
onedram_tcp_read, onedram_tcp_event,
s);
}
static void iphone2g_radio_init()
{
DeviceState *dev = qdev_create(NULL, "s5l8900.uart");
char str[] = "s5l8900.uart.00";
S5L8900UartState *s = FROM_SYSBUS(S5L8900UartState, dev);
s->base = base;
if (!chr) {
fprintf(stderr, "openning char device");
snprintf(str, strlen(str) + 1, "s5l8900.uart.%02d", instance % 100);
chr = qemu_chr_open(str, "null", NULL);
}
qdev_prop_set_chr(dev, "chr", chr);
qdev_prop_set_uint32(dev, "queue-size", queue_size);
qdev_prop_set_uint32(dev, "instance", instance);
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
return dev;
}
qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr)
{
target_phys_addr_t base = omap_l4_attach(ta, 0, 0);
struct omap_uart_s *s = omap_uart_init(base, irq,
fclk, iclk, txdma, rxdma, chr);
int iomemtype = cpu_register_io_memory(omap_uart_readfn,
omap_uart_writefn, s);
s->ta = ta;
cpu_register_physical_memory(base + 0x20, 0x100, iomemtype);
return s;
}
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
{
/* TODO: Should reuse or destroy current s->serial */
#ifdef TARGET_WORDS_BIGENDIAN
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_open("null", "null", NULL), 1,
1);
#else
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_open("null", "null", NULL), 1,
0);
#endif
}
